* [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps
@ 2017-01-18 10:53 Marc Zyngier
2017-01-18 10:53 ` [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC Marc Zyngier
` (2 more replies)
0 siblings, 3 replies; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 10:53 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
For a GICv2 (which happens to be virtualization capable), the
architecture mandates the following regions:
GICD: 4kB
GICC: 8kB
GICH: 8kB
GICV: 8kB
Unfortunately, I made a mistake in one of the examples contained in
the DT binding document, and everyone duplicated that same mistake all
over the map.
This small series fixes the DT binding, and hopefully updates all the
offending DTs to be compliant with the architecture.
Marc Zyngier (2):
dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
ARM: DTS: Fix register map for virt-capable GIC
Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 4 ++--
arch/arm/boot/dts/alpine.dtsi | 2 +-
arch/arm/boot/dts/axm55xx.dtsi | 2 +-
arch/arm/boot/dts/dra7.dtsi | 2 +-
arch/arm/boot/dts/ecx-2000.dts | 2 +-
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos5.dtsi | 2 +-
arch/arm/boot/dts/exynos5260.dtsi | 2 +-
arch/arm/boot/dts/exynos5440.dtsi | 2 +-
arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
arch/arm/boot/dts/keystone.dtsi | 2 +-
arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
arch/arm/boot/dts/mt2701.dtsi | 2 +-
arch/arm/boot/dts/mt6580.dtsi | 2 +-
arch/arm/boot/dts/mt6589.dtsi | 2 +-
arch/arm/boot/dts/mt7623.dtsi | 2 +-
arch/arm/boot/dts/mt8127.dtsi | 2 +-
arch/arm/boot/dts/mt8135.dtsi | 2 +-
arch/arm/boot/dts/omap5.dtsi | 2 +-
arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
arch/arm/boot/dts/r8a7743.dtsi | 2 +-
arch/arm/boot/dts/r8a7745.dtsi | 2 +-
arch/arm/boot/dts/r8a7790.dtsi | 2 +-
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
arch/arm/boot/dts/r8a7792.dtsi | 2 +-
arch/arm/boot/dts/r8a7793.dtsi | 2 +-
arch/arm/boot/dts/r8a7794.dtsi | 2 +-
arch/arm/boot/dts/rk1108.dtsi | 2 +-
arch/arm/boot/dts/rk3036.dtsi | 2 +-
arch/arm/boot/dts/rk322x.dtsi | 2 +-
arch/arm/boot/dts/rk3288.dtsi | 2 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
38 files changed, 42 insertions(+), 42 deletions(-)
--
2.1.4
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
2017-01-18 10:53 [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Marc Zyngier
@ 2017-01-18 10:53 ` Marc Zyngier
2017-01-19 14:40 ` Mark Rutland
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
2017-01-18 12:34 ` [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Arnd Bergmann
2 siblings, 1 reply; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 10:53 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
The joys of copy/paste: the example of a virtualization capable GIC
in the DT binding was wrong, and propagated to dozens of platforms.
Oh well. Let's fix the source of the crap before tackling individual
offenders.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
index 5393e2a..a3d51ed 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
@@ -107,11 +107,11 @@ Required properties:
Example:
interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic";
+ compatible = "arm,gic-400";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2c001000 0x1000>,
- <0x2c002000 0x1000>,
+ <0x2c002000 0x2000>,
<0x2c004000 0x2000>,
<0x2c006000 0x2000>;
interrupts = <1 9 0xf04>;
--
2.1.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Marc Zyngier
2017-01-18 10:53 ` [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC Marc Zyngier
@ 2017-01-18 10:53 ` Marc Zyngier
2017-01-18 11:25 ` Heiko Stübner
` (8 more replies)
2017-01-18 12:34 ` [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Arnd Bergmann
2 siblings, 9 replies; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 10:53 UTC (permalink / raw)
To: linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.
Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).
In the couple of cases were I knew for sure what implementation
was used, I've added the "arm,gic-400" compatible string. I'm 99%
sure that this is what everyong is using, but short of having the
TRM for all the other SoCs, I've let them alone.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/boot/dts/alpine.dtsi | 2 +-
arch/arm/boot/dts/axm55xx.dtsi | 2 +-
arch/arm/boot/dts/dra7.dtsi | 2 +-
arch/arm/boot/dts/ecx-2000.dts | 2 +-
arch/arm/boot/dts/exynos3250.dtsi | 2 +-
arch/arm/boot/dts/exynos5.dtsi | 2 +-
arch/arm/boot/dts/exynos5260.dtsi | 2 +-
arch/arm/boot/dts/exynos5440.dtsi | 2 +-
arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
arch/arm/boot/dts/keystone.dtsi | 2 +-
arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
arch/arm/boot/dts/mt2701.dtsi | 2 +-
arch/arm/boot/dts/mt6580.dtsi | 2 +-
arch/arm/boot/dts/mt6589.dtsi | 2 +-
arch/arm/boot/dts/mt7623.dtsi | 2 +-
arch/arm/boot/dts/mt8127.dtsi | 2 +-
arch/arm/boot/dts/mt8135.dtsi | 2 +-
arch/arm/boot/dts/omap5.dtsi | 2 +-
arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
arch/arm/boot/dts/r8a7743.dtsi | 2 +-
arch/arm/boot/dts/r8a7745.dtsi | 2 +-
arch/arm/boot/dts/r8a7790.dtsi | 2 +-
arch/arm/boot/dts/r8a7791.dtsi | 2 +-
arch/arm/boot/dts/r8a7792.dtsi | 2 +-
arch/arm/boot/dts/r8a7793.dtsi | 2 +-
arch/arm/boot/dts/r8a7794.dtsi | 2 +-
arch/arm/boot/dts/rk1108.dtsi | 2 +-
arch/arm/boot/dts/rk3036.dtsi | 2 +-
arch/arm/boot/dts/rk322x.dtsi | 2 +-
arch/arm/boot/dts/rk3288.dtsi | 2 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
37 files changed, 40 insertions(+), 40 deletions(-)
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index db8752f..d0eefc3 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -93,7 +93,7 @@
interrupt-controller;
reg = <0x0 0xfb001000 0x0 0x1000>,
<0x0 0xfb002000 0x0 0x2000>,
- <0x0 0xfb004000 0x0 0x1000>,
+ <0x0 0xfb004000 0x0 0x2000>,
<0x0 0xfb006000 0x0 0x2000>;
interrupts =
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
index a9d6d59..47799f5 100644
--- a/arch/arm/boot/dts/axm55xx.dtsi
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -62,7 +62,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0x20 0x01001000 0 0x1000>,
- <0x20 0x01002000 0 0x1000>,
+ <0x20 0x01002000 0 0x2000>,
<0x20 0x01004000 0 0x2000>,
<0x20 0x01006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1faf24a..a9ffa49 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -57,7 +57,7 @@
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x0 0x48211000 0x0 0x1000>,
- <0x0 0x48212000 0x0 0x1000>,
+ <0x0 0x48212000 0x0 0x2000>,
<0x0 0x48214000 0x0 0x2000>,
<0x0 0x48216000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 2ccbb57f..c15e7e0 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -99,7 +99,7 @@
interrupt-controller;
interrupts = <1 9 0xf04>;
reg = <0xfff11000 0x1000>,
- <0xfff12000 0x1000>,
+ <0xfff12000 0x2000>,
<0xfff14000 0x2000>,
<0xfff16000 0x2000>;
};
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index ba17ee1..9c28ef4 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -234,7 +234,7 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
- <0x10482000 0x1000>,
+ <0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 7fd870e..678c08e 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -94,7 +94,7 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x10481000 0x1000>,
- <0x10482000 0x1000>,
+ <0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 5818718..5e88c96 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -167,7 +167,7 @@
#size-cells = <0>;
interrupt-controller;
reg = <0x10481000 0x1000>,
- <0x10482000 0x1000>,
+ <0x10482000 0x2000>,
<0x10484000 0x2000>,
<0x10486000 0x2000>;
interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 2a2e570..77d35bb 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -40,7 +40,7 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2E1000 0x1000>,
- <0x2E2000 0x1000>,
+ <0x2E2000 0x2000>,
<0x2E4000 0x2000>,
<0x2E6000 0x2000>;
interrupts = <GIC_PPI 9
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 39845a7..ac5371a 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -91,11 +91,11 @@
};
intc: interrupt-controller@00a01000 {
- compatible = "arm,cortex-a7-gic";
+ compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x00a01000 0x1000>,
- <0x00a02000 0x1000>,
+ <0x00a02000 0x2000>,
<0x00a04000 0x2000>,
<0x00a06000 0x2000>;
};
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 63c7cf0..07bf300 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -45,7 +45,7 @@
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
- <0x0 0x02564000 0x0 0x1000>,
+ <0x0 0x02564000 0x0 0x2000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 02708ba..aaff6816 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -35,7 +35,7 @@
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>,
- <0x0 0x02564000 0x0 0x1000>,
+ <0x0 0x02564000 0x0 0x2000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 282d854..45ea57f 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -110,11 +110,11 @@
ranges;
gic: interrupt-controller@1400000 {
- compatible = "arm,cortex-a7-gic";
+ compatible = "arm,gic-400", "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x1401000 0x0 0x1000>,
- <0x0 0x1402000 0x0 0x1000>,
+ <0x0 0x1402000 0x0 0x2000>,
<0x0 0x1404000 0x0 0x2000>,
<0x0 0x1406000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 7eab6f4..454d099 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -170,7 +170,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
- <0 0x10212000 0 0x1000>,
+ <0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
index 06fdf6c..a349dba 100644
--- a/arch/arm/boot/dts/mt6580.dtsi
+++ b/arch/arm/boot/dts/mt6580.dtsi
@@ -91,7 +91,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10211000 0x1000>,
- <0x10212000 0x1000>,
+ <0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
index 88b3cb1..0d6f60a 100644
--- a/arch/arm/boot/dts/mt6589.dtsi
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -102,7 +102,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0x10211000 0x1000>,
- <0x10212000 0x1000>,
+ <0x10212000 0x2000>,
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index fd2b614..19a54a3 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -104,7 +104,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
- <0 0x10212000 0 0x1000>,
+ <0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
index 52086c8..916c095 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -129,7 +129,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
- <0 0x10212000 0 0x1000>,
+ <0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 1d7f92b..a97b4ee 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -221,7 +221,7 @@
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
reg = <0 0x10211000 0 0x1000>,
- <0 0x10212000 0 0x1000>,
+ <0 0x10212000 0 0x2000>,
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 7cd92ba..71b4809 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -92,7 +92,7 @@
interrupt-controller;
#interrupt-cells = <3>;
reg = <0 0x48211000 0 0x1000>,
- <0 0x48212000 0 0x1000>,
+ <0 0x48212000 0 0x2000>,
<0 0x48214000 0 0x2000>,
<0 0x48216000 0 0x2000>;
interrupt-parent = <&gic>;
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 53183ff..14a66ca 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -465,7 +465,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 216cb1f..172a944 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -55,7 +55,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 0b2e2f3..7390ec0 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -55,7 +55,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0c8900d..ac38764 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -183,7 +183,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 8721466..28039db 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -114,7 +114,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 6ced3c1..1ed5c88 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -88,7 +88,7 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 2fb527c..934c097 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -105,7 +105,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index fb576db..09f7823 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -71,7 +71,7 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
index d770023..d6194bf 100644
--- a/arch/arm/boot/dts/rk1108.dtsi
+++ b/arch/arm/boot/dts/rk1108.dtsi
@@ -215,7 +215,7 @@
#address-cells = <0>;
reg = <0x32011000 0x1000>,
- <0x32012000 0x1000>,
+ <0x32012000 0x2000>,
<0x32014000 0x2000>,
<0x32016000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 4ed49a2..ff9b90b 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -189,7 +189,7 @@
#address-cells = <0>;
reg = <0x10139000 0x1000>,
- <0x1013a000 0x1000>,
+ <0x1013a000 0x2000>,
<0x1013c000 0x2000>,
<0x1013e000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 9d3aee5..9dff822 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -443,7 +443,7 @@
#address-cells = <0>;
reg = <0x32011000 0x1000>,
- <0x32012000 0x1000>,
+ <0x32012000 0x2000>,
<0x32014000 0x2000>,
<0x32016000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 4fad133..af46cba 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1110,7 +1110,7 @@
#address-cells = <0>;
reg = <0xffc01000 0x1000>,
- <0xffc02000 0x1000>,
+ <0xffc02000 0x2000>,
<0xffc04000 0x2000>,
<0xffc06000 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 2b26175..6ed505a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -861,7 +861,7 @@
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index f7db067..3c24832 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1686,9 +1686,9 @@
};
gic: interrupt-controller@01c81000 {
- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index e4991a7..49dfe86 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -489,7 +489,7 @@
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index d3473f8..04c3fdd 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -217,7 +217,7 @@
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6c14a6f..292abd0 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -580,7 +580,7 @@
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
- <0x01c82000 0x1000>,
+ <0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 979ad1a..b7b5831 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -613,7 +613,7 @@
gic: interrupt-controller@01c41000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c41000 0x1000>,
- <0x01c42000 0x1000>,
+ <0x01c42000 0x2000>,
<0x01c44000 0x2000>,
<0x01c46000 0x2000>;
interrupt-controller;
--
2.1.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
@ 2017-01-18 11:25 ` Heiko Stübner
2017-01-18 11:29 ` Matthias Brugger
` (7 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Heiko Stübner @ 2017-01-18 11:25 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Maxime Ripard,
Chen-Yu Tsai, arm
Am Mittwoch, 18. Januar 2017, 10:53:31 CET schrieb Marc Zyngier:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
for the Rockchip parts
Acked-by: Heiko Stuebner <heiko@sntech.de>
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
> index d770023..d6194bf 100644
> --- a/arch/arm/boot/dts/rk1108.dtsi
> +++ b/arch/arm/boot/dts/rk1108.dtsi
> @@ -215,7 +215,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 4ed49a2..ff9b90b 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -189,7 +189,7 @@
> #address-cells = <0>;
>
> reg = <0x10139000 0x1000>,
> - <0x1013a000 0x1000>,
> + <0x1013a000 0x2000>,
> <0x1013c000 0x2000>,
> <0x1013e000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
> index 9d3aee5..9dff822 100644
> --- a/arch/arm/boot/dts/rk322x.dtsi
> +++ b/arch/arm/boot/dts/rk322x.dtsi
> @@ -443,7 +443,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 4fad133..af46cba 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -1110,7 +1110,7 @@
> #address-cells = <0>;
>
> reg = <0xffc01000 0x1000>,
> - <0xffc02000 0x1000>,
> + <0xffc02000 0x2000>,
> <0xffc04000 0x2000>,
> <0xffc06000 0x2000>;
> interrupts = <GIC_PPI 9 0xf04>;
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
2017-01-18 11:25 ` Heiko Stübner
@ 2017-01-18 11:29 ` Matthias Brugger
2017-01-18 11:57 ` Robin Murphy
` (6 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2017-01-18 11:29 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Simon Horman,
Magnus Damm, Heiko Stuebner, Maxime Ripard, Chen-Yu Tsai, arm
On 18/01/17 11:53, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/alpine.dtsi | 2 +-
> arch/arm/boot/dts/axm55xx.dtsi | 2 +-
> arch/arm/boot/dts/dra7.dtsi | 2 +-
> arch/arm/boot/dts/ecx-2000.dts | 2 +-
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos5.dtsi | 2 +-
> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
> arch/arm/boot/dts/exynos5440.dtsi | 2 +-
> arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
> arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
> arch/arm/boot/dts/keystone.dtsi | 2 +-
> arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
> arch/arm/boot/dts/mt2701.dtsi | 2 +-
> arch/arm/boot/dts/mt6580.dtsi | 2 +-
> arch/arm/boot/dts/mt6589.dtsi | 2 +-
> arch/arm/boot/dts/mt7623.dtsi | 2 +-
> arch/arm/boot/dts/mt8127.dtsi | 2 +-
> arch/arm/boot/dts/mt8135.dtsi | 2 +-
for the Mediatek SoCs:
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
> arch/arm/boot/dts/omap5.dtsi | 2 +-
> arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
> arch/arm/boot/dts/r8a7743.dtsi | 2 +-
> arch/arm/boot/dts/r8a7745.dtsi | 2 +-
> arch/arm/boot/dts/r8a7790.dtsi | 2 +-
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> arch/arm/boot/dts/r8a7792.dtsi | 2 +-
> arch/arm/boot/dts/r8a7793.dtsi | 2 +-
> arch/arm/boot/dts/r8a7794.dtsi | 2 +-
> arch/arm/boot/dts/rk1108.dtsi | 2 +-
> arch/arm/boot/dts/rk3036.dtsi | 2 +-
> arch/arm/boot/dts/rk322x.dtsi | 2 +-
> arch/arm/boot/dts/rk3288.dtsi | 2 +-
> arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
> arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
> arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
> 37 files changed, 40 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
> index db8752f..d0eefc3 100644
> --- a/arch/arm/boot/dts/alpine.dtsi
> +++ b/arch/arm/boot/dts/alpine.dtsi
> @@ -93,7 +93,7 @@
> interrupt-controller;
> reg = <0x0 0xfb001000 0x0 0x1000>,
> <0x0 0xfb002000 0x0 0x2000>,
> - <0x0 0xfb004000 0x0 0x1000>,
> + <0x0 0xfb004000 0x0 0x2000>,
> <0x0 0xfb006000 0x0 0x2000>;
> interrupts =
> <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
> index a9d6d59..47799f5 100644
> --- a/arch/arm/boot/dts/axm55xx.dtsi
> +++ b/arch/arm/boot/dts/axm55xx.dtsi
> @@ -62,7 +62,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0x20 0x01001000 0 0x1000>,
> - <0x20 0x01002000 0 0x1000>,
> + <0x20 0x01002000 0 0x2000>,
> <0x20 0x01004000 0 0x2000>,
> <0x20 0x01006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 1faf24a..a9ffa49 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -57,7 +57,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
> reg = <0x0 0x48211000 0x0 0x1000>,
> - <0x0 0x48212000 0x0 0x1000>,
> + <0x0 0x48212000 0x0 0x2000>,
> <0x0 0x48214000 0x0 0x2000>,
> <0x0 0x48216000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
> index 2ccbb57f..c15e7e0 100644
> --- a/arch/arm/boot/dts/ecx-2000.dts
> +++ b/arch/arm/boot/dts/ecx-2000.dts
> @@ -99,7 +99,7 @@
> interrupt-controller;
> interrupts = <1 9 0xf04>;
> reg = <0xfff11000 0x1000>,
> - <0xfff12000 0x1000>,
> + <0xfff12000 0x2000>,
> <0xfff14000 0x2000>,
> <0xfff16000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index ba17ee1..9c28ef4 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -234,7 +234,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 7fd870e..678c08e 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -94,7 +94,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
> index 5818718..5e88c96 100644
> --- a/arch/arm/boot/dts/exynos5260.dtsi
> +++ b/arch/arm/boot/dts/exynos5260.dtsi
> @@ -167,7 +167,7 @@
> #size-cells = <0>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
> index 2a2e570..77d35bb 100644
> --- a/arch/arm/boot/dts/exynos5440.dtsi
> +++ b/arch/arm/boot/dts/exynos5440.dtsi
> @@ -40,7 +40,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x2E1000 0x1000>,
> - <0x2E2000 0x1000>,
> + <0x2E2000 0x2000>,
> <0x2E4000 0x2000>,
> <0x2E6000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 39845a7..ac5371a 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -91,11 +91,11 @@
> };
>
> intc: interrupt-controller@00a01000 {
> - compatible = "arm,cortex-a7-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic";
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x00a01000 0x1000>,
> - <0x00a02000 0x1000>,
> + <0x00a02000 0x2000>,
> <0x00a04000 0x2000>,
> <0x00a06000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
> index 63c7cf0..07bf300 100644
> --- a/arch/arm/boot/dts/keystone-k2g.dtsi
> +++ b/arch/arm/boot/dts/keystone-k2g.dtsi
> @@ -45,7 +45,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index 02708ba..aaff6816 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -35,7 +35,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 282d854..45ea57f 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -110,11 +110,11 @@
> ranges;
>
> gic: interrupt-controller@1400000 {
> - compatible = "arm,cortex-a7-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic";
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x0 0x1401000 0x0 0x1000>,
> - <0x0 0x1402000 0x0 0x1000>,
> + <0x0 0x1402000 0x0 0x2000>,
> <0x0 0x1404000 0x0 0x2000>,
> <0x0 0x1406000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 7eab6f4..454d099 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -170,7 +170,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
> index 06fdf6c..a349dba 100644
> --- a/arch/arm/boot/dts/mt6580.dtsi
> +++ b/arch/arm/boot/dts/mt6580.dtsi
> @@ -91,7 +91,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0x10211000 0x1000>,
> - <0x10212000 0x1000>,
> + <0x10212000 0x2000>,
> <0x10214000 0x2000>,
> <0x10216000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
> index 88b3cb1..0d6f60a 100644
> --- a/arch/arm/boot/dts/mt6589.dtsi
> +++ b/arch/arm/boot/dts/mt6589.dtsi
> @@ -102,7 +102,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0x10211000 0x1000>,
> - <0x10212000 0x1000>,
> + <0x10212000 0x2000>,
> <0x10214000 0x2000>,
> <0x10216000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index fd2b614..19a54a3 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -104,7 +104,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
> index 52086c8..916c095 100644
> --- a/arch/arm/boot/dts/mt8127.dtsi
> +++ b/arch/arm/boot/dts/mt8127.dtsi
> @@ -129,7 +129,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 1d7f92b..a97b4ee 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -221,7 +221,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 7cd92ba..71b4809 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -92,7 +92,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
> reg = <0 0x48211000 0 0x1000>,
> - <0 0x48212000 0 0x1000>,
> + <0 0x48212000 0 0x2000>,
> <0 0x48214000 0 0x2000>,
> <0 0x48216000 0 0x2000>;
> interrupt-parent = <&gic>;
> diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
> index 53183ff..14a66ca 100644
> --- a/arch/arm/boot/dts/r8a73a4.dtsi
> +++ b/arch/arm/boot/dts/r8a73a4.dtsi
> @@ -465,7 +465,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 216cb1f..172a944 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -55,7 +55,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 0b2e2f3..7390ec0 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -55,7 +55,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 0c8900d..ac38764 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -183,7 +183,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 8721466..28039db 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -114,7 +114,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 6ced3c1..1ed5c88 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -88,7 +88,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index 2fb527c..934c097 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -105,7 +105,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index fb576db..09f7823 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -71,7 +71,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
> index d770023..d6194bf 100644
> --- a/arch/arm/boot/dts/rk1108.dtsi
> +++ b/arch/arm/boot/dts/rk1108.dtsi
> @@ -215,7 +215,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 4ed49a2..ff9b90b 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -189,7 +189,7 @@
> #address-cells = <0>;
>
> reg = <0x10139000 0x1000>,
> - <0x1013a000 0x1000>,
> + <0x1013a000 0x2000>,
> <0x1013c000 0x2000>,
> <0x1013e000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
> index 9d3aee5..9dff822 100644
> --- a/arch/arm/boot/dts/rk322x.dtsi
> +++ b/arch/arm/boot/dts/rk322x.dtsi
> @@ -443,7 +443,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 4fad133..af46cba 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -1110,7 +1110,7 @@
> #address-cells = <0>;
>
> reg = <0xffc01000 0x1000>,
> - <0xffc02000 0x1000>,
> + <0xffc02000 0x2000>,
> <0xffc04000 0x2000>,
> <0xffc06000 0x2000>;
> interrupts = <GIC_PPI 9 0xf04>;
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index 2b26175..6ed505a 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -861,7 +861,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> index f7db067..3c24832 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -1686,9 +1686,9 @@
> };
>
> gic: interrupt-controller@01c81000 {
> - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> index e4991a7..49dfe86 100644
> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> @@ -489,7 +489,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index d3473f8..04c3fdd 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -217,7 +217,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 6c14a6f..292abd0 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -580,7 +580,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
> index 979ad1a..b7b5831 100644
> --- a/arch/arm/boot/dts/sun9i-a80.dtsi
> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
> @@ -613,7 +613,7 @@
> gic: interrupt-controller@01c41000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c41000 0x1000>,
> - <0x01c42000 0x1000>,
> + <0x01c42000 0x2000>,
> <0x01c44000 0x2000>,
> <0x01c46000 0x2000>;
> interrupt-controller;
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
2017-01-18 11:25 ` Heiko Stübner
2017-01-18 11:29 ` Matthias Brugger
@ 2017-01-18 11:57 ` Robin Murphy
2017-01-18 13:25 ` Marc Zyngier
2017-01-18 12:49 ` Antoine Tenart
` (5 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Robin Murphy @ 2017-01-18 11:57 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, devicetree, linux-arm-kernel
Cc: Mark Rutland, Heiko Stuebner, Tony Lindgren, arm, Magnus Damm,
Russell King, Krzysztof Kozlowski, Javier Martinez Canillas,
Chen-Yu Tsai, Kukjin Kim, Tsahee Zidenberg, Jason Cooper,
Simon Horman, Santosh Shilimkar, Matthias Brugger,
Thomas Gleixner, Sascha Hauer, Antoine Tenart, Rob Herring,
Benoît Cousson, Fabio Estevam, Maxime Ripard, Shawn Guo
On 18/01/17 10:53, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
where
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
everyone
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
[...]
> diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
> index 63c7cf0..07bf300 100644
> --- a/arch/arm/boot/dts/keystone-k2g.dtsi
> +++ b/arch/arm/boot/dts/keystone-k2g.dtsi
> @@ -45,7 +45,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index 02708ba..aaff6816 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -35,7 +35,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
FWIW I happen to have some public Keystone TRMs handy from my DMA offset
investigations, and both K2G and K2H explicitly say it's a GIC-400 too.
Robin.
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps
2017-01-18 10:53 [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Marc Zyngier
2017-01-18 10:53 ` [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC Marc Zyngier
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
@ 2017-01-18 12:34 ` Arnd Bergmann
2017-01-18 13:07 ` Marc Zyngier
2 siblings, 1 reply; 18+ messages in thread
From: Arnd Bergmann @ 2017-01-18 12:34 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Heiko Stuebner,
Maxime Ripard, Chen-Yu Tsai, arm
On Wednesday, January 18, 2017 10:53:29 AM CET Marc Zyngier wrote:
> For a GICv2 (which happens to be virtualization capable), the
> architecture mandates the following regions:
>
> GICD: 4kB
> GICC: 8kB
> GICH: 8kB
> GICV: 8kB
>
> Unfortunately, I made a mistake in one of the examples contained in
> the DT binding document, and everyone duplicated that same mistake all
> over the map.
>
> This small series fixes the DT binding, and hopefully updates all the
> offending DTs to be compliant with the architecture.
>
Looks good to me, can you send this as a pull request to arm@kernel.org
once you have collected a reasonable number of Acks?
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (2 preceding siblings ...)
2017-01-18 11:57 ` Robin Murphy
@ 2017-01-18 12:49 ` Antoine Tenart
2017-01-18 13:23 ` Maxime Ripard
` (4 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Antoine Tenart @ 2017-01-18 12:49 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Heiko Stuebner,
Maxime Ripard, Chen-Yu Tsai, arm
[-- Attachment #1: Type: text/plain, Size: 21716 bytes --]
Hello Mark,
On Wed, Jan 18, 2017 at 10:53:31AM +0000, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/alpine.dtsi | 2 +-
For the Alpine SoC,
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Thanks!
> arch/arm/boot/dts/axm55xx.dtsi | 2 +-
> arch/arm/boot/dts/dra7.dtsi | 2 +-
> arch/arm/boot/dts/ecx-2000.dts | 2 +-
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos5.dtsi | 2 +-
> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
> arch/arm/boot/dts/exynos5440.dtsi | 2 +-
> arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
> arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
> arch/arm/boot/dts/keystone.dtsi | 2 +-
> arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
> arch/arm/boot/dts/mt2701.dtsi | 2 +-
> arch/arm/boot/dts/mt6580.dtsi | 2 +-
> arch/arm/boot/dts/mt6589.dtsi | 2 +-
> arch/arm/boot/dts/mt7623.dtsi | 2 +-
> arch/arm/boot/dts/mt8127.dtsi | 2 +-
> arch/arm/boot/dts/mt8135.dtsi | 2 +-
> arch/arm/boot/dts/omap5.dtsi | 2 +-
> arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
> arch/arm/boot/dts/r8a7743.dtsi | 2 +-
> arch/arm/boot/dts/r8a7745.dtsi | 2 +-
> arch/arm/boot/dts/r8a7790.dtsi | 2 +-
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> arch/arm/boot/dts/r8a7792.dtsi | 2 +-
> arch/arm/boot/dts/r8a7793.dtsi | 2 +-
> arch/arm/boot/dts/r8a7794.dtsi | 2 +-
> arch/arm/boot/dts/rk1108.dtsi | 2 +-
> arch/arm/boot/dts/rk3036.dtsi | 2 +-
> arch/arm/boot/dts/rk322x.dtsi | 2 +-
> arch/arm/boot/dts/rk3288.dtsi | 2 +-
> arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
> arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
> arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
> 37 files changed, 40 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
> index db8752f..d0eefc3 100644
> --- a/arch/arm/boot/dts/alpine.dtsi
> +++ b/arch/arm/boot/dts/alpine.dtsi
> @@ -93,7 +93,7 @@
> interrupt-controller;
> reg = <0x0 0xfb001000 0x0 0x1000>,
> <0x0 0xfb002000 0x0 0x2000>,
> - <0x0 0xfb004000 0x0 0x1000>,
> + <0x0 0xfb004000 0x0 0x2000>,
> <0x0 0xfb006000 0x0 0x2000>;
> interrupts =
> <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
> index a9d6d59..47799f5 100644
> --- a/arch/arm/boot/dts/axm55xx.dtsi
> +++ b/arch/arm/boot/dts/axm55xx.dtsi
> @@ -62,7 +62,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0x20 0x01001000 0 0x1000>,
> - <0x20 0x01002000 0 0x1000>,
> + <0x20 0x01002000 0 0x2000>,
> <0x20 0x01004000 0 0x2000>,
> <0x20 0x01006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 1faf24a..a9ffa49 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -57,7 +57,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
> reg = <0x0 0x48211000 0x0 0x1000>,
> - <0x0 0x48212000 0x0 0x1000>,
> + <0x0 0x48212000 0x0 0x2000>,
> <0x0 0x48214000 0x0 0x2000>,
> <0x0 0x48216000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
> index 2ccbb57f..c15e7e0 100644
> --- a/arch/arm/boot/dts/ecx-2000.dts
> +++ b/arch/arm/boot/dts/ecx-2000.dts
> @@ -99,7 +99,7 @@
> interrupt-controller;
> interrupts = <1 9 0xf04>;
> reg = <0xfff11000 0x1000>,
> - <0xfff12000 0x1000>,
> + <0xfff12000 0x2000>,
> <0xfff14000 0x2000>,
> <0xfff16000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index ba17ee1..9c28ef4 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -234,7 +234,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 7fd870e..678c08e 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -94,7 +94,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
> index 5818718..5e88c96 100644
> --- a/arch/arm/boot/dts/exynos5260.dtsi
> +++ b/arch/arm/boot/dts/exynos5260.dtsi
> @@ -167,7 +167,7 @@
> #size-cells = <0>;
> interrupt-controller;
> reg = <0x10481000 0x1000>,
> - <0x10482000 0x1000>,
> + <0x10482000 0x2000>,
> <0x10484000 0x2000>,
> <0x10486000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
> index 2a2e570..77d35bb 100644
> --- a/arch/arm/boot/dts/exynos5440.dtsi
> +++ b/arch/arm/boot/dts/exynos5440.dtsi
> @@ -40,7 +40,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x2E1000 0x1000>,
> - <0x2E2000 0x1000>,
> + <0x2E2000 0x2000>,
> <0x2E4000 0x2000>,
> <0x2E6000 0x2000>;
> interrupts = <GIC_PPI 9
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 39845a7..ac5371a 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -91,11 +91,11 @@
> };
>
> intc: interrupt-controller@00a01000 {
> - compatible = "arm,cortex-a7-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic";
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x00a01000 0x1000>,
> - <0x00a02000 0x1000>,
> + <0x00a02000 0x2000>,
> <0x00a04000 0x2000>,
> <0x00a06000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
> index 63c7cf0..07bf300 100644
> --- a/arch/arm/boot/dts/keystone-k2g.dtsi
> +++ b/arch/arm/boot/dts/keystone-k2g.dtsi
> @@ -45,7 +45,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index 02708ba..aaff6816 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -35,7 +35,7 @@
> interrupt-controller;
> reg = <0x0 0x02561000 0x0 0x1000>,
> <0x0 0x02562000 0x0 0x2000>,
> - <0x0 0x02564000 0x0 0x1000>,
> + <0x0 0x02564000 0x0 0x2000>,
> <0x0 0x02566000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 282d854..45ea57f 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -110,11 +110,11 @@
> ranges;
>
> gic: interrupt-controller@1400000 {
> - compatible = "arm,cortex-a7-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic";
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x0 0x1401000 0x0 0x1000>,
> - <0x0 0x1402000 0x0 0x1000>,
> + <0x0 0x1402000 0x0 0x2000>,
> <0x0 0x1404000 0x0 0x2000>,
> <0x0 0x1406000 0x0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 7eab6f4..454d099 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -170,7 +170,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
> index 06fdf6c..a349dba 100644
> --- a/arch/arm/boot/dts/mt6580.dtsi
> +++ b/arch/arm/boot/dts/mt6580.dtsi
> @@ -91,7 +91,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0x10211000 0x1000>,
> - <0x10212000 0x1000>,
> + <0x10212000 0x2000>,
> <0x10214000 0x2000>,
> <0x10216000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
> index 88b3cb1..0d6f60a 100644
> --- a/arch/arm/boot/dts/mt6589.dtsi
> +++ b/arch/arm/boot/dts/mt6589.dtsi
> @@ -102,7 +102,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0x10211000 0x1000>,
> - <0x10212000 0x1000>,
> + <0x10212000 0x2000>,
> <0x10214000 0x2000>,
> <0x10216000 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
> index fd2b614..19a54a3 100644
> --- a/arch/arm/boot/dts/mt7623.dtsi
> +++ b/arch/arm/boot/dts/mt7623.dtsi
> @@ -104,7 +104,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
> index 52086c8..916c095 100644
> --- a/arch/arm/boot/dts/mt8127.dtsi
> +++ b/arch/arm/boot/dts/mt8127.dtsi
> @@ -129,7 +129,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
> index 1d7f92b..a97b4ee 100644
> --- a/arch/arm/boot/dts/mt8135.dtsi
> +++ b/arch/arm/boot/dts/mt8135.dtsi
> @@ -221,7 +221,7 @@
> #interrupt-cells = <3>;
> interrupt-parent = <&gic>;
> reg = <0 0x10211000 0 0x1000>,
> - <0 0x10212000 0 0x1000>,
> + <0 0x10212000 0 0x2000>,
> <0 0x10214000 0 0x2000>,
> <0 0x10216000 0 0x2000>;
> };
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 7cd92ba..71b4809 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -92,7 +92,7 @@
> interrupt-controller;
> #interrupt-cells = <3>;
> reg = <0 0x48211000 0 0x1000>,
> - <0 0x48212000 0 0x1000>,
> + <0 0x48212000 0 0x2000>,
> <0 0x48214000 0 0x2000>,
> <0 0x48216000 0 0x2000>;
> interrupt-parent = <&gic>;
> diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
> index 53183ff..14a66ca 100644
> --- a/arch/arm/boot/dts/r8a73a4.dtsi
> +++ b/arch/arm/boot/dts/r8a73a4.dtsi
> @@ -465,7 +465,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
> index 216cb1f..172a944 100644
> --- a/arch/arm/boot/dts/r8a7743.dtsi
> +++ b/arch/arm/boot/dts/r8a7743.dtsi
> @@ -55,7 +55,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
> index 0b2e2f3..7390ec0 100644
> --- a/arch/arm/boot/dts/r8a7745.dtsi
> +++ b/arch/arm/boot/dts/r8a7745.dtsi
> @@ -55,7 +55,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 0c8900d..ac38764 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -183,7 +183,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
> index 8721466..28039db 100644
> --- a/arch/arm/boot/dts/r8a7791.dtsi
> +++ b/arch/arm/boot/dts/r8a7791.dtsi
> @@ -114,7 +114,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index 6ced3c1..1ed5c88 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -88,7 +88,7 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index 2fb527c..934c097 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -105,7 +105,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
> index fb576db..09f7823 100644
> --- a/arch/arm/boot/dts/r8a7794.dtsi
> +++ b/arch/arm/boot/dts/r8a7794.dtsi
> @@ -71,7 +71,7 @@
> #address-cells = <0>;
> interrupt-controller;
> reg = <0 0xf1001000 0 0x1000>,
> - <0 0xf1002000 0 0x1000>,
> + <0 0xf1002000 0 0x2000>,
> <0 0xf1004000 0 0x2000>,
> <0 0xf1006000 0 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk1108.dtsi b/arch/arm/boot/dts/rk1108.dtsi
> index d770023..d6194bf 100644
> --- a/arch/arm/boot/dts/rk1108.dtsi
> +++ b/arch/arm/boot/dts/rk1108.dtsi
> @@ -215,7 +215,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 4ed49a2..ff9b90b 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -189,7 +189,7 @@
> #address-cells = <0>;
>
> reg = <0x10139000 0x1000>,
> - <0x1013a000 0x1000>,
> + <0x1013a000 0x2000>,
> <0x1013c000 0x2000>,
> <0x1013e000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
> index 9d3aee5..9dff822 100644
> --- a/arch/arm/boot/dts/rk322x.dtsi
> +++ b/arch/arm/boot/dts/rk322x.dtsi
> @@ -443,7 +443,7 @@
> #address-cells = <0>;
>
> reg = <0x32011000 0x1000>,
> - <0x32012000 0x1000>,
> + <0x32012000 0x2000>,
> <0x32014000 0x2000>,
> <0x32016000 0x2000>;
> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 4fad133..af46cba 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -1110,7 +1110,7 @@
> #address-cells = <0>;
>
> reg = <0xffc01000 0x1000>,
> - <0xffc02000 0x1000>,
> + <0xffc02000 0x2000>,
> <0xffc04000 0x2000>,
> <0xffc06000 0x2000>;
> interrupts = <GIC_PPI 9 0xf04>;
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index 2b26175..6ed505a 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -861,7 +861,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> index f7db067..3c24832 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -1686,9 +1686,9 @@
> };
>
> gic: interrupt-controller@01c81000 {
> - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> + compatible = "arm,gic-400", "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> index e4991a7..49dfe86 100644
> --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
> @@ -489,7 +489,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index d3473f8..04c3fdd 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -217,7 +217,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 6c14a6f..292abd0 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -580,7 +580,7 @@
> gic: interrupt-controller@01c81000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c81000 0x1000>,
> - <0x01c82000 0x1000>,
> + <0x01c82000 0x2000>,
> <0x01c84000 0x2000>,
> <0x01c86000 0x2000>;
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
> index 979ad1a..b7b5831 100644
> --- a/arch/arm/boot/dts/sun9i-a80.dtsi
> +++ b/arch/arm/boot/dts/sun9i-a80.dtsi
> @@ -613,7 +613,7 @@
> gic: interrupt-controller@01c41000 {
> compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> reg = <0x01c41000 0x1000>,
> - <0x01c42000 0x1000>,
> + <0x01c42000 0x2000>,
> <0x01c44000 0x2000>,
> <0x01c46000 0x2000>;
> interrupt-controller;
> --
> 2.1.4
>
--
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 801 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps
2017-01-18 12:34 ` [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Arnd Bergmann
@ 2017-01-18 13:07 ` Marc Zyngier
2017-01-19 17:08 ` Tony Lindgren
0 siblings, 1 reply; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 13:07 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Heiko Stuebner,
Maxime Ripard, Chen-Yu Tsai, arm
On 18/01/17 12:34, Arnd Bergmann wrote:
> On Wednesday, January 18, 2017 10:53:29 AM CET Marc Zyngier wrote:
>> For a GICv2 (which happens to be virtualization capable), the
>> architecture mandates the following regions:
>>
>> GICD: 4kB
>> GICC: 8kB
>> GICH: 8kB
>> GICV: 8kB
>>
>> Unfortunately, I made a mistake in one of the examples contained in
>> the DT binding document, and everyone duplicated that same mistake all
>> over the map.
>>
>> This small series fixes the DT binding, and hopefully updates all the
>> offending DTs to be compliant with the architecture.
>>
>
> Looks good to me, can you send this as a pull request to arm@kernel.org
> once you have collected a reasonable number of Acks?
Sure, will do.
> Acked-by: Arnd Bergmann <arnd@arndb.de>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (3 preceding siblings ...)
2017-01-18 12:49 ` Antoine Tenart
@ 2017-01-18 13:23 ` Maxime Ripard
2017-01-18 14:09 ` Krzysztof Kozlowski
` (3 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Maxime Ripard @ 2017-01-18 13:23 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Heiko Stuebner,
Chen-Yu Tsai, arm
[-- Attachment #1: Type: text/plain, Size: 874 bytes --]
On Wed, Jan 18, 2017 at 10:53:31AM +0000, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 801 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 11:57 ` Robin Murphy
@ 2017-01-18 13:25 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 13:25 UTC (permalink / raw)
To: Robin Murphy, linux-kernel, devicetree, linux-arm-kernel
Cc: Mark Rutland, Heiko Stuebner, Tony Lindgren, arm, Magnus Damm,
Russell King, Krzysztof Kozlowski, Javier Martinez Canillas,
Chen-Yu Tsai, Kukjin Kim, Tsahee Zidenberg, Jason Cooper,
Simon Horman, Santosh Shilimkar, Matthias Brugger,
Thomas Gleixner, Sascha Hauer, Antoine Tenart, Rob Herring,
Benoît Cousson, Fabio Estevam, Maxime Ripard, Shawn Guo
On 18/01/17 11:57, Robin Murphy wrote:
> On 18/01/17 10:53, Marc Zyngier wrote:
>> Since everybody copied my own mistake from the DT binding example,
>> let's address all the offenders in one swift go.
>>
>> Most of them got the CPU interface size wrong (4kB, while it should
>> be 8kB), except for both keystone platforms which got the control
>> interface wrong (4kB instead of 8kB).
>>
>> In the couple of cases were I knew for sure what implementation
>
> where
>
>> was used, I've added the "arm,gic-400" compatible string. I'm 99%
>> sure that this is what everyong is using, but short of having the
>
> everyone
>
>> TRM for all the other SoCs, I've let them alone.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
> [...]
>> diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
>> index 63c7cf0..07bf300 100644
>> --- a/arch/arm/boot/dts/keystone-k2g.dtsi
>> +++ b/arch/arm/boot/dts/keystone-k2g.dtsi
>> @@ -45,7 +45,7 @@
>> interrupt-controller;
>> reg = <0x0 0x02561000 0x0 0x1000>,
>> <0x0 0x02562000 0x0 0x2000>,
>> - <0x0 0x02564000 0x0 0x1000>,
>> + <0x0 0x02564000 0x0 0x2000>,
>> <0x0 0x02566000 0x0 0x2000>;
>> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
>> IRQ_TYPE_LEVEL_HIGH)>;
>> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
>> index 02708ba..aaff6816 100644
>> --- a/arch/arm/boot/dts/keystone.dtsi
>> +++ b/arch/arm/boot/dts/keystone.dtsi
>> @@ -35,7 +35,7 @@
>> interrupt-controller;
>> reg = <0x0 0x02561000 0x0 0x1000>,
>> <0x0 0x02562000 0x0 0x2000>,
>> - <0x0 0x02564000 0x0 0x1000>,
>> + <0x0 0x02564000 0x0 0x2000>,
>> <0x0 0x02566000 0x0 0x2000>;
>> interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
>> IRQ_TYPE_LEVEL_HIGH)>;
>
> FWIW I happen to have some public Keystone TRMs handy from my DMA offset
> investigations, and both K2G and K2H explicitly say it's a GIC-400 too.
Ah, brilliant. I'll update the patch accordingly.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (4 preceding siblings ...)
2017-01-18 13:23 ` Maxime Ripard
@ 2017-01-18 14:09 ` Krzysztof Kozlowski
2017-01-18 15:16 ` Javier Martinez Canillas
` (2 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-18 14:09 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Matthias Brugger, Simon Horman, Magnus Damm, Heiko Stuebner,
Maxime Ripard, Chen-Yu Tsai, arm
On Wed, Jan 18, 2017 at 10:53:31AM +0000, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/alpine.dtsi | 2 +-
> arch/arm/boot/dts/axm55xx.dtsi | 2 +-
> arch/arm/boot/dts/dra7.dtsi | 2 +-
> arch/arm/boot/dts/ecx-2000.dts | 2 +-
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos5.dtsi | 2 +-
> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
> arch/arm/boot/dts/exynos5440.dtsi | 2 +-
For Exynos:
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
> arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
> arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
> arch/arm/boot/dts/keystone.dtsi | 2 +-
> arch/arm/boot/dts/ls1021a.dtsi | 4 ++--
> arch/arm/boot/dts/mt2701.dtsi | 2 +-
> arch/arm/boot/dts/mt6580.dtsi | 2 +-
> arch/arm/boot/dts/mt6589.dtsi | 2 +-
> arch/arm/boot/dts/mt7623.dtsi | 2 +-
> arch/arm/boot/dts/mt8127.dtsi | 2 +-
> arch/arm/boot/dts/mt8135.dtsi | 2 +-
> arch/arm/boot/dts/omap5.dtsi | 2 +-
> arch/arm/boot/dts/r8a73a4.dtsi | 2 +-
> arch/arm/boot/dts/r8a7743.dtsi | 2 +-
> arch/arm/boot/dts/r8a7745.dtsi | 2 +-
> arch/arm/boot/dts/r8a7790.dtsi | 2 +-
> arch/arm/boot/dts/r8a7791.dtsi | 2 +-
> arch/arm/boot/dts/r8a7792.dtsi | 2 +-
> arch/arm/boot/dts/r8a7793.dtsi | 2 +-
> arch/arm/boot/dts/r8a7794.dtsi | 2 +-
> arch/arm/boot/dts/rk1108.dtsi | 2 +-
> arch/arm/boot/dts/rk3036.dtsi | 2 +-
> arch/arm/boot/dts/rk322x.dtsi | 2 +-
> arch/arm/boot/dts/rk3288.dtsi | 2 +-
> arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
> arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-h3.dtsi | 2 +-
> arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
> 37 files changed, 40 insertions(+), 40 deletions(-)
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (5 preceding siblings ...)
2017-01-18 14:09 ` Krzysztof Kozlowski
@ 2017-01-18 15:16 ` Javier Martinez Canillas
2017-01-18 15:26 ` Marc Zyngier
2017-01-18 16:39 ` Santosh Shilimkar
2017-01-23 9:58 ` Shawn Guo
8 siblings, 1 reply; 18+ messages in thread
From: Javier Martinez Canillas @ 2017-01-18 15:16 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Matthias Brugger, Simon Horman, Magnus Damm,
Heiko Stuebner, Maxime Ripard, Chen-Yu Tsai, arm
Hello Marc,
On 01/18/2017 07:53 AM, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
> arch/arm/boot/dts/exynos5.dtsi | 2 +-
> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
> arch/arm/boot/dts/exynos5440.dtsi | 2 +-
I've looked at the Exynos5250 and Exynos5420 TRM and both say that adopts
GIC-400, so I think it's safe for you to also update the compatible in the
exynos5.dtsi. Unfortunately I don't have manuals for 3250, 5260 and 5440.
The register map changes looks good to me, so for Exynos:
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 15:16 ` Javier Martinez Canillas
@ 2017-01-18 15:26 ` Marc Zyngier
0 siblings, 0 replies; 18+ messages in thread
From: Marc Zyngier @ 2017-01-18 15:26 UTC (permalink / raw)
To: Javier Martinez Canillas, linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Matthias Brugger, Simon Horman, Magnus Damm,
Heiko Stuebner, Maxime Ripard, Chen-Yu Tsai, arm
On 18/01/17 15:16, Javier Martinez Canillas wrote:
> Hello Marc,
>
> On 01/18/2017 07:53 AM, Marc Zyngier wrote:
>> Since everybody copied my own mistake from the DT binding example,
>> let's address all the offenders in one swift go.
>>
>> Most of them got the CPU interface size wrong (4kB, while it should
>> be 8kB), except for both keystone platforms which got the control
>> interface wrong (4kB instead of 8kB).
>>
>> In the couple of cases were I knew for sure what implementation
>> was used, I've added the "arm,gic-400" compatible string. I'm 99%
>> sure that this is what everyong is using, but short of having the
>> TRM for all the other SoCs, I've let them alone.
>>
>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>> ---
>> arch/arm/boot/dts/exynos3250.dtsi | 2 +-
>> arch/arm/boot/dts/exynos5.dtsi | 2 +-
>> arch/arm/boot/dts/exynos5260.dtsi | 2 +-
>> arch/arm/boot/dts/exynos5440.dtsi | 2 +-
>
> I've looked at the Exynos5250 and Exynos5420 TRM and both say that adopts
> GIC-400, so I think it's safe for you to also update the compatible in the
> exynos5.dtsi. Unfortunately I don't have manuals for 3250, 5260 and 5440.
Thanks for taking the time to find out, I'll update the patch.
>
> The register map changes looks good to me, so for Exynos:
>
> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Thank you.
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (6 preceding siblings ...)
2017-01-18 15:16 ` Javier Martinez Canillas
@ 2017-01-18 16:39 ` Santosh Shilimkar
2017-01-23 9:58 ` Shawn Guo
8 siblings, 0 replies; 18+ messages in thread
From: Santosh Shilimkar @ 2017-01-18 16:39 UTC (permalink / raw)
To: Marc Zyngier, linux-kernel, devicetree, linux-arm-kernel
Cc: Thomas Gleixner, Jason Cooper, Rob Herring, Mark Rutland,
Tsahee Zidenberg, Antoine Tenart, Russell King,
Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
On 1/18/2017 2:53 AM, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
> arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
> arch/arm/boot/dts/keystone.dtsi | 2 +-
For keystone bits,
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
2017-01-18 10:53 ` [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC Marc Zyngier
@ 2017-01-19 14:40 ` Mark Rutland
0 siblings, 0 replies; 18+ messages in thread
From: Mark Rutland @ 2017-01-19 14:40 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Tsahee Zidenberg, Antoine Tenart,
Russell King, Benoît Cousson, Tony Lindgren, Kukjin Kim,
Krzysztof Kozlowski, Javier Martinez Canillas, Shawn Guo,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
On Wed, Jan 18, 2017 at 10:53:30AM +0000, Marc Zyngier wrote:
> The joys of copy/paste: the example of a virtualization capable GIC
> in the DT binding was wrong, and propagated to dozens of platforms.
Could you please mention what's wrong (i.e. GICC is impossibly small in
the example).
>
> Oh well. Let's fix the source of the crap before tackling individual
> offenders.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
> index 5393e2a..a3d51ed 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
> @@ -107,11 +107,11 @@ Required properties:
> Example:
>
> interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic";
> + compatible = "arm,gic-400";
I'm happy with this change in the spirit of making this more generally
applicable, even if it's not a bug as such. Please mention this as a
related cleanup in the commit message.
With those fixed up:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Thanks,
Mark.
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x2c001000 0x1000>,
> - <0x2c002000 0x1000>,
> + <0x2c002000 0x2000>,
> <0x2c004000 0x2000>,
> <0x2c006000 0x2000>;
> interrupts = <1 9 0xf04>;
> --
> 2.1.4
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps
2017-01-18 13:07 ` Marc Zyngier
@ 2017-01-19 17:08 ` Tony Lindgren
0 siblings, 0 replies; 18+ messages in thread
From: Tony Lindgren @ 2017-01-19 17:08 UTC (permalink / raw)
To: Marc Zyngier
Cc: Arnd Bergmann, Mark Rutland, Heiko Stuebner, arm, Magnus Damm,
Russell King, Krzysztof Kozlowski, Javier Martinez Canillas,
Chen-Yu Tsai, Kukjin Kim, Tsahee Zidenberg, devicetree,
Jason Cooper, Simon Horman, Santosh Shilimkar, Matthias Brugger,
Thomas Gleixner, Sascha Hauer, linux-arm-kernel, Antoine Tenart,
linux-kernel, Rob Herring, Benoît Cousson, Fabio Estevam,
Maxime Ripard, Shawn Guo
* Marc Zyngier <marc.zyngier@arm.com> [170118 05:09]:
> On 18/01/17 12:34, Arnd Bergmann wrote:
> > On Wednesday, January 18, 2017 10:53:29 AM CET Marc Zyngier wrote:
> >> For a GICv2 (which happens to be virtualization capable), the
> >> architecture mandates the following regions:
> >>
> >> GICD: 4kB
> >> GICC: 8kB
> >> GICH: 8kB
> >> GICV: 8kB
> >>
> >> Unfortunately, I made a mistake in one of the examples contained in
> >> the DT binding document, and everyone duplicated that same mistake all
> >> over the map.
> >>
> >> This small series fixes the DT binding, and hopefully updates all the
> >> offending DTs to be compliant with the architecture.
> >>
> >
> > Looks good to me, can you send this as a pull request to arm@kernel.org
> > once you have collected a reasonable number of Acks?
>
> Sure, will do.
>
> > Acked-by: Arnd Bergmann <arnd@arndb.de>
Here's yet another ack to paste for both patches:
Acked-by: Tony Lindgren <tony@atomide.com>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/2] ARM: DTS: Fix register map for virt-capable GIC
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
` (7 preceding siblings ...)
2017-01-18 16:39 ` Santosh Shilimkar
@ 2017-01-23 9:58 ` Shawn Guo
8 siblings, 0 replies; 18+ messages in thread
From: Shawn Guo @ 2017-01-23 9:58 UTC (permalink / raw)
To: Marc Zyngier
Cc: linux-kernel, devicetree, linux-arm-kernel, Thomas Gleixner,
Jason Cooper, Rob Herring, Mark Rutland, Tsahee Zidenberg,
Antoine Tenart, Russell King, Benoît Cousson, Tony Lindgren,
Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas,
Sascha Hauer, Fabio Estevam, Santosh Shilimkar, Matthias Brugger,
Simon Horman, Magnus Damm, Heiko Stuebner, Maxime Ripard,
Chen-Yu Tsai, arm
On Wed, Jan 18, 2017 at 10:53:31AM +0000, Marc Zyngier wrote:
> Since everybody copied my own mistake from the DT binding example,
> let's address all the offenders in one swift go.
>
> Most of them got the CPU interface size wrong (4kB, while it should
> be 8kB), except for both keystone platforms which got the control
> interface wrong (4kB instead of 8kB).
>
> In the couple of cases were I knew for sure what implementation
> was used, I've added the "arm,gic-400" compatible string. I'm 99%
> sure that this is what everyong is using, but short of having the
> TRM for all the other SoCs, I've let them alone.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 4 ++--
Acked-by: Shawn Guo <shawnguo@kernel.org>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2017-01-23 9:59 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-01-18 10:53 [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Marc Zyngier
2017-01-18 10:53 ` [PATCH 1/2] dt-bindings: arm,gic: Fix binding example for a virt-capable GIC Marc Zyngier
2017-01-19 14:40 ` Mark Rutland
2017-01-18 10:53 ` [PATCH 2/2] ARM: DTS: Fix register map for " Marc Zyngier
2017-01-18 11:25 ` Heiko Stübner
2017-01-18 11:29 ` Matthias Brugger
2017-01-18 11:57 ` Robin Murphy
2017-01-18 13:25 ` Marc Zyngier
2017-01-18 12:49 ` Antoine Tenart
2017-01-18 13:23 ` Maxime Ripard
2017-01-18 14:09 ` Krzysztof Kozlowski
2017-01-18 15:16 ` Javier Martinez Canillas
2017-01-18 15:26 ` Marc Zyngier
2017-01-18 16:39 ` Santosh Shilimkar
2017-01-23 9:58 ` Shawn Guo
2017-01-18 12:34 ` [PATCH 0/2] ARM: DTS: Fix broken GICv2 register maps Arnd Bergmann
2017-01-18 13:07 ` Marc Zyngier
2017-01-19 17:08 ` Tony Lindgren
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).