[PATCH v2 0/5] ARM64: Initial Realtek RTD1295 enablement

[PATCH v2 0/5] ARM64: Initial Realtek RTD1295 enablement

[Andreas Färber]

Hello,

This mini-series adds initial support for the Realtek RTD1295 SoC and
the Zidoo X9S TV box.

v2 does minor cleanups only.

With these patches CPU0 can be booted with earlycon.

PSCI doesn't work despite present in the vendor device tree; as enable-method
it instead used a custom "rtk-spin-table" that I sadly have no source code of.

The UARTs use a custom interrupt controller that I again lack source code of;
with interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH> it can boot into an initrd.

The boot process is slightly twisted: The files need to be loaded from a
32-bit U-Boot, then boot into 64-bit U-Boot where the kernel can be booted.
Similar to my previous Amlogic S905 work, the TEXT_OFFSET poses a problem, so
a uImage needs to be used (or the kernel patched) for load address 0x00280000.
I haven't succeeded loading an initrd via bootm/booti; but as quick workaround
initrd=$rootfs_loadaddr,0x$filesize can manually be specified in $bootargs.

Cf. https://en.opensuse.org/HCL:Zidoo_X9S

KVM appears to initialize okay, but was not yet tested with QEMU.

[    0.256947] kvm [1]: 8-bit VMID
[    0.256986] kvm [1]: IDMAP page: 73b000
[    0.257025] kvm [1]: HYP VA range: 800000000000:ffffffffffff
[    0.257458] kvm [1]: Hyp mode initialized successfully
[    0.257529] kvm [1]: virtual timer IRQ3

More experimental patches at:
https://github.com/afaerber/linux/commits/rtd1295-next

Have a lot of fun!

Cheers,
Andreas

v1 -> v2:
* Add Acked-bys
* Tweak DT subjects
* Reword DT bindings
* Drop one memreserve
* Add MAINTAINERS patch

Cc: Roc He <hepeng@zidoo.tv>
Cc: devicetree@vger.kernel.org

Andreas Färber (5):
  dt-bindings: Add vendor prefix for Zidoo
  dt-bindings: arm: Add Realtek RTD1295 bindings
  ARM64: Prepare Realtek RTD1295
  ARM64: dts: Prepare Realtek RTD1295 and Zidoo X9S
  MAINTAINERS: Add Realtek section

 Documentation/devicetree/bindings/arm/realtek.txt  |  20 +++
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 MAINTAINERS                                        |   7 +
 arch/arm64/Kconfig.platforms                       |   6 +
 arch/arm64/boot/dts/Makefile                       |   1 +
 arch/arm64/boot/dts/realtek/Makefile               |   5 +
 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts  |  78 ++++++++++
 arch/arm64/boot/dts/realtek/rtd1295.dtsi           | 162 +++++++++++++++++++++
 8 files changed, 280 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/realtek.txt
 create mode 100644 arch/arm64/boot/dts/realtek/Makefile
 create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
 create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi

-- 
2.10.2

[PATCH v2 1/5] dt-bindings: Add vendor prefix for Zidoo

[Andreas Färber]

Zidoo is a Chinese manufacturer of TV boxes.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Roc He <hepeng@zidoo.tv>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Changed subject
 * Extended commit message
 
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index a76b981..2776651 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -343,6 +343,7 @@ xlnx	Xilinx
 xunlong	Shenzhen Xunlong Software CO.,Limited
 zarlink	Zarlink Semiconductor
 zeitec	ZEITEC Semiconductor Co., LTD.
+zidoo	Shenzhen Zidoo Technology Co., Ltd.
 zii	Zodiac Inflight Innovations
 zte	ZTE Corp.
 zyxel	ZyXEL Communications Corp.
-- 
2.10.2

[PATCH v2 2/5] dt-bindings: arm: Add Realtek RTD1295 bindings

[Andreas Färber]

The Zidoo X9S and a few other recent TV boxes feature the Realtek RTD1295,
a quad-core ARM Cortex-A53 SoC.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Roc He <hepeng@zidoo.tv>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Changed subject
 * Extended commit message
 * Clarified wording
 
 Documentation/devicetree/bindings/arm/realtek.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/realtek.txt

diff --git a/Documentation/devicetree/bindings/arm/realtek.txt b/Documentation/devicetree/bindings/arm/realtek.txt
new file mode 100644
index 0000000..13d7557
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/realtek.txt
@@ -0,0 +1,20 @@
+Realtek platforms device tree bindings
+--------------------------------------
+
+
+RTD1295 SoC
+===========
+
+Required root node properties:
+
+ - compatible :  must contain "realtek,rtd1295"
+
+
+Root node property compatible must contain, depending on board:
+
+ - Zidoo X9S: "zidoo,x9s"
+
+
+Example:
+
+    compatible = "zidoo,x9s", "realtek,rtd1295";
-- 
2.10.2

[PATCH v2 3/5] ARM64: Prepare Realtek RTD1295

[Andreas Färber]

Add a Kconfig option ARCH_REALTEK.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: unchanged
 
 arch/arm64/Kconfig.platforms | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 129cc5a..2fa9557 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -118,6 +118,12 @@ config ARCH_QCOM
 	help
 	  This enables support for the ARMv8 based Qualcomm chipsets.
 
+config ARCH_REALTEK
+	bool "Realtek Platforms"
+	help
+	  This enables support for the ARMv8 based Realtek chipsets,
+	  like the RTD1295.
+
 config ARCH_ROCKCHIP
 	bool "Rockchip Platforms"
 	select ARCH_HAS_RESET_CONTROLLER
-- 
2.10.2

[PATCH v2 4/5] ARM64: dts: Prepare Realtek RTD1295 and Zidoo X9S

[Andreas Färber]

Add initial device trees for the RTD1295 SoC and the Zidoo X9S TV box.

The CPUs lack the enable-method property because the vendor device tree
uses a custom "rtk-spin-table" method and "psci" did not appear to work.

The UARTs lack the interrupts properties because the vendor device tree
connects them to a custom interrupt controller. earlycon works without.

A list of memory reservations is adopted from v1.2.11 vendor device tree:
0x02200000 can be used for an initrd, 0x01b00000 is audio-related;
ion-related 0x02600000, 0x02c00000 and 0x11000000 are left out;
0x10000000 is used for sharing the U-Boot environment; others remain
to be investigated.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Dropped 0x0000000010000000 /memreserve/
 
 arch/arm64/boot/dts/Makefile                      |   1 +
 arch/arm64/boot/dts/realtek/Makefile              |   5 +
 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts |  78 +++++++++++
 arch/arm64/boot/dts/realtek/rtd1295.dtsi          | 162 ++++++++++++++++++++++
 4 files changed, 246 insertions(+)
 create mode 100644 arch/arm64/boot/dts/realtek/Makefile
 create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
 create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 080232b..78f7991 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -14,6 +14,7 @@ dts-dirs += marvell
 dts-dirs += mediatek
 dts-dirs += nvidia
 dts-dirs += qcom
+dts-dirs += realtek
 dts-dirs += renesas
 dts-dirs += rockchip
 dts-dirs += socionext
diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
new file mode 100644
index 0000000..8521e92
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/Makefile
@@ -0,0 +1,5 @@
+dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
+
+always		:= $(dtb-y)
+subdir-y	:= $(dts-dirs)
+clean-files	:= *.dtb
diff --git a/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
new file mode 100644
index 0000000..53302bb
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+/memreserve/	0x0000000000000000 0x0000000000030000;
+/memreserve/	0x000000000001f000 0x0000000000001000;
+/memreserve/	0x0000000000030000 0x00000000000d0000;
+/memreserve/	0x0000000001b00000 0x00000000004be000;
+/memreserve/	0x0000000001ffe000 0x0000000000004000;
+
+#include "rtd1295.dtsi"
+
+/ {
+	compatible = "zidoo,x9s", "realtek,rtd1295";
+	model = "Zidoo X9S";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
new file mode 100644
index 0000000..ec81ceb
--- /dev/null
+++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi
@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "realtek,rtd1295";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			next-level-cache = <&l2>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x1>;
+			next-level-cache = <&l2>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x2>;
+			next-level-cache = <&l2>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x3>;
+			next-level-cache = <&l2>;
+		};
+
+		l2: l2-cache {
+			compatible = "cache";
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		tee@10100000 {
+			reg = <0x0 0x10100000 0x0 0xf00000>;
+			no-map;
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		uart0: serial@98007800 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x98007800 0x0 0x400>,
+			      <0x0 0x98007000 0x0 0x100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <27000000>;
+			status = "disabled";
+		};
+
+		uart1: serial@9801b200 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x9801b200 0x0 0x100>,
+			      <0x0 0x9801b00c 0x0 0x100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <432000000>;
+			status = "disabled";
+		};
+
+		uart2: serial@9801b400 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x0 0x9801b400 0x0 0x100>,
+			      <0x0 0x9801b00c 0x0 0x100>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <432000000>;
+			status = "disabled";
+		};
+
+		gic: interrupt-controller@ff011000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0xff011000 0x0 0x1000>,
+			      <0x0 0xff012000 0x0 0x1000>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+	};
+};
-- 
2.10.2

[PATCH v2 5/5] MAINTAINERS: Add Realtek section

[Andreas Färber]

Add myself as maintainer.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new
 
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index b9af886..16f4216 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1647,6 +1647,13 @@ M:	Lennert Buytenhek <kernel@wantstofly.org>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 
+ARM/REALTEK ARCHITECTURE
+M:	Andreas Färber <afaerber@suse.de>
+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:	Supported
+F:	arch/arm64/boot/dts/realtek/
+F:	Documentation/devicetree/bindings/arm/realtek.txt
+
 ARM/RENESAS ARM64 ARCHITECTURE
 M:	Simon Horman <horms@verge.net.au>
 M:	Magnus Damm <magnus.damm@gmail.com>
-- 
2.10.2

Re: [PATCH v2 2/5] dt-bindings: arm: Add Realtek RTD1295 bindings

[Rob Herring]

On Thu, Feb 23, 2017 at 05:45:49PM +0100, Andreas Färber wrote:
> The Zidoo X9S and a few other recent TV boxes feature the Realtek RTD1295,
> a quad-core ARM Cortex-A53 SoC.
> 
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> Acked-by: Roc He <hepeng@zidoo.tv>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Changed subject
>  * Extended commit message
>  * Clarified wording
>  
>  Documentation/devicetree/bindings/arm/realtek.txt | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/realtek.txt

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v2 4/5] ARM64: dts: Prepare Realtek RTD1295 and Zidoo X9S

[Rob Herring]

On Thu, Feb 23, 2017 at 05:45:51PM +0100, Andreas Färber wrote:
> Add initial device trees for the RTD1295 SoC and the Zidoo X9S TV box.
> 
> The CPUs lack the enable-method property because the vendor device tree
> uses a custom "rtk-spin-table" method and "psci" did not appear to work.
> 
> The UARTs lack the interrupts properties because the vendor device tree
> connects them to a custom interrupt controller. earlycon works without.
> 
> A list of memory reservations is adopted from v1.2.11 vendor device tree:
> 0x02200000 can be used for an initrd, 0x01b00000 is audio-related;
> ion-related 0x02600000, 0x02c00000 and 0x11000000 are left out;
> 0x10000000 is used for sharing the U-Boot environment; others remain
> to be investigated.
> 
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Dropped 0x0000000010000000 /memreserve/
>  
>  arch/arm64/boot/dts/Makefile                      |   1 +
>  arch/arm64/boot/dts/realtek/Makefile              |   5 +
>  arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts |  78 +++++++++++
>  arch/arm64/boot/dts/realtek/rtd1295.dtsi          | 162 ++++++++++++++++++++++
>  4 files changed, 246 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/realtek/Makefile
>  create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
>  create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi
> 
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 080232b..78f7991 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -14,6 +14,7 @@ dts-dirs += marvell
>  dts-dirs += mediatek
>  dts-dirs += nvidia
>  dts-dirs += qcom
> +dts-dirs += realtek
>  dts-dirs += renesas
>  dts-dirs += rockchip
>  dts-dirs += socionext
> diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
> new file mode 100644
> index 0000000..8521e92
> --- /dev/null
> +++ b/arch/arm64/boot/dts/realtek/Makefile
> @@ -0,0 +1,5 @@
> +dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
> +
> +always		:= $(dtb-y)
> +subdir-y	:= $(dts-dirs)
> +clean-files	:= *.dtb
> diff --git a/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
> new file mode 100644
> index 0000000..53302bb
> --- /dev/null
> +++ b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
> @@ -0,0 +1,78 @@
> +/*
> + * Copyright (c) 2016-2017 Andreas Färber
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.

You can use SPDX tag here instead.

> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;

Unless you have >4GB regions, you don't really need 2 cells here.

> +		ranges;
> +
> +		tee@10100000 {
> +			reg = <0x0 0x10100000 0x0 0xf00000>;
> +			no-map;
> +		};
> +	};


> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;

Same here. And use ranges to narrow the address space to what you need.

> +		ranges;
> +
> +		uart0: serial@98007800 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x0 0x98007800 0x0 0x400>,
> +			      <0x0 0x98007000 0x0 0x100>;
> +			reg-shift = <2>;
> +			reg-io-width = <4>;
> +			clock-frequency = <27000000>;
> +			status = "disabled";
> +		};
> +
> +		uart1: serial@9801b200 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x0 0x9801b200 0x0 0x100>,
> +			      <0x0 0x9801b00c 0x0 0x100>;
> +			reg-shift = <2>;
> +			reg-io-width = <4>;
> +			clock-frequency = <432000000>;
> +			status = "disabled";
> +		};
> +
> +		uart2: serial@9801b400 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x0 0x9801b400 0x0 0x100>,
> +			      <0x0 0x9801b00c 0x0 0x100>;
> +			reg-shift = <2>;
> +			reg-io-width = <4>;
> +			clock-frequency = <432000000>;
> +			status = "disabled";
> +		};
> +
> +		gic: interrupt-controller@ff011000 {
> +			compatible = "arm,gic-400";
> +			reg = <0x0 0xff011000 0x0 0x1000>,
> +			      <0x0 0xff012000 0x0 0x1000>;

You are missing some register ranges and the sizes may be wrong. Check 
the binding doc.

> +			interrupt-controller;
> +			#interrupt-cells = <3>;
> +		};
> +	};
> +};
> -- 
> 2.10.2
> 

Re: [PATCH v2 4/5] ARM64: dts: Prepare Realtek RTD1295 and Zidoo X9S

[Andreas Färber]

Am 28.02.2017 um 01:03 schrieb Rob Herring:
> On Thu, Feb 23, 2017 at 05:45:51PM +0100, Andreas Färber wrote:
>> Add initial device trees for the RTD1295 SoC and the Zidoo X9S TV box.
>>
>> The CPUs lack the enable-method property because the vendor device tree
>> uses a custom "rtk-spin-table" method and "psci" did not appear to work.
>>
>> The UARTs lack the interrupts properties because the vendor device tree
>> connects them to a custom interrupt controller. earlycon works without.
>>
>> A list of memory reservations is adopted from v1.2.11 vendor device tree:
>> 0x02200000 can be used for an initrd, 0x01b00000 is audio-related;
>> ion-related 0x02600000, 0x02c00000 and 0x11000000 are left out;
>> 0x10000000 is used for sharing the U-Boot environment; others remain
>> to be investigated.
>>
>> Acked-by: Arnd Bergmann <arnd@arndb.de>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
>> ---
>>  v1 -> v2:
>>  * Dropped 0x0000000010000000 /memreserve/
>>  
>>  arch/arm64/boot/dts/Makefile                      |   1 +
>>  arch/arm64/boot/dts/realtek/Makefile              |   5 +
>>  arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts |  78 +++++++++++
>>  arch/arm64/boot/dts/realtek/rtd1295.dtsi          | 162 ++++++++++++++++++++++
>>  4 files changed, 246 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/realtek/Makefile
>>  create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
>>  create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 080232b..78f7991 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -14,6 +14,7 @@ dts-dirs += marvell
>>  dts-dirs += mediatek
>>  dts-dirs += nvidia
>>  dts-dirs += qcom
>> +dts-dirs += realtek
>>  dts-dirs += renesas
>>  dts-dirs += rockchip
>>  dts-dirs += socionext
>> diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile
>> new file mode 100644
>> index 0000000..8521e92
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/realtek/Makefile
>> @@ -0,0 +1,5 @@
>> +dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
>> +
>> +always		:= $(dtb-y)
>> +subdir-y	:= $(dts-dirs)
>> +clean-files	:= *.dtb
>> diff --git a/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
>> new file mode 100644
>> index 0000000..53302bb
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts
>> @@ -0,0 +1,78 @@
>> +/*
>> + * Copyright (c) 2016-2017 Andreas Färber
>> + *
>> + * This file is dual-licensed: you can use it either under the terms
>> + * of the GPL or the X11 license, at your option. Note that this dual
>> + * licensing only applies to this file, and not this project as a
>> + * whole.
> 
> You can use SPDX tag here instead.

Already done. :)

>> +	reserved-memory {
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
> 
> Unless you have >4GB regions, you don't really need 2 cells here.

Correct, but using less cells than in the root node requires a ranges
mapping, and we don't have size information available for that. So I
would rather leave it like this initially.

>> +		ranges;
>> +
>> +		tee@10100000 {
>> +			reg = <0x0 0x10100000 0x0 0xf00000>;
>> +			no-map;
>> +		};
>> +	};
> 
> 
>> +	soc {
>> +		compatible = "simple-bus";
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
> 
> Same here. And use ranges to narrow the address space to what you need.

By my definition, SoC is the whole memory range.

And as pointed out in the v1 cover letter, I don't have sufficient
documentation for this chip - there's not even a general address map in
the datasheet, nor any bus information - so any attempt to restrict it
would be a wild guess and specific to the 2G .dts rather than suitable
for the generic .dtsi here.

If we had the info, I would still want to leave the soc node like this
and instead have bus sub-nodes with suitable ranges, like we did for
meson-gxbb. I don't see harm in having the .dts be a few cells larger.

>> +		ranges;
>> +
>> +		uart0: serial@98007800 {
>> +			compatible = "snps,dw-apb-uart";
>> +			reg = <0x0 0x98007800 0x0 0x400>,
>> +			      <0x0 0x98007000 0x0 0x100>;
>> +			reg-shift = <2>;
>> +			reg-io-width = <4>;
>> +			clock-frequency = <27000000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		uart1: serial@9801b200 {
>> +			compatible = "snps,dw-apb-uart";
>> +			reg = <0x0 0x9801b200 0x0 0x100>,
>> +			      <0x0 0x9801b00c 0x0 0x100>;
>> +			reg-shift = <2>;
>> +			reg-io-width = <4>;
>> +			clock-frequency = <432000000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		uart2: serial@9801b400 {
>> +			compatible = "snps,dw-apb-uart";
>> +			reg = <0x0 0x9801b400 0x0 0x100>,
>> +			      <0x0 0x9801b00c 0x0 0x100>;
>> +			reg-shift = <2>;
>> +			reg-io-width = <4>;
>> +			clock-frequency = <432000000>;
>> +			status = "disabled";
>> +		};
>> +
>> +		gic: interrupt-controller@ff011000 {
>> +			compatible = "arm,gic-400";
>> +			reg = <0x0 0xff011000 0x0 0x1000>,
>> +			      <0x0 0xff012000 0x0 0x1000>;
> 
> You are missing some register ranges and the sizes may be wrong. Check 
> the binding doc.

I have in the meantime tested that 1k, 2k, 2k, 2k plus PPI 9 lets KVM
initialize the vGIC:

[    0.256915] kvm [1]: 8-bit VMID
[    0.256951] kvm [1]: IDMAP page: 73f000
[    0.256986] kvm [1]: HYP VA range: 800000000000:ffffffffffff
[    0.257417] kvm [1]: Hyp mode initialized successfully
[    0.257479] kvm [1]: vgic-v2@ff014000
[    0.257554] kvm [1]: vgic interrupt IRQ1
[    0.257600] kvm [1]: virtual timer IRQ4

As usual, not yet tested with a guest for lack of proper rootfs.

Mark, is there any benefit in using a raw 0xf mask over a simple 4, when
there are only 4 CPUs? I tested the simple 4 copied from my S900,
whereas the timer based on the vendor device tree uses raw 0xf, i.e.,
simple 8. Should I change that to be consistently simple 4?

>> +			interrupt-controller;
>> +			#interrupt-cells = <3>;
>> +		};
>> +	};
>> +};

Additionally I am dropping the irq.h include, because arm-gic.h already
does that for us.

Regards,
Andreas

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