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From: Robert Richter <rric@kernel.org>
To: Geetha sowjanya <gakula@caviumnetworks.com>
Cc: will.deacon@arm.com, robin.murphy@arm.com,
	lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org,
	sudeep.holla@arm.com, iommu@lists.linux-foundation.org,
	jcm@redhat.com, linux-kernel@vger.kernel.org,
	robert.richter@cavium.com, catalin.marinas@arm.com,
	sgoutham@cavium.com, linux-arm-kernel@lists.infradead.org,
	linux-acpi@vger.kernel.org, geethasowjanya.akula@gmail.com,
	linu.cherian@cavium.com, Charles.Garcia-Tobin@arm.com,
	Geetha Sowjanya <geethasowjanya.akula@cavium.com>
Subject: Re: [PATCH v3 1/7] iommu/arm-smmu-v3: Introduce SMMU option PAGE0_REGS_ONLY for ThunderX2 errata #74
Date: Sat, 6 May 2017 01:03:28 +0200	[thread overview]
Message-ID: <20170505230328.GN4906@rric.localdomain> (raw)
In-Reply-To: <1493986091-30521-2-git-send-email-gakula@caviumnetworks.com>

On 05.05.17 17:38:05, Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
> 
> Cavium ThunderX2 SMMU implementation doesn't support page 1 register space
> and PAGE0_REGS_ONLY option will be enabled as an errata workaround.
> 
> This option when turned on, replaces all page 1 offsets used for
> EVTQ_PROD/CONS, PRIQ_PROD/CONS register access with page 0 offsets.
> 
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> ---
>  .../devicetree/bindings/iommu/arm,smmu-v3.txt      |  6 +++
>  drivers/iommu/arm-smmu-v3.c                        | 44 ++++++++++++++++------
>  2 files changed, 38 insertions(+), 12 deletions(-)

> @@ -1995,8 +2011,10 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu)
>  	if (!(smmu->features & ARM_SMMU_FEAT_PRI))
>  		return 0;
>  
> -	return arm_smmu_init_one_queue(smmu, &smmu->priq.q, ARM_SMMU_PRIQ_PROD,
> -				       ARM_SMMU_PRIQ_CONS, PRIQ_ENT_DWORDS);
> +	return arm_smmu_init_one_queue(smmu, &smmu->priq.q,
> +				       ARM_SMMU_PRIQ_PROD(smmu),
> +				       ARM_SMMU_PRIQ_CONS(smmu),
> +				       PRIQ_ENT_DWORDS);

I would also suggest Robin's idea from the v1 review here. This works
if we rework arm_smmu_init_one_queue() to pass addresses instead of
offsets.

This would make these widespread offset calculations obsolete.

-Robert

  parent reply	other threads:[~2017-05-05 23:03 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-05 12:08 [PATCH v3 0/7] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-05-05 12:08 ` [PATCH v3 1/7] iommu/arm-smmu-v3: Introduce SMMU option PAGE0_REGS_ONLY for ThunderX2 errata #74 Geetha sowjanya
2017-05-05 22:26   ` Robert Richter
2017-05-05 23:03   ` Robert Richter [this message]
2017-05-08  9:17     ` Linu Cherian
2017-05-08  9:29       ` Robert Richter
2017-05-08  9:59       ` Robin Murphy
2017-05-08 10:04         ` Robert Richter
2017-05-05 12:08 ` [PATCH v3 2/7] iommu/arm-smmu-v3: Do resource size checks based on SMMU Geetha sowjanya
2017-05-05 22:18   ` Robert Richter
2017-05-08  9:44     ` Linu Cherian
2017-05-08 10:09       ` Robert Richter
2017-05-08 10:50         ` Linu Cherian
2017-05-08 12:21           ` Robert Richter
2017-05-08 11:03         ` Geetha Akula
2017-05-05 12:08 ` [PATCH v3 3/7] ACPICA: IORT: Add Cavium ThunderX2 SMMUv3 model definition Geetha sowjanya
2017-05-05 13:53   ` Hanjun Guo
2017-05-05 14:56     ` David Daney
2017-05-05 14:58       ` Will Deacon
2017-05-05 15:33         ` Jon Masters
2017-05-05 12:08 ` [PATCH v3 4/7] iommu/arm-smmu-v3: For ACPI based device probing, set PAGE0_REGS_ONLY option for ThunderX2 SMMUv3 implementation Geetha sowjanya
2017-05-05 12:08 ` [PATCH v3 5/7] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-05-05 22:19   ` Robert Richter
2017-05-05 12:08 ` [PATCH v3 6/7] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-05-08 11:21   ` Robin Murphy
2017-05-08 12:02     ` Geetha Akula
2017-05-05 12:08 ` [PATCH v3 7/7] arm64: Documentation: Add Cavium ThunderX2 SMMUv3 erratas Geetha sowjanya
2017-05-05 22:22 ` [PATCH v3 0/7] Cavium ThunderX2 SMMUv3 errata workarounds Robert Richter
2017-05-08 15:15   ` Linu Cherian
2017-05-09 16:07     ` Robert Richter

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