* [PATCH v6 2/4] mailbox: Support stateless mailboxes without txdone
2017-05-09 19:47 [PATCH v6 1/4] mailbox: Make startup and shutdown ops optional Bjorn Andersson
@ 2017-05-09 19:47 ` Bjorn Andersson
2017-05-09 19:47 ` [PATCH v6 3/4] dt-bindings: mailbox: Introduce Qualcomm APCS global binding Bjorn Andersson
2017-05-09 19:47 ` [PATCH v6 4/4] mailbox: Introduce Qualcomm APCS IPC driver Bjorn Andersson
2 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2017-05-09 19:47 UTC (permalink / raw)
To: Jassi Brar
Cc: Rob Herring, Mark Rutland, devicetree, linux-kernel,
linux-arm-msm, linux-soc
For some types of doorbell-like mailbox hardware there is no mechanism
for delivery notification and the only possible message is an identity
element; i.e. the mailbox is stateless and writing any number of
messages to the mailbox is equivalent to writing a single message.
Support this type of mailbox hardware by introducing the "none" tx done
method, which means that neither the hardware nor the client is expected
to tick the mailbox state machine.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v5:
- New patch
drivers/mailbox/mailbox.c | 2 ++
drivers/mailbox/mailbox.h | 1 +
include/linux/mailbox_controller.h | 2 ++
3 files changed, 5 insertions(+)
diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c
index 505651ce9dcc..bf224c7c8f58 100644
--- a/drivers/mailbox/mailbox.c
+++ b/drivers/mailbox/mailbox.c
@@ -453,6 +453,8 @@ int mbox_controller_register(struct mbox_controller *mbox)
txdone = TXDONE_BY_IRQ;
else if (mbox->txdone_poll)
txdone = TXDONE_BY_POLL;
+ else if (mbox->txdone_none)
+ txdone = TXDONE_NONE;
else /* It has to be ACK then */
txdone = TXDONE_BY_ACK;
diff --git a/drivers/mailbox/mailbox.h b/drivers/mailbox/mailbox.h
index 456ba68513bb..708c8bb822fe 100644
--- a/drivers/mailbox/mailbox.h
+++ b/drivers/mailbox/mailbox.h
@@ -7,6 +7,7 @@
#ifndef __MAILBOX_H
#define __MAILBOX_H
+#define TXDONE_NONE 0 /* mailbox provides no means of flow control */
#define TXDONE_BY_IRQ BIT(0) /* controller has remote RTR irq */
#define TXDONE_BY_POLL BIT(1) /* controller can read status of last TX */
#define TXDONE_BY_ACK BIT(2) /* S/W ACK recevied by Client ticks the TX */
diff --git a/include/linux/mailbox_controller.h b/include/linux/mailbox_controller.h
index 74deadb42d76..43fa4ab9b3e1 100644
--- a/include/linux/mailbox_controller.h
+++ b/include/linux/mailbox_controller.h
@@ -58,6 +58,7 @@ struct mbox_chan_ops {
* @ops: Operators that work on each communication chan
* @chans: Array of channels
* @num_chans: Number of channels in the 'chans' array.
+ * @txdone_none: The controller has no sense of TX done
* @txdone_irq: Indicates if the controller can report to API when
* the last transmitted data was read by the remote.
* Eg, if it has some TX ACK irq.
@@ -78,6 +79,7 @@ struct mbox_controller {
int num_chans;
bool txdone_irq;
bool txdone_poll;
+ bool txdone_none;
unsigned txpoll_period;
struct mbox_chan *(*of_xlate)(struct mbox_controller *mbox,
const struct of_phandle_args *sp);
--
2.12.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v6 3/4] dt-bindings: mailbox: Introduce Qualcomm APCS global binding
2017-05-09 19:47 [PATCH v6 1/4] mailbox: Make startup and shutdown ops optional Bjorn Andersson
2017-05-09 19:47 ` [PATCH v6 2/4] mailbox: Support stateless mailboxes without txdone Bjorn Andersson
@ 2017-05-09 19:47 ` Bjorn Andersson
2017-05-13 0:02 ` Rob Herring
2017-05-09 19:47 ` [PATCH v6 4/4] mailbox: Introduce Qualcomm APCS IPC driver Bjorn Andersson
2 siblings, 1 reply; 6+ messages in thread
From: Bjorn Andersson @ 2017-05-09 19:47 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Jassi Brar
Cc: devicetree, linux-kernel, linux-arm-msm, linux-soc
Introduce a binding for the Qualcomm APCS global block, exposing a
mailbox for invoking interrupts on remote processors in the system.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v5:
- None
.../bindings/mailbox/qcom,apcs-kpss-global.txt | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
new file mode 100644
index 000000000000..eaa9e780f412
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
@@ -0,0 +1,46 @@
+Binding for the Qualcomm APCS global block
+==========================================
+
+This binding describes the APCS "global" block found in various Qualcomm
+platforms.
+
+- compatible:
+ Usage: required
+ Value type: <string>
+ Definition: must be one of:
+ "qcom,msm8916-apcs-kpss-global",
+ "qcom,msm8996-apcs-hmss-global"
+
+- reg:
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: must specify the base address and size of the global block
+
+- #mbox-cells:
+ Usage: required
+ Value type: <u32>
+ Definition: as described in mailbox.txt, must be 1
+
+
+= EXAMPLE
+The following example describes the APCS HMSS found in MSM8996 and part of the
+GLINK RPM referencing the "rpm_hlos" doorbell therein.
+
+ apcs_glb: mailbox@9820000 {
+ compatible = "qcom,msm8996-apcs-hmss-global";
+ reg = <0x9820000 0x1000>;
+
+ #mbox-cells = <1>;
+ };
+
+ rpm-glink {
+ compatible = "qcom,glink-rpm";
+
+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
+
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+
+ mboxes = <&apcs_glb 0>;
+ mbox-names = "rpm_hlos";
+ };
+
--
2.12.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v6 3/4] dt-bindings: mailbox: Introduce Qualcomm APCS global binding
2017-05-09 19:47 ` [PATCH v6 3/4] dt-bindings: mailbox: Introduce Qualcomm APCS global binding Bjorn Andersson
@ 2017-05-13 0:02 ` Rob Herring
0 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2017-05-13 0:02 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Mark Rutland, Jassi Brar, devicetree, linux-kernel,
linux-arm-msm, linux-soc
On Tue, May 09, 2017 at 12:47:02PM -0700, Bjorn Andersson wrote:
> Introduce a binding for the Qualcomm APCS global block, exposing a
> mailbox for invoking interrupts on remote processors in the system.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>
> Changes since v5:
> - None
>
> .../bindings/mailbox/qcom,apcs-kpss-global.txt | 46 ++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v6 4/4] mailbox: Introduce Qualcomm APCS IPC driver
2017-05-09 19:47 [PATCH v6 1/4] mailbox: Make startup and shutdown ops optional Bjorn Andersson
2017-05-09 19:47 ` [PATCH v6 2/4] mailbox: Support stateless mailboxes without txdone Bjorn Andersson
2017-05-09 19:47 ` [PATCH v6 3/4] dt-bindings: mailbox: Introduce Qualcomm APCS global binding Bjorn Andersson
@ 2017-05-09 19:47 ` Bjorn Andersson
2017-05-10 0:46 ` Stephen Boyd
2 siblings, 1 reply; 6+ messages in thread
From: Bjorn Andersson @ 2017-05-09 19:47 UTC (permalink / raw)
To: Jassi Brar
Cc: Rob Herring, Mark Rutland, devicetree, linux-kernel,
linux-arm-msm, linux-soc
This implements a driver that exposes the IPC bits found in the APCS
Global block in various Qualcomm platforms. The bits are used to signal
inter-processor communication signals from the application CPU to other
masters.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v5:
- Set txdone_none
drivers/mailbox/Kconfig | 8 ++
drivers/mailbox/Makefile | 2 +
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 129 ++++++++++++++++++++++++++++++++
3 files changed, 139 insertions(+)
create mode 100644 drivers/mailbox/qcom-apcs-ipc-mailbox.c
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index ceff415f201c..fffc64da61f9 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -124,6 +124,14 @@ config MAILBOX_TEST
Test client to help with testing new Controller driver
implementations.
+config QCOM_APCS_IPC
+ tristate "Qualcomm APCS IPC driver"
+ depends on ARCH_QCOM
+ help
+ Say y here to enable support for the APCS IPC mailbox driver,
+ providing an interface for invoking the inter-process communication
+ signals from the application processor to other masters.
+
config TEGRA_HSP_MBOX
bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
depends on ARCH_TEGRA_186_SOC
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 7dde4f609ae8..cc718c79669a 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -30,4 +30,6 @@ obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o
obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
+obj-$(CONFIG_QCOM_APCS_IPC) += qcom-apcs-ipc-mailbox.o
+
obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
new file mode 100644
index 000000000000..4dddf8627acc
--- /dev/null
+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
@@ -0,0 +1,129 @@
+/*
+ * Copyright (c) 2017, Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/mailbox_controller.h>
+
+#define QCOM_APCS_IPC_BITS 32
+
+struct qcom_apcs_ipc {
+ struct device *dev;
+
+ struct mbox_controller mbox;
+ struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];
+
+ void __iomem *base;
+ unsigned long offset;
+};
+
+static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
+{
+ struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
+ struct qcom_apcs_ipc, mbox);
+ unsigned long idx = (unsigned long)chan->con_priv;
+
+ writel(BIT(idx), apcs->base + apcs->offset);
+
+ return 0;
+}
+
+static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
+ .send_data = qcom_apcs_ipc_send_data,
+};
+
+static int qcom_apcs_ipc_probe(struct platform_device *pdev)
+{
+ struct qcom_apcs_ipc *apcs;
+ struct resource *res;
+ unsigned long i;
+ int ret;
+
+ apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
+ if (!apcs)
+ return -ENOMEM;
+
+ apcs->dev = &pdev->dev;
+ apcs->offset = (unsigned long)of_device_get_match_data(&pdev->dev);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ apcs->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(apcs->base))
+ return PTR_ERR(apcs->base);
+
+ /* Initialize channel identifiers */
+ for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
+ apcs->mbox_chans[i].con_priv = (void *)i;
+
+ apcs->mbox.dev = &pdev->dev;
+ apcs->mbox.ops = &qcom_apcs_ipc_ops;
+ apcs->mbox.txdone_none = true;
+ apcs->mbox.chans = apcs->mbox_chans;
+ apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
+
+ ret = mbox_controller_register(&apcs->mbox);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, apcs);
+
+ return 0;
+}
+
+static int qcom_apcs_ipc_remove(struct platform_device *pdev)
+{
+ struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
+
+ mbox_controller_unregister(&apcs->mbox);
+
+ return 0;
+}
+
+/* .data is the offset of the ipc register within the global block */
+static const struct of_device_id qcom_apcs_ipc_of_match[] = {
+ { .compatible = "qcom,msm8916-apcs-kpss-global", .data = (void *)8 },
+ { .compatible = "qcom,msm8996-apcs-hmss-global", .data = (void *)16 },
+ {}
+};
+MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);
+
+static struct platform_driver qcom_apcs_ipc_driver = {
+ .probe = qcom_apcs_ipc_probe,
+ .remove = qcom_apcs_ipc_remove,
+ .driver = {
+ .name = "qcom_apcs_ipc",
+ .of_match_table = qcom_apcs_ipc_of_match,
+ },
+};
+
+static int __init qcom_apcs_ipc_init(void)
+{
+ return platform_driver_register(&qcom_apcs_ipc_driver);
+}
+postcore_initcall(qcom_apcs_ipc_init);
+
+static void __exit qcom_apcs_ipc_exit(void)
+{
+ platform_driver_unregister(&qcom_apcs_ipc_driver);
+}
+module_exit(qcom_apcs_ipc_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Qualcomm APCS IPC driver");
--
2.12.0
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v6 4/4] mailbox: Introduce Qualcomm APCS IPC driver
2017-05-09 19:47 ` [PATCH v6 4/4] mailbox: Introduce Qualcomm APCS IPC driver Bjorn Andersson
@ 2017-05-10 0:46 ` Stephen Boyd
0 siblings, 0 replies; 6+ messages in thread
From: Stephen Boyd @ 2017-05-10 0:46 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Jassi Brar, Rob Herring, Mark Rutland, devicetree, linux-kernel,
linux-arm-msm, linux-soc
On 05/09, Bjorn Andersson wrote:
> This implements a driver that exposes the IPC bits found in the APCS
> Global block in various Qualcomm platforms. The bits are used to signal
> inter-processor communication signals from the application CPU to other
> masters.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>
> Changes since v5:
> - Set txdone_none
>
> drivers/mailbox/Kconfig | 8 ++
> drivers/mailbox/Makefile | 2 +
> drivers/mailbox/qcom-apcs-ipc-mailbox.c | 129 ++++++++++++++++++++++++++++++++
Drive by trivia!
> 3 files changed, 139 insertions(+)
> create mode 100644 drivers/mailbox/qcom-apcs-ipc-mailbox.c
>
> diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
> index ceff415f201c..fffc64da61f9 100644
> --- a/drivers/mailbox/Kconfig
> +++ b/drivers/mailbox/Kconfig
> @@ -124,6 +124,14 @@ config MAILBOX_TEST
> Test client to help with testing new Controller driver
> implementations.
>
> +config QCOM_APCS_IPC
> + tristate "Qualcomm APCS IPC driver"
> + depends on ARCH_QCOM
Plus an || COMPILE_TEST?
> + help
> + Say y here to enable support for the APCS IPC mailbox driver,
> + providing an interface for invoking the inter-process communication
> + signals from the application processor to other masters.
> +
> diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> new file mode 100644
> index 000000000000..4dddf8627acc
> --- /dev/null
> +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> @@ -0,0 +1,129 @@
> +/*
> + * Copyright (c) 2017, Linaro Ltd
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/io.h>
> +#include <linux/slab.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/mailbox_controller.h>
> +
> +#define QCOM_APCS_IPC_BITS 32
> +
> +struct qcom_apcs_ipc {
> + struct device *dev;
Is this used? I guess it's nice for dev_*() messages, but it
doesn't seem used.
> +
> + struct mbox_controller mbox;
> + struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];
> +
> + void __iomem *base;
> + unsigned long offset;
> +};
> +
> +static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
> +{
> + struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
> + struct qcom_apcs_ipc, mbox);
> + unsigned long idx = (unsigned long)chan->con_priv;
> +
> + writel(BIT(idx), apcs->base + apcs->offset);
Do we need both base and offset? We can just store the "doorbell"
register and then ping the right bit instead.
> +
> + return 0;
> +}
> +
> +static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
> + .send_data = qcom_apcs_ipc_send_data,
> +};
> +
> +static int qcom_apcs_ipc_probe(struct platform_device *pdev)
> +{
> + struct qcom_apcs_ipc *apcs;
> + struct resource *res;
> + unsigned long i;
> + int ret;
> +
> + apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
> + if (!apcs)
> + return -ENOMEM;
> +
> + apcs->dev = &pdev->dev;
> + apcs->offset = (unsigned long)of_device_get_match_data(&pdev->dev);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + apcs->base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(apcs->base))
> + return PTR_ERR(apcs->base);
> +
> + /* Initialize channel identifiers */
> + for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
> + apcs->mbox_chans[i].con_priv = (void *)i;
> +
> + apcs->mbox.dev = &pdev->dev;
> + apcs->mbox.ops = &qcom_apcs_ipc_ops;
> + apcs->mbox.txdone_none = true;
> + apcs->mbox.chans = apcs->mbox_chans;
> + apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
> +
> + ret = mbox_controller_register(&apcs->mbox);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
> + return ret;
> + }
> +
> + platform_set_drvdata(pdev, apcs);
> +
> + return 0;
> +}
> +
> +static int qcom_apcs_ipc_remove(struct platform_device *pdev)
> +{
> + struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
> +
> + mbox_controller_unregister(&apcs->mbox);
Too bad there isn't a devm_mbox_controller_register()!
> +
> + return 0;
> +}
> +
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 6+ messages in thread