From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: "Jernej Škrabec" <jernej.skrabec@siol.net>
Cc: linux-sunxi@googlegroups.com, wens@csie.org,
Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh+dt@kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [linux-sunxi] Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC
Date: Tue, 23 May 2017 14:53:21 +0200 [thread overview]
Message-ID: <20170523125321.t7y7yfrrfokpkzgd@flea.home> (raw)
In-Reply-To: <3164416.5xR36OcyjH@jernej-laptop>
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On Mon, May 22, 2017 at 07:55:56PM +0200, Jernej Škrabec wrote:
> Hi,
>
> Dne sobota, 20. maj 2017 ob 03:37:53 CEST je Chen-Yu Tsai napisal(a):
> > On Sat, May 20, 2017 at 2:23 AM, Jernej Škrabec <jernej.skrabec@siol.net>
> wrote:
> > > Hi,
> > >
> > > Dne petek, 19. maj 2017 ob 20:08:18 CEST je Icenowy Zheng napisal(a):
> > >> 于 2017年5月20日 GMT+08:00 上午2:03:30, Maxime Ripard <maxime.ripard@free-
> > >
> > > electrons.com> 写到:
> > >> >On Thu, May 18, 2017 at 12:43:50AM +0800, Icenowy Zheng wrote:
> > >> >> Allwinner H3 features a TV encoder similar to the one in earlier
> > >> >
> > >> >SoCs,
> > >> >
> > >> >> but with some different points about clocks:
> > >> >> - It has a mod clock and a bus clock.
> > >> >> - The mod clock must be at a fixed rate to generate signal.
> > >> >
> > >> >Why?
> > >>
> > >> It's experiment result by Jernej.
> > >>
> > >> The clock rates in BSP kernel is also specially designed
> > >> (PLL_DE at 432MHz) in order to be able to feed the TVE.
> > >
> > > My experiments and search through BSP code showed that TVE seems to have
> > > additional fixed predivider 8. So if you want to generate 27 MHz clock,
> > > unit has to be feed with 216 MHz.
> > >
> > > TVE has only one PLL source PLL_DE. And since 216 MHz is a bit low for
> > > DE2,
> > > BSP defaults to 432 MHz for PLL_DE and use divider 2 to generate 216 MHz.
> > > This clock is then divided by 8 internaly to get final 27 MHz.
> > >
> > > Please note that I don't have any hard evidence to support that, only
> > > experimental data. However, only that explanation make sense to me.
> > >
> > > BTW, BSP H3/H5 TV driver supports only PAL and NTSC which both use 27 MHz
> > > base clock. Further experiments are needed to check if there is any
> > > possibility to have other resolutions by manipulating clocks and give
> > > other proper settings. I plan to do that, but not in very near future.
> >
> > You only have composite video output, and those are the only 2 standard
> > resolutions that make any sense.
>
> Right, other resolutions are for VGA.
>
> Anyway, I did some more digging in A10 and R40 datasheets. I think that H3 TVE
> unit is something in between. R40 TVE has a setting to select "up sample".
That might be just another translation of oversampling :)
I didn't know it could be applied to composite signals though, but I
guess this is just another analog signal after all.
> Possible settings are 27 MHz, 54 MHz, 108 MHz and 216 MHz. BSP driver on R40
> has this setting enabled only for PAL and NTSC and it is always 216 MHz. I
> think that H3 may have this hardwired to 216 MHz and this would be the reason
> why 216 MHz is needed.
>
> Has anyone else any better explanation?
That's already a pretty good one.
Either way, wether this is upsampling, oversampling or just a
pre-divider, this can and should be dealt with in the mode_set
callback, and not in the probe.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-05-23 12:53 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-17 16:43 [RFC PATCH 00/11] Support for H3 Composite Output support Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 01/11] dt-bindings: update the binding for Allwinner H3 TVE support Icenowy Zheng
2017-05-19 18:02 ` Maxime Ripard
2017-05-19 18:06 ` Icenowy Zheng
2017-05-20 2:01 ` [linux-sunxi] " Chen-Yu Tsai
2017-05-17 16:43 ` [RFC PATCH 02/11] drm: sun4i: add support for H3 mixers Icenowy Zheng
2017-05-19 17:47 ` Maxime Ripard
2017-05-19 17:49 ` [linux-sunxi] " Icenowy Zheng
2017-05-19 18:00 ` Jernej Škrabec
2017-05-17 16:43 ` [RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2 Icenowy Zheng
2017-05-19 17:57 ` Maxime Ripard
2017-05-19 18:00 ` Icenowy Zheng
2017-05-24 8:14 ` Maxime Ripard
2017-06-04 14:19 ` icenowy
2017-05-17 16:43 ` [RFC PATCH 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 05/11] drm: sun4i: add compatible for H3 display engine Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 06/11] drm: sun4i: add color space correction support for DE2 mixer Icenowy Zheng
2017-05-17 20:14 ` [linux-sunxi] " Jernej Škrabec
2017-05-17 16:43 ` [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC Icenowy Zheng
2017-05-19 18:03 ` Maxime Ripard
2017-05-19 18:08 ` Icenowy Zheng
2017-05-19 18:23 ` [linux-sunxi] " Jernej Škrabec
2017-05-20 1:37 ` Chen-Yu Tsai
2017-05-22 17:55 ` Jernej Škrabec
2017-05-23 12:53 ` Maxime Ripard [this message]
2017-05-23 12:56 ` Icenowy Zheng
2017-05-23 13:00 ` icenowy
2017-05-24 7:30 ` Maxime Ripard
2017-05-24 8:25 ` Icenowy Zheng
2017-05-24 15:23 ` Jernej Škrabec
2017-05-31 18:43 ` Maxime Ripard
2017-06-01 14:11 ` icenowy
2017-06-02 22:21 ` Maxime Ripard
2017-06-04 14:29 ` icenowy
2017-06-07 7:58 ` Maxime Ripard
2017-05-17 16:43 ` [RFC PATCH 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3 Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 09/11] clk: sunxi-ng: export " Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE Icenowy Zheng
2017-05-17 20:19 ` [linux-sunxi] " Jernej Škrabec
2017-05-19 18:06 ` Maxime Ripard
2017-05-19 18:10 ` [linux-sunxi] " Icenowy Zheng
2017-05-24 8:19 ` Maxime Ripard
2017-05-24 5:24 ` [linux-sunxi] " Chen-Yu Tsai
2017-05-24 5:28 ` Icenowy Zheng
2017-05-24 5:34 ` Chen-Yu Tsai
2017-05-24 5:36 ` Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC Icenowy Zheng
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