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From: Chen-Yu Tsai <wens@csie.org>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	linux-sunxi <linux-sunxi@googlegroups.com>
Subject: Re: [linux-sunxi] [RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE
Date: Wed, 24 May 2017 13:24:29 +0800	[thread overview]
Message-ID: <CAGb2v64nVA=hHjXkVNMN68vQizMBE6vyYfaE895b0L6umv_Ycw@mail.gmail.com> (raw)
In-Reply-To: <20170517164354.16399-11-icenowy@aosc.io>

On Thu, May 18, 2017 at 12:43 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> As we have already the support for the TV encoder on Allwinner H3, add
> the display engine pipeline device tree nodes to its DTSI file.
>
> The H5 pipeline has some differences and will be enabled later.
>
> The currently-unused mixer0 and tcon0 are also needed, for the
> completement of the pipeline.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm/boot/dts/sun8i-h3.dtsi | 189 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 189 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index b36f9f423c39..20172ef92415 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -41,6 +41,8 @@
>   */
>
>  #include "sunxi-h3-h5.dtsi"
> +#include <dt-bindings/clock/sun8i-de2.h>
> +#include <dt-bindings/reset/sun8i-de2.h>
>
>  / {
>         cpus {
> @@ -72,6 +74,193 @@
>                 };
>         };
>
> +       de: display-engine {
> +               compatible = "allwinner,sun8i-h3-display-engine";
> +               allwinner,pipelines = <&mixer0>,
> +                                     <&mixer1>;
> +               status = "disabled";
> +       };
> +
> +       soc {
> +               display_clocks: clock@1000000 {
> +                       compatible = "allwinner,sun8i-a83t-de2-clk";
> +                       reg = <0x01000000 0x100000>;
> +                       clocks = <&ccu CLK_BUS_DE>,
> +                                <&ccu CLK_DE>;
> +                       clock-names = "bus",
> +                                     "mod";
> +                       resets = <&ccu RST_BUS_DE>;
> +                       #clock-cells = <1>;
> +                       #reset-cells = <1>;
> +                       assigned-clocks = <&ccu CLK_DE>;
> +                       assigned-clock-parents = <&ccu CLK_PLL_DE>;
> +                       assigned-clock-rates = <432000000>;
> +               };
> +
> +               mixer0: mixer@1100000 {
> +                       compatible = "allwinner,sun8i-h3-de2-mixer0";
> +                       reg = <0x01100000 0x100000>;
> +                       clocks = <&display_clocks CLK_BUS_MIXER0>,
> +                                <&display_clocks CLK_MIXER0>;
> +                       clock-names = "bus",
> +                                     "mod";
> +                       resets = <&display_clocks RST_MIXER0>;
> +                       status = "disabled";
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               mixer0_out: port@1 {
> +                                       #address-cells = <1>;
> +                                       #size-cells = <0>;
> +                                       reg = <1>;
> +
> +                                       mixer0_out_tcon0: endpoint@0 {
> +                                               reg = <0>;
> +                                               remote-endpoint = <&tcon0_in_mixer0>;
> +                                       };
> +
> +                                       mixer0_out_tcon1: endpoint@1 {
> +                                               reg = <1>;
> +                                               remote-endpoint = <&tcon1_in_mixer0>;
> +                                       };
> +                               };
> +                       };
> +               };
> +
> +               mixer1: mixer@1200000 {
> +                       compatible = "allwinner,sun8i-h3-de2-mixer1";
> +                       reg = <0x01200000 0x100000>;
> +                       clocks = <&display_clocks CLK_BUS_MIXER1>,
> +                                <&display_clocks CLK_MIXER1>;
> +                       clock-names = "bus",
> +                                     "mod";
> +                       resets = <&display_clocks RST_WB>;
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               mixer1_out: port@1 {
> +                                       #address-cells = <1>;
> +                                       #size-cells = <0>;
> +                                       reg = <1>;
> +
> +                                       mixer1_out_tcon1: endpoint@0 {
> +                                               reg = <0>;

I would prefer if you could stick to the numbering scheme we're using for
Display Engine 1.0, as in endpoint 0 links to component 0 of whatever type.

We're probably going to stick to that for the R40's incredibly complicated
pipeline. I don't want to have any outliers unless absolutely necessary.

ChenYu

> +                                               remote-endpoint = <&tcon1_in_mixer1>;
> +                                       };
> +
> +                                       mixer1_out_tcon0: endpoint@1 {
> +                                               reg = <1>;
> +                                               remote-endpoint = <&tcon0_in_mixer1>;
> +                                       };
> +                               };
> +                       };
> +               };
> +
> +               tcon0: lcd-controller@1c0c000 {
> +                       compatible = "allwinner,sun8i-h3-tcon0";
> +                       reg = <0x01c0c000 0x1000>;
> +                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&ccu CLK_BUS_TCON0>,
> +                                <&ccu CLK_TCON0>;
> +                       clock-names = "ahb",
> +                                     "tcon-ch1";
> +                       resets = <&ccu RST_BUS_TCON0>;
> +                       reset-names = "lcd";
> +                       status = "disabled";
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               tcon0_in: port@0 {
> +                                       #address-cells = <1>;
> +                                       #size-cells = <0>;
> +                                       reg = <0>;
> +
> +                                       tcon0_in_mixer0: endpoint@0 {
> +                                               reg = <0>;
> +                                               remote-endpoint = <&mixer0_out_tcon0>;
> +                                       };
> +
> +                                       tcon0_in_mixer1: endpoint@1 {
> +                                               reg = <1>;
> +                                               remote-endpoint = <&mixer1_out_tcon0>;
> +                                       };
> +                               };
> +                       };
> +               };
> +
> +               tcon1: lcd-controller@1c0d000 {
> +                       compatible = "allwinner,sun8i-h3-tcon1";
> +                       reg = <0x01c0d000 0x1000>;
> +                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&ccu CLK_BUS_TCON1>;
> +                       clock-names = "ahb";
> +                       resets = <&ccu RST_BUS_TCON1>;
> +                       reset-names = "lcd";
> +                       status = "disabled";
> +
> +                       ports {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               tcon1_in: port@0 {
> +                                       #address-cells = <1>;
> +                                       #size-cells = <0>;
> +                                       reg = <0>;
> +
> +                                       tcon1_in_mixer1: endpoint@0 {
> +                                               reg = <0>;
> +                                               remote-endpoint = <&mixer1_out_tcon1>;
> +                                       };
> +
> +                                       tcon1_in_mixer0: endpoint@1 {
> +                                               reg = <1>;
> +                                               remote-endpoint = <&mixer0_out_tcon1>;
> +                                       };
> +                               };
> +
> +                               tcon1_out: port@1 {
> +                                       #address-cells = <1>;
> +                                       #size-cells = <0>;
> +                                       reg = <1>;
> +
> +                                       tcon1_out_tve0: endpoint@1 {
> +                                               reg = <1>;
> +                                               remote-endpoint = <&tve0_in_tcon1>;
> +                                       };
> +                               };
> +                       };
> +               };
> +
> +               tve0: tv-encoder@1e00000 {
> +                       compatible = "allwinner,sun8i-h3-tv-encoder";
> +                       reg = <0x01e00000 0x1000>;
> +                       clocks = <&ccu CLK_BUS_TVE>, <&ccu CLK_TVE>;
> +                       clock-names = "bus", "mod";
> +                       resets = <&ccu RST_BUS_TVE>;
> +                       status = "disabled";
> +
> +                       assigned-clocks = <&ccu CLK_TVE>;
> +                       assigned-clock-parents = <&ccu CLK_PLL_DE>;
> +                       assigned-clock-rates = <216000000>;
> +
> +                       port {
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +
> +                               tve0_in_tcon1: endpoint@0 {
> +                                       reg = <0>;
> +                                       remote-endpoint = <&tcon1_out_tve0>;
> +                               };
> +                       };
> +               };
> +       };
> +
>         timer {
>                 compatible = "arm,armv7-timer";
>                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> --
> 2.12.2
>
> --
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  parent reply	other threads:[~2017-05-24  5:24 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-17 16:43 [RFC PATCH 00/11] Support for H3 Composite Output support Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 01/11] dt-bindings: update the binding for Allwinner H3 TVE support Icenowy Zheng
2017-05-19 18:02   ` Maxime Ripard
2017-05-19 18:06     ` Icenowy Zheng
2017-05-20  2:01       ` [linux-sunxi] " Chen-Yu Tsai
2017-05-17 16:43 ` [RFC PATCH 02/11] drm: sun4i: add support for H3 mixers Icenowy Zheng
2017-05-19 17:47   ` Maxime Ripard
2017-05-19 17:49     ` [linux-sunxi] " Icenowy Zheng
2017-05-19 18:00       ` Jernej Škrabec
2017-05-17 16:43 ` [RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2 Icenowy Zheng
2017-05-19 17:57   ` Maxime Ripard
2017-05-19 18:00     ` Icenowy Zheng
2017-05-24  8:14       ` Maxime Ripard
2017-06-04 14:19         ` icenowy
2017-05-17 16:43 ` [RFC PATCH 04/11] drm: sun4i: add support for H3's TCON0/1 Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 05/11] drm: sun4i: add compatible for H3 display engine Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 06/11] drm: sun4i: add color space correction support for DE2 mixer Icenowy Zheng
2017-05-17 20:14   ` [linux-sunxi] " Jernej Škrabec
2017-05-17 16:43 ` [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC Icenowy Zheng
2017-05-19 18:03   ` Maxime Ripard
2017-05-19 18:08     ` Icenowy Zheng
2017-05-19 18:23       ` [linux-sunxi] " Jernej Škrabec
2017-05-20  1:37         ` Chen-Yu Tsai
2017-05-22 17:55           ` Jernej Škrabec
2017-05-23 12:53             ` Maxime Ripard
2017-05-23 12:56               ` Icenowy Zheng
2017-05-23 13:00               ` icenowy
2017-05-24  7:30                 ` Maxime Ripard
2017-05-24  8:25                   ` Icenowy Zheng
2017-05-24 15:23                     ` Jernej Škrabec
2017-05-31 18:43                     ` Maxime Ripard
2017-06-01 14:11                       ` icenowy
2017-06-02 22:21                         ` Maxime Ripard
2017-06-04 14:29                   ` icenowy
2017-06-07  7:58                     ` Maxime Ripard
2017-05-17 16:43 ` [RFC PATCH 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3 Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 09/11] clk: sunxi-ng: export " Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 10/11] ARM: sun8i: h3: add display engine pipeline for TVE Icenowy Zheng
2017-05-17 20:19   ` [linux-sunxi] " Jernej Škrabec
2017-05-19 18:06   ` Maxime Ripard
2017-05-19 18:10     ` [linux-sunxi] " Icenowy Zheng
2017-05-24  8:19       ` Maxime Ripard
2017-05-24  5:24   ` Chen-Yu Tsai [this message]
2017-05-24  5:28     ` [linux-sunxi] " Icenowy Zheng
2017-05-24  5:34       ` Chen-Yu Tsai
2017-05-24  5:36         ` Icenowy Zheng
2017-05-17 16:43 ` [RFC PATCH 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC Icenowy Zheng

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