From: Alan Tull <atull@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org,
"Moritz Fischer" <moritz.fischer@ettus.com>,
delicious.quinoa@gmail.com, "Moritz Fischer" <mdf@kernel.org>,
"Michal Simek" <michal.simek@xilinx.com>,
"Sören Brinkmann" <soren.brinkmann@xilinx.com>,
devicetree@vger.kernel.org
Subject: [PATCH 01/10] dt-bindings: fpga: Add bindings document for Xilinx LogiCore PR Decoupler
Date: Mon, 5 Jun 2017 14:07:32 -0500 [thread overview]
Message-ID: <20170605190741.10508-2-atull@kernel.org> (raw)
In-Reply-To: <20170605190741.10508-1-atull@kernel.org>
From: Moritz Fischer <mdf@kernel.org>
This adds the binding documentation for the Xilinx LogiCORE PR
Decoupler soft core.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Cc: Sören Brinkmann <soren.brinkmann@xilinx.com>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed off-by: Alan Tull <atull@kernel.org>
---
.../bindings/fpga/xilinx-pr-decoupler.txt | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt
diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt
new file mode 100644
index 000000000000..8dcfba926bc7
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt
@@ -0,0 +1,36 @@
+Xilinx LogiCORE Partial Reconfig Decoupler Softcore
+
+The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more
+decouplers / fpga bridges.
+The controller can decouple/disable the bridges which prevents signal
+changes from passing through the bridge. The controller can also
+couple / enable the bridges which allows traffic to pass through the
+bridge normally.
+
+The Driver supports only MMIO handling. A PR region can have multiple
+PR Decouplers which can be handled independently or chained via decouple/
+decouple_status signals.
+
+Required properties:
+- compatible : Should contain "xlnx,pr-decoupler-1.00" followed by
+ "xlnx,pr-decoupler"
+- regs : base address and size for decoupler module
+- clocks : input clock to IP
+- clock-names : should contain "aclk"
+
+Optional properties:
+- bridge-enable : 0 if driver should disable bridge at startup
+ 1 if driver should enable bridge at startup
+ Default is to leave bridge in current state.
+
+See Documentation/devicetree/bindings/fpga/fpga-region.txt for generic bindings.
+
+Example:
+ fpga-bridge@100000450 {
+ compatible = "xlnx,pr-decoupler-1.00",
+ "xlnx-pr-decoupler";
+ regs = <0x10000045 0x10>;
+ clocks = <&clkc 15>;
+ clock-names = "aclk";
+ bridge-enable = <0>;
+ };
--
2.11.0
next prev parent reply other threads:[~2017-06-05 19:07 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-05 19:07 [PATCH 00/10] patches for fpga Alan Tull
2017-06-05 19:07 ` Alan Tull [this message]
2017-06-05 19:07 ` [PATCH 02/10] Make FPGA a menuconfig to ease disabling it all Alan Tull
2017-06-05 19:07 ` [PATCH 03/10] fpga: allow to compile-test Altera FPGA bridge drivers Alan Tull
2017-06-06 13:45 ` kbuild test robot
2017-06-09 9:49 ` Greg Kroah-Hartman
2017-06-09 13:44 ` Tobias Klauser
2017-06-10 3:55 ` Alan Tull
2017-06-05 19:07 ` [PATCH 04/10] fpga: Add flag to indicate SPI bitstream is bit-reversed Alan Tull
2017-06-05 19:07 ` [PATCH 05/10] doc: dt: document altera-passive-serial binding Alan Tull
2017-06-05 19:07 ` [PATCH 06/10] fpga manager: Add altera-ps-spi driver for Altera FPGAs Alan Tull
2017-06-09 9:51 ` Greg Kroah-Hartman
2017-06-09 13:18 ` Anatolij Gustschin
2017-06-09 22:07 ` stillcompiling
2017-06-10 14:43 ` Alan Tull
2017-06-05 19:07 ` [PATCH 07/10] ARM: dts: imx6q-evi: support altera-ps-spi Alan Tull
2017-06-05 19:07 ` [PATCH 08/10] lib: add bitrev8x4() Alan Tull
2017-06-05 19:07 ` [PATCH 09/10] fpga-manager: altera-ps-spi: use bitrev8x4 Alan Tull
2017-06-05 19:07 ` [PATCH 10/10] of: Add vendor prefix for Lattice Semiconductor Alan Tull
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