From: Sakari Ailus <sakari.ailus@iki.fi>
To: Hugues Fruchet <hugues.fruchet@st.com>
Cc: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>,
" H. Nikolaus Schaller" <hns@goldelico.com>,
Guennadi Liakhovetski <g.liakhovetski@gmx.de>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@st.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Hans Verkuil <hverkuil@xs4all.nl>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-media@vger.kernel.org,
Benjamin Gaignard <benjamin.gaignard@linaro.org>,
Yannick Fertre <yannick.fertre@st.com>
Subject: Re: [PATCH v1 4/6] [media] ov9650: use write_array() for resolution sequences
Date: Mon, 26 Jun 2017 19:33:30 +0300 [thread overview]
Message-ID: <20170626163330.GR12407@valkosipuli.retiisi.org.uk> (raw)
In-Reply-To: <1498143942-12682-5-git-send-email-hugues.fruchet@st.com>
Hi Hugues,
On Thu, Jun 22, 2017 at 05:05:40PM +0200, Hugues Fruchet wrote:
> Align resolution sequences on initialization sequence using
> i2c_rv structure NULL terminated .This add flexibility
> on resolution sequence size.
> Document resolution related registers by using corresponding
> define instead of hexa address/value.
>
> Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
> ---
> drivers/media/i2c/ov9650.c | 98 ++++++++++++++++++++++++++++++----------------
> 1 file changed, 64 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/media/i2c/ov9650.c b/drivers/media/i2c/ov9650.c
> index 4311da6..8b283c9 100644
> --- a/drivers/media/i2c/ov9650.c
> +++ b/drivers/media/i2c/ov9650.c
> @@ -227,11 +227,16 @@ struct ov965x_ctrls {
> u8 update;
> };
>
> +struct i2c_rv {
> + u8 addr;
> + u8 value;
> +};
> +
> struct ov965x_framesize {
> u16 width;
> u16 height;
> u16 max_exp_lines;
> - const u8 *regs;
> + const struct i2c_rv *regs;
> };
>
> struct ov965x_interval {
> @@ -280,9 +285,11 @@ struct ov965x {
> u8 apply_frame_fmt;
> };
>
> -struct i2c_rv {
> - u8 addr;
> - u8 value;
> +struct ov965x_pixfmt {
> + u32 code;
> + u32 colorspace;
> + /* REG_TSLB value, only bits [3:2] may be set. */
> + u8 tslb_reg;
> };
>
> static const struct i2c_rv ov965x_init_regs[] = {
> @@ -342,30 +349,59 @@ struct i2c_rv {
> { REG_NULL, 0 }
> };
>
> -#define NUM_FMT_REGS 14
> -/*
> - * COM7, COM3, COM4, HSTART, HSTOP, HREF, VSTART, VSTOP, VREF,
> - * EXHCH, EXHCL, ADC, OCOM, OFON
> - */
> -static const u8 frame_size_reg_addr[NUM_FMT_REGS] = {
> - 0x12, 0x0c, 0x0d, 0x17, 0x18, 0x32, 0x19, 0x1a, 0x03,
> - 0x2a, 0x2b, 0x37, 0x38, 0x39,
> -};
> -
> -static const u8 ov965x_sxga_regs[NUM_FMT_REGS] = {
> - 0x00, 0x00, 0x00, 0x1e, 0xbe, 0xbf, 0x01, 0x81, 0x12,
> - 0x10, 0x34, 0x81, 0x93, 0x51,
> +static const struct i2c_rv ov965x_sxga_regs[] = {
> + { REG_COM7, 0x00 },
> + { REG_COM3, 0x00 },
> + { REG_COM4, 0x00 },
> + { REG_HSTART, 0x1e },
> + { REG_HSTOP, 0xbe },
> + { 0x32, 0xbf },
> + { REG_VSTART, 0x01 },
> + { REG_VSTOP, 0x81 },
> + { REG_VREF, 0x12 },
> + { REG_EXHCH, 0x10 },
> + { REG_EXHCL, 0x34 },
> + { REG_ADC, 0x81 },
> + { REG_ACOM, 0x93 },
> + { REG_OFON, 0x51 },
> + { REG_NULL, 0 },
> };
>
> -static const u8 ov965x_vga_regs[NUM_FMT_REGS] = {
> - 0x40, 0x04, 0x80, 0x26, 0xc6, 0xed, 0x01, 0x3d, 0x00,
> - 0x10, 0x40, 0x91, 0x12, 0x43,
> +static const struct i2c_rv ov965x_vga_regs[] = {
> + { REG_COM7, 0x40 },
> + { REG_COM3, 0x04 },
> + { REG_COM4, 0x80 },
> + { REG_HSTART, 0x26 },
> + { REG_HSTOP, 0xc6 },
> + { 0x32, 0xed },
> + { REG_VSTART, 0x01 },
> + { REG_VSTOP, 0x3d },
> + { REG_VREF, 0x00 },
> + { REG_EXHCH, 0x10 },
> + { REG_EXHCL, 0x40 },
> + { REG_ADC, 0x91 },
> + { REG_ACOM, 0x12 },
> + { REG_OFON, 0x43 },
> + { REG_NULL, 0 },
> };
>
> /* Determined empirically. */
> -static const u8 ov965x_qvga_regs[NUM_FMT_REGS] = {
> - 0x10, 0x04, 0x80, 0x25, 0xc5, 0xbf, 0x00, 0x80, 0x12,
> - 0x10, 0x40, 0x91, 0x12, 0x43,
> +static const struct i2c_rv ov965x_qvga_regs[] = {
> + { REG_COM7, 0x10 },
> + { REG_COM3, 0x04 },
> + { REG_COM4, 0x80 },
> + { REG_HSTART, 0x25 },
> + { REG_HSTOP, 0xc5 },
> + { 0x32, 0xbf },
> + { REG_VSTART, 0x00 },
> + { REG_VSTOP, 0x80 },
> + { REG_VREF, 0x12 },
> + { REG_EXHCH, 0x10 },
> + { REG_EXHCL, 0x40 },
> + { REG_ADC, 0x91 },
> + { REG_ACOM, 0x12 },
> + { REG_OFON, 0x43 },
> + { REG_NULL, 0 },
> };
>
> static const struct ov965x_framesize ov965x_framesizes[] = {
> @@ -387,13 +423,6 @@ struct i2c_rv {
> },
> };
>
> -struct ov965x_pixfmt {
> - u32 code;
> - u32 colorspace;
> - /* REG_TSLB value, only bits [3:2] may be set. */
> - u8 tslb_reg;
> -};
Any particular reason for moving struct ov965x_pixfmt definition?
> -
> static const struct ov965x_pixfmt ov965x_formats[] = {
> { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG, 0x00},
> { MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG, 0x04},
> @@ -1268,11 +1297,12 @@ static int ov965x_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config
>
> static int ov965x_set_frame_size(struct ov965x *ov965x)
> {
> - int i, ret = 0;
> + int ret = 0;
> +
> + v4l2_dbg(1, debug, ov965x->client, "%s\n", __func__);
>
> - for (i = 0; ret == 0 && i < NUM_FMT_REGS; i++)
> - ret = ov965x_write(ov965x->client, frame_size_reg_addr[i],
> - ov965x->frame_size->regs[i]);
> + ret = ov965x_write_array(ov965x->client,
> + ov965x->frame_size->regs);
> return ret;
> }
>
--
Regards,
Sakari Ailus
e-mail: sakari.ailus@iki.fi XMPP: sailus@retiisi.org.uk
next prev parent reply other threads:[~2017-06-26 16:33 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-22 15:05 [PATCH v1 0/6] Add support of OV9655 camera Hugues Fruchet
2017-06-22 15:05 ` [PATCH v1 1/6] DT bindings: add bindings for ov965x camera module Hugues Fruchet
2017-06-23 10:25 ` H. Nikolaus Schaller
2017-06-23 10:46 ` Andreas Färber
2017-06-23 10:59 ` H. Nikolaus Schaller
2017-06-23 11:58 ` Laurent Pinchart
2017-06-23 14:53 ` H. Nikolaus Schaller
2017-06-23 14:57 ` Andreas Färber
2017-06-23 15:22 ` H. Nikolaus Schaller
2017-06-23 18:05 ` Suman Anna
2017-06-23 18:59 ` H. Nikolaus Schaller
2017-06-23 22:24 ` Suman Anna
2017-06-26 6:00 ` H. Nikolaus Schaller
2017-06-26 10:35 ` Hugues FRUCHET
2017-06-26 20:04 ` Sylwester Nawrocki
2017-06-27 5:48 ` H. Nikolaus Schaller
2017-06-27 22:57 ` Sylwester Nawrocki
2017-06-28 9:12 ` H. Nikolaus Schaller
2017-06-28 10:50 ` Sylwester Nawrocki
2017-06-28 11:24 ` H. Nikolaus Schaller
2017-06-28 12:28 ` Hugues FRUCHET
2017-06-26 18:56 ` Rob Herring
2017-06-26 18:54 ` Rob Herring
2017-06-22 15:05 ` [PATCH v1 2/6] [media] ov9650: add device tree support Hugues Fruchet
2017-06-26 16:31 ` Sakari Ailus
2017-06-26 17:46 ` H. Nikolaus Schaller
2017-06-27 5:36 ` Sakari Ailus
2017-06-27 10:14 ` Hugues FRUCHET
2017-06-22 15:05 ` [PATCH v1 3/6] [media] ov9650: select the nearest higher resolution Hugues Fruchet
2017-06-22 15:05 ` [PATCH v1 4/6] [media] ov9650: use write_array() for resolution sequences Hugues Fruchet
2017-06-26 16:33 ` Sakari Ailus [this message]
2017-06-29 13:59 ` Hugues FRUCHET
2017-06-22 15:05 ` [PATCH v1 5/6] [media] ov9650: add multiple variant support Hugues Fruchet
2017-06-25 12:36 ` kbuild test robot
2017-06-22 15:05 ` [PATCH v1 6/6] [media] ov9650: add support of OV9655 variant Hugues Fruchet
2017-06-25 16:07 ` [PATCH] ov9650: fix semicolon.cocci warnings kbuild test robot
2017-06-25 16:07 ` [PATCH v1 6/6] [media] ov9650: add support of OV9655 variant kbuild test robot
2017-06-26 6:03 ` H. Nikolaus Schaller
2017-06-26 11:49 ` Hugues FRUCHET
2017-06-22 15:41 ` [PATCH v1 0/6] Add support of OV9655 camera H. Nikolaus Schaller
2017-06-23 10:25 ` H. Nikolaus Schaller
2017-06-25 9:18 ` omap3isp camera was " Pavel Machek
2017-06-26 6:05 ` H. Nikolaus Schaller
2017-06-26 8:39 ` Pavel Machek
2017-06-26 9:53 ` H. Nikolaus Schaller
2017-06-26 11:16 ` Pavel Machek
2017-06-27 5:49 ` H. Nikolaus Schaller
2017-06-26 13:19 ` Hugues FRUCHET
[not found] ` <E4E1E683-9CD0-4F23-AB03-080C52D0D73B@goldelico.com>
2017-06-27 7:57 ` Hugues FRUCHET
[not found] ` <95B10899-9966-4844-9667-D2434968A492@goldelico.com>
[not found] ` <85e62c47-e319-c801-376c-95f4d9cbf75a@st.com>
[not found] ` <E183E921-B8F4-4F8A-A302-58297A874990@goldelico.com>
[not found] ` <77bd3b8fe52643d68ecc821ec22bc0e6@SFHDAG5NODE1.st.com>
2017-07-01 21:00 ` H. Nikolaus Schaller
2017-07-03 8:16 ` Hugues FRUCHET
2017-07-03 9:14 ` H. Nikolaus Schaller
2017-07-03 12:03 ` Hugues FRUCHET
2017-07-03 12:23 ` H. Nikolaus Schaller
2017-07-05 14:02 ` H. Nikolaus Schaller
2017-07-08 20:55 ` Sakari Ailus
2017-06-26 6:02 ` H. Nikolaus Schaller
2017-06-26 10:05 ` Hugues FRUCHET
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