[PATCH 0/3] ARM: dts: gr-peach: Mix DTS fixes/updates

[PATCH 0/3] ARM: dts: gr-peach: Mix DTS fixes/updates

[Jacopo Mondi]

Hello,
   this series includes three patches for GR-Peach DTS.

The first, very trivial one is the re-proposal of the already sent patch, with
the commit message updated as suggested by Sergei.

The second just enables the Multi-function timer/counter unit which was
disabled and is actually used for timer event generations and wake-ups.

After enabling the MTU unit, ETHER is now working properly, so I am re-proposing
this patch, which had been left out from previous gr-peach DTS series because
the interface was not working correctly.

Thanks
   j

Jacopo Mondi (3):
  ARM: dts: gr-peach: Fix 'leds' node name indent
  ARM: dts: gr-peach: Enable MTU2 timer pulse unit
  ARM: dts: gr-peach: Add ETHER pin group

 arch/arm/boot/dts/r7s72100-gr-peach.dts | 44 ++++++++++++++++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

--
2.7.4

[PATCH 1/3] ARM: dts: gr-peach: Fix 'leds' node name indent

[Jacopo Mondi]

Fix 'leds' node name indent as it was wrongly aligned.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 arch/arm/boot/dts/r7s72100-gr-peach.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index f2ddd11..20309ac 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -53,7 +53,7 @@
 		};
 	};
 
-leds {
+	leds {
 		status = "okay";
 		compatible = "gpio-leds";
 
-- 
2.7.4

[PATCH 2/3] ARM: dts: gr-peach: Enable MTU2 timer pulse unit

[Jacopo Mondi]

MTU2 multi-function/multi-channel timer/counter is not enabled for
GR-Peach board. The timer is used as clock event source to schedule
wake-ups, and without this enabled all sleeps not performed through busy
waiting hang the board.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 arch/arm/boot/dts/r7s72100-gr-peach.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index 20309ac..ad6a627 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -78,6 +78,10 @@
 	clock-frequency = <48000000>;
 };
 
+&mtu2 {
+	status = "okay";
+};
+
 &scif2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&scif2_pins>;
-- 
2.7.4

[PATCH 3/3] ARM: dts: gr-peach: Add ETHER pin group

[Jacopo Mondi]

Add pin configuration subnode for ETHER pin group and enable the interface.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
---
 arch/arm/boot/dts/r7s72100-gr-peach.dts | 38 +++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index ad6a627..8b5a2c5 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -68,6 +68,28 @@
 		/* P6_2 as RxD2; P6_3 as TxD2 */
 		pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
 	};
+
+	ether_pins: ether {
+		/* Ethernet on Ports 1,3,5,10 */
+		pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL   */
+			 <RZA1_PINMUX(3, 0, 2)>,  /* P3_0 = ET_TXCLK  */
+			 <RZA1_PINMUX(3, 3, 2)>,  /* P3_3 = ET_MDIO   */
+			 <RZA1_PINMUX(3, 4, 2)>,  /* P3_4 = ET_RXCLK  */
+			 <RZA1_PINMUX(3, 5, 2)>,  /* P3_5 = ET_RXER   */
+			 <RZA1_PINMUX(3, 6, 2)>,  /* P3_6 = ET_RXDV   */
+			 <RZA1_PINMUX(5, 9, 2)>,  /* P5_9 = ET_MDC    */
+			 <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER  */
+			 <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN  */
+			 <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS   */
+			 <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0  */
+			 <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1  */
+			 <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2  */
+			 <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3  */
+			 <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0  */
+			 <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1  */
+			 <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */
+			 <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */
+	};
 };

 &extal_clk {
@@ -88,3 +110,19 @@

 	status = "okay";
 };
+
+&ether {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ether_pins>;
+
+	status = "okay";
+
+	reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
+	reset-delay-us = <5>;
+
+	renesas,no-ether-link;
+	phy-handle = <&phy0>;
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
--
2.7.4

Re: [PATCH 2/3] ARM: dts: gr-peach: Enable MTU2 timer pulse unit

[Geert Uytterhoeven]

On Thu, Oct 5, 2017 at 10:58 AM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> MTU2 multi-function/multi-channel timer/counter is not enabled for
> GR-Peach board. The timer is used as clock event source to schedule
> wake-ups, and without this enabled all sleeps not performed through busy
> waiting hang the board.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] ARM: dts: gr-peach: Add ETHER pin group

[Geert Uytterhoeven]

Hi Jacopo,

On Thu, Oct 5, 2017 at 10:58 AM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> Add pin configuration subnode for ETHER pin group and enable the interface.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

> --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
> +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts

> @@ -88,3 +110,19 @@
>
>         status = "okay";
>  };
> +
> +&ether {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&ether_pins>;
> +
> +       status = "okay";
> +
> +       reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
> +       reset-delay-us = <5>;

I'm afraid the PHY people (not CCed ;-) will want you to move these reset
properties to the phy subnode these days, despite
Documentation/devicetree/bindings/net/mdio.txt...

> +
> +       renesas,no-ether-link;
> +       phy-handle = <&phy0>;
> +       phy0: ethernet-phy@0 {
> +               reg = <0>;
> +       };
> +};

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/3] ARM: dts: gr-peach: Fix 'leds' node name indent

[Simon Horman]

On Thu, Oct 05, 2017 at 10:58:18AM +0200, Jacopo Mondi wrote:
> Fix 'leds' node name indent as it was wrongly aligned.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Thanks, applied.

Re: [PATCH 2/3] ARM: dts: gr-peach: Enable MTU2 timer pulse unit

[Simon Horman]

On Thu, Oct 05, 2017 at 11:02:30AM +0200, Geert Uytterhoeven wrote:
> On Thu, Oct 5, 2017 at 10:58 AM, Jacopo Mondi <jacopo+renesas@jmondi.org> wrote:
> > MTU2 multi-function/multi-channel timer/counter is not enabled for
> > GR-Peach board. The timer is used as clock event source to schedule
> > wake-ups, and without this enabled all sleeps not performed through busy
> > waiting hang the board.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, applied.

Re: [PATCH 3/3] ARM: dts: gr-peach: Add ETHER pin group

[jacopo mondi]

Hi Simon,

On Thu, Oct 05, 2017 at 10:58:20AM +0200, Jacopo Mondi wrote:
> Add pin configuration subnode for ETHER pin group and enable the interface.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> ---
>  arch/arm/boot/dts/r7s72100-gr-peach.dts | 38 +++++++++++++++++++++++++++++++++
>  1 file changed, 38 insertions(+)
>

Can you confirm you have not applied this yet?

I have received indications from netdev people to change location of
the reset pin properties, as they belong to PHY node, and also to
change the node layout.

If you have applied the first 2 but not this one, I will re-submit this one only

Thanks
   j


> diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
> index ad6a627..8b5a2c5 100644
> --- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
> +++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
> @@ -68,6 +68,28 @@
>  		/* P6_2 as RxD2; P6_3 as TxD2 */
>  		pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
>  	};
> +
> +	ether_pins: ether {
> +		/* Ethernet on Ports 1,3,5,10 */
> +		pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL   */
> +			 <RZA1_PINMUX(3, 0, 2)>,  /* P3_0 = ET_TXCLK  */
> +			 <RZA1_PINMUX(3, 3, 2)>,  /* P3_3 = ET_MDIO   */
> +			 <RZA1_PINMUX(3, 4, 2)>,  /* P3_4 = ET_RXCLK  */
> +			 <RZA1_PINMUX(3, 5, 2)>,  /* P3_5 = ET_RXER   */
> +			 <RZA1_PINMUX(3, 6, 2)>,  /* P3_6 = ET_RXDV   */
> +			 <RZA1_PINMUX(5, 9, 2)>,  /* P5_9 = ET_MDC    */
> +			 <RZA1_PINMUX(10, 1, 4)>, /* P10_1 = ET_TXER  */
> +			 <RZA1_PINMUX(10, 2, 4)>, /* P10_2 = ET_TXEN  */
> +			 <RZA1_PINMUX(10, 3, 4)>, /* P10_3 = ET_CRS   */
> +			 <RZA1_PINMUX(10, 4, 4)>, /* P10_4 = ET_TXD0  */
> +			 <RZA1_PINMUX(10, 5, 4)>, /* P10_5 = ET_TXD1  */
> +			 <RZA1_PINMUX(10, 6, 4)>, /* P10_6 = ET_TXD2  */
> +			 <RZA1_PINMUX(10, 7, 4)>, /* P10_7 = ET_TXD3  */
> +			 <RZA1_PINMUX(10, 8, 4)>, /* P10_8 = ET_RXD0  */
> +			 <RZA1_PINMUX(10, 9, 4)>, /* P10_9 = ET_RXD1  */
> +			 <RZA1_PINMUX(10, 10, 4)>,/* P10_10 = ET_RXD2 */
> +			 <RZA1_PINMUX(10, 11, 4)>;/* P10_11 = ET_RXD3 */
> +	};
>  };
>
>  &extal_clk {
> @@ -88,3 +110,19 @@
>
>  	status = "okay";
>  };
> +
> +&ether {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&ether_pins>;
> +
> +	status = "okay";
> +
> +	reset-gpios = <&port4 2 GPIO_ACTIVE_LOW>;
> +	reset-delay-us = <5>;
> +
> +	renesas,no-ether-link;
> +	phy-handle = <&phy0>;
> +	phy0: ethernet-phy@0 {
> +		reg = <0>;
> +	};
> +};
> --
> 2.7.4
>

Re: [PATCH 3/3] ARM: dts: gr-peach: Add ETHER pin group

[Simon Horman]

On Fri, Oct 06, 2017 at 02:25:23PM +0200, jacopo mondi wrote:
> Hi Simon,
> 
> On Thu, Oct 05, 2017 at 10:58:20AM +0200, Jacopo Mondi wrote:
> > Add pin configuration subnode for ETHER pin group and enable the interface.
> >
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> > ---
> >  arch/arm/boot/dts/r7s72100-gr-peach.dts | 38 +++++++++++++++++++++++++++++++++
> >  1 file changed, 38 insertions(+)
> >
> 
> Can you confirm you have not applied this yet?

Confirmed.