[PATCH v2 0/8] ARM: sun8i: a83t: Enable AXP813/AXP818 regulators

[PATCH v2 0/8] ARM: sun8i: a83t: Enable AXP813/AXP818 regulators

[Chen-Yu Tsai]

Hi everyone,

This series was originally name "regulator: axp20x: Add support for
AXP813/818 regulators". It adds support for the X-Powers AXP813/818 [1]
PMICs' regulators. The series is quite straightforward.

Changes since v1:

  - Regulator driver patches were merged and now dropped from the series

  - Chose simpler names for the regulators

  - Added SDIO WiFi enablement patches

Patch 1 adds a axp20x-regulator cell for AXP813, thereby enabling the
regulators.

Patch 2 adds a shared dtsi file for the PMIC. This currently contains
a list of regulator nodes, but will be expanded with Quentin's power
supply work.

Patches 3 through 5 add regulator nodes to board dts files for the A83T
boards that I have. They are not squashed together as each file has
substantial additions.

Patch 6 moves the mmc1 pinmux setting over to the dtsi, and sets it by
default.

Patches 7 & 8 enable SDIO-based WiFi on the Cubietruck Plus and Banana
Pi M3.

Originally my work also included enabling Ethernet. But the Ethernet
bindings were reverted. Everything can be found here:

    https://github.com/wens/linux/tree/a83t-regulator-wifi-eth

Please have a look.

Lee, we need the mfd changes merged in before merging the dts changes.
Otherwise, mmc would break as vmmc/vqmmc is tied to the PMIC regulators.


Regards
ChenYu


[1] AXP813 and AXP818 are functionally identical. They have different
    labels and are bundled with different SoCs (A83T and H8), as a sort
    of product or market segmentation.



Chen-Yu Tsai (8):
  mfd: axp20x: Add axp20x-regulator cell for AXP813
  ARM: dts: sunxi: Add dtsi for AXP81x PMIC
  ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
  ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
  ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator
    nodes
  ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
  ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
  ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1

 .../{sun8i-a83t-bananapi-m3.dts => axp81x.dtsi}    | 157 ++++++++---------
 .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts  | 147 ++++++++++++++--
 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts       | 169 ++++++++++++++++++-
 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts   | 187 +++++++++++++++++++--
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts          |   2 -
 arch/arm/boot/dts/sun8i-a83t.dtsi                  |   2 +
 drivers/mfd/axp20x.c                               |   2 +
 7 files changed, 547 insertions(+), 119 deletions(-)
 copy arch/arm/boot/dts/{sun8i-a83t-bananapi-m3.dts => axp81x.dtsi} (52%)

-- 
2.14.2

[PATCH v2 1/8] mfd: axp20x: Add axp20x-regulator cell for AXP813

[Chen-Yu Tsai]

Now that axp20x-regulator supports AXP813, we can add a cell for it
to enable it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/mfd/axp20x.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 336de66ca408..2468b431bb22 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -876,6 +876,8 @@ static struct mfd_cell axp813_cells[] = {
 		.name			= "axp221-pek",
 		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
 		.resources		= axp803_pek_resources,
+	}, {
+		.name			= "axp20x-regulator",
 	}
 };
 
-- 
2.14.2

Re: [PATCH v2 1/8] mfd: axp20x: Add axp20x-regulator cell for AXP813

[Maxime Ripard]

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Hi Lee,

On Wed, Oct 18, 2017 at 04:31:31PM +0800, Chen-Yu Tsai wrote:
> Now that axp20x-regulator supports AXP813, we can add a cell for it
> to enable it.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

Is there any chance this gets merged for 4.15?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 1/8] mfd: axp20x: Add axp20x-regulator cell for AXP813

[Lee Jones]

On Tue, 31 Oct 2017, Maxime Ripard wrote:
> On Wed, Oct 18, 2017 at 04:31:31PM +0800, Chen-Yu Tsai wrote:
> > Now that axp20x-regulator supports AXP813, we can add a cell for it
> > to enable it.
> > 
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> > Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> > Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
> 
> Is there any chance this gets merged for 4.15?

Can it go in by itself?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Re: [PATCH v2 1/8] mfd: axp20x: Add axp20x-regulator cell for AXP813

[Chen-Yu Tsai]

On Tue, Oct 31, 2017 at 11:07 PM, Lee Jones <lee.jones@linaro.org> wrote:
> On Tue, 31 Oct 2017, Maxime Ripard wrote:
>> On Wed, Oct 18, 2017 at 04:31:31PM +0800, Chen-Yu Tsai wrote:
>> > Now that axp20x-regulator supports AXP813, we can add a cell for it
>> > to enable it.
>> >
>> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> > Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
>> > Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
>>
>> Is there any chance this gets merged for 4.15?
>
> Can it go in by itself?

Yes. There are no build time dependencies. And the regulator driver changes
are already in the regulator tree.

ChenYu

Re: [PATCH v2 1/8] mfd: axp20x: Add axp20x-regulator cell for AXP813

[Lee Jones]

On Wed, 18 Oct 2017, Chen-Yu Tsai wrote:

> Now that axp20x-regulator supports AXP813, we can add a cell for it
> to enable it.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
> ---
>  drivers/mfd/axp20x.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied, thanks.

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH v2 2/8] ARM: dts: sunxi: Add dtsi for AXP81x PMIC

[Chen-Yu Tsai]

The AXP81x family of PMIC is used with the Allwinner A83T and H8 SoCs.
This includes the AXP813 and AXP818. There is no discernible difference
except the labeling. The AXP813 is paired with the A83T, while the
AXP818 is paired with the H8.

This patch adds a dtsi file for all the common bindings for these two
PMICs. Currently this is just listing all the regulator nodes. The
regulators are initialized based on their device node names.

In the future this would be expanded to include power supplies and
GPIO controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/axp81x.dtsi | 139 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 139 insertions(+)
 create mode 100644 arch/arm/boot/dts/axp81x.dtsi

diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi
new file mode 100644
index 000000000000..73b761f850c5
--- /dev/null
+++ b/arch/arm/boot/dts/axp81x.dtsi
@@ -0,0 +1,139 @@
+/*
+ * Copyright 2017 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/* AXP813/818 Integrated Power Management Chip */
+
+&axp81x {
+	interrupt-controller;
+	#interrupt-cells = <1>;
+
+	regulators {
+		/* Default work frequency for buck regulators */
+		x-powers,dcdc-freq = <3000>;
+
+		reg_dcdc1: dcdc1 {
+		};
+
+		reg_dcdc2: dcdc2 {
+		};
+
+		reg_dcdc3: dcdc3 {
+		};
+
+		reg_dcdc4: dcdc4 {
+		};
+
+		reg_dcdc5: dcdc5 {
+		};
+
+		reg_dcdc6: dcdc6 {
+		};
+
+		reg_dcdc7: dcdc7 {
+		};
+
+		reg_aldo1: aldo1 {
+		};
+
+		reg_aldo2: aldo2 {
+		};
+
+		reg_aldo3: aldo3 {
+		};
+
+		reg_dldo1: dldo1 {
+		};
+
+		reg_dldo2: dldo2 {
+		};
+
+		reg_dldo3: dldo3 {
+		};
+
+		reg_dldo4: dldo4 {
+		};
+
+		reg_eldo1: eldo1 {
+		};
+
+		reg_eldo2: eldo2 {
+		};
+
+		reg_eldo3: eldo3 {
+		};
+
+		reg_fldo1: fldo1 {
+		};
+
+		reg_fldo2: fldo2 {
+		};
+
+		reg_fldo3: fldo3 {
+		};
+
+		reg_ldo_io0: ldo-io0 {
+			/* Disable by default to avoid conflicts with GPIO */
+			status = "disabled";
+		};
+
+		reg_ldo_io1: ldo-io1 {
+			/* Disable by default to avoid conflicts with GPIO */
+			status = "disabled";
+		};
+
+		reg_rtc_ldo: rtc-ldo {
+			/* RTC_LDO is a fixed, always-on regulator */
+			regulator-always-on;
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+		};
+
+		reg_sw: sw {
+		};
+
+		reg_drivevbus: drivevbus {
+			status = "disabled";
+		};
+	};
+};
-- 
2.14.2

[PATCH v2 3/8] ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes

[Chen-Yu Tsai]

This patch adds device nodes for all the regulators of the AXP818 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 167 +++++++++++++++++++++--
 1 file changed, 155 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index 716a205c6dbb..bd53e5748991 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -44,7 +44,6 @@
 
 /dts-v1/;
 #include "sun8i-a83t.dtsi"
-#include "sunxi-common-regulators.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -95,6 +94,26 @@
 		refclk-frequency = <19200000>;
 	};
 
+	reg_usb1_vbus: reg-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
+	};
+
+	reg_usb2_vbus: reg-usb2-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb2-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+	};
+
 	sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,name = "On-board SPDIF";
@@ -127,7 +146,7 @@
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-	vmmc-supply = <&reg_vcc3v3>;
+	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
 	cd-inverted;
@@ -137,7 +156,7 @@
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
-	vmmc-supply = <&reg_vcc3v3>;
+	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <8>;
 	non-removable;
 	cap-mmc-hw-reset;
@@ -152,6 +171,9 @@
 		reg = <0x3a3>;
 		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		eldoin-supply = <&reg_dcdc1>;
+		swin-supply = <&reg_dcdc1>;
+		x-powers,drive-vbus-en;
 	};
 
 	ac100: codec@e89 {
@@ -179,22 +201,143 @@
 	};
 };
 
-&reg_usb1_vbus {
-	gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
-	status = "okay";
+#include "axp81x.dtsi"
+
+&reg_aldo1 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "vcc-1v8";
+};
+
+&reg_aldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "dram-pll";
+};
+
+&reg_aldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+	/*
+	 * The schematics say this should be 3.3V, but the FEX file says
+	 * it should be 3V. The latter makes sense, as the WiFi module's
+	 * I/O is indirectly powered from DCDC1, through SW. It is rated
+	 * at 2.98V maximum.
+	 */
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "vcc-3v";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpua";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpub";
+};
+
+&reg_dcdc4 {
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-gpu";
 };
 
-&reg_usb2_vbus {
-	gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+	regulator-always-on;
+	regulator-min-microvolt = <900000>;
+	regulator-max-microvolt = <900000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_dldo2 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "dp-pwr";
+};
+
+&reg_dldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <2500000>;
+	regulator-max-microvolt = <2500000>;
+	regulator-name = "ephy-io";
+};
+
+&reg_dldo4 {
+	/*
+	 * The PHY requires 20ms after all voltages are applied until core
+	 * logic is ready and 30ms after the reset pin is de-asserted.
+	 * Set a 100ms delay to account for PMIC ramp time and board traces.
+	 */
+	regulator-enable-ramp-delay = <100000>;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "ephy";
+};
+
+&reg_drivevbus {
+	regulator-name = "usb0-vbus";
 	status = "okay";
 };
 
-&reg_vcc3v0 {
-	status = "disabled";
+&reg_eldo1 {
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "dp-bridge-1";
+};
+
+&reg_eldo2 {
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "dp-bridge-2";
+};
+
+&reg_fldo1 {
+	/* TODO should be handled by USB PHY */
+	regulator-always-on;
+	regulator-min-microvolt = <1080000>;
+	regulator-max-microvolt = <1320000>;
+	regulator-name = "vdd12-hsic";
+};
+
+&reg_fldo2 {
+	/*
+	 * Despite the embedded CPUs core not being used in any way,
+	 * this must remain on or the system will hang.
+	 */
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+	regulator-name = "vcc-rtc";
 };
 
-&reg_vcc5v0 {
-	status = "disabled";
+&reg_sw {
+	regulator-name = "vcc-wifi-io";
 };
 
 &spdif {
-- 
2.14.2

[PATCH v2 4/8] ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes

[Chen-Yu Tsai]

This patch adds device nodes for all the regulators of the AXP813 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 141 +++++++++++++++++++++++++--
 1 file changed, 132 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 2bafd7e99ef7..78036b2f2ab4 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -44,7 +44,6 @@
 
 /dts-v1/;
 #include "sun8i-a83t.dtsi"
-#include "sunxi-common-regulators.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -59,6 +58,16 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	reg_usb1_vbus: reg-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+	};
 };
 
 &ehci0 {
@@ -71,7 +80,7 @@
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-	vmmc-supply = <&reg_vcc3v3>;
+	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
 	cd-inverted;
@@ -81,7 +90,8 @@
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
-	vmmc-supply = <&reg_vcc3v3>;
+	vmmc-supply = <&reg_dcdc1>;
+	vqmmc-supply = <&reg_dcdc1>;
 	bus-width = <8>;
 	non-removable;
 	cap-mmc-hw-reset;
@@ -96,6 +106,10 @@
 		reg = <0x3a3>;
 		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		eldoin-supply = <&reg_dcdc1>;
+		fldoin-supply = <&reg_dcdc5>;
+		swin-supply = <&reg_dcdc1>;
+		x-powers,drive-vbus-en;
 	};
 
 	ac100: codec@e89 {
@@ -123,17 +137,126 @@
 	};
 };
 
-&reg_usb1_vbus {
-	gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+#include "axp81x.dtsi"
+
+&reg_aldo1 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "vcc-1v8";
+};
+
+&reg_aldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "dram-pll";
+};
+
+&reg_aldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+	/* schematics says 3.1V but FEX file says 3.3V */
+	regulator-always-on;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpua";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpub";
+};
+
+&reg_dcdc4 {
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-gpu";
+};
+
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+	regulator-always-on;
+	regulator-min-microvolt = <900000>;
+	regulator-max-microvolt = <900000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+	/*
+	 * This powers both the WiFi/BT module's main power, I/O supply,
+	 * and external pull-ups on all the data lines. It should be set
+	 * to the same voltage as the I/O supply (DCDC1 in this case) to
+	 * avoid any leakage or mismatch.
+	 */
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi";
+};
+
+&reg_dldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <2500000>;
+	regulator-max-microvolt = <2500000>;
+	regulator-name = "vcc-pd";
+};
+
+&reg_drivevbus {
+	regulator-name = "usb0-vbus";
 	status = "okay";
 };
 
-&reg_vcc3v0 {
-	status = "disabled";
+&reg_fldo1 {
+	regulator-min-microvolt = <1080000>;
+	regulator-max-microvolt = <1320000>;
+	regulator-name = "vdd12-hsic";
+};
+
+&reg_fldo2 {
+	/*
+	 * Despite the embedded CPUs core not being used in any way,
+	 * this must remain on or the system will hang.
+	 */
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+	regulator-name = "vcc-rtc";
 };
 
-&reg_vcc5v0 {
-	status = "disabled";
+&reg_sw {
+	/*
+	 * The PHY requires 20ms after all voltages
+	 * are applied until core logic is ready and
+	 * 30ms after the reset pin is de-asserted.
+	 * Set a 100ms delay to account for PMIC
+	 * ramp time and board traces.
+	 */
+	regulator-enable-ramp-delay = <100000>;
+	regulator-name = "vcc-ephy";
 };
 
 &uart0 {
-- 
2.14.2

[PATCH v2 5/8] ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes

[Chen-Yu Tsai]

This patch adds device nodes for all the regulators of the AXP818 PMIC.
Sunxi common regulators are removed, and USB VBUS regulators are added.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts  | 147 +++++++++++++++++++--
 1 file changed, 134 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
index 1f0d60afb25b..5091cecbcd1e 100644
--- a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
@@ -43,7 +43,8 @@
 
 /dts-v1/;
 #include "sun8i-a83t.dtsi"
-#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "Allwinner A83T H8Homlet Proto Dev Board v2.0";
@@ -56,6 +57,26 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	reg_usb0_vbus: reg-usb0-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb0-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+	};
+
+	reg_usb1_vbus: reg-usb1-vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+	};
 };
 
 &ehci0 {
@@ -65,7 +86,7 @@
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-	vmmc-supply = <&reg_vcc3v0>;
+	vmmc-supply = <&reg_dcdc1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
 	bus-width = <4>;
 	cd-inverted;
@@ -75,7 +96,8 @@
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
-	vmmc-supply = <&reg_vcc3v0>;
+	vmmc-supply = <&reg_dcdc1>;
+	vqmmc-supply = <&reg_dcdc1>;
 	bus-width = <8>;
 	non-removable;
 	cap-mmc-hw-reset;
@@ -86,16 +108,6 @@
 	status = "okay";
 };
 
-&reg_usb0_vbus {
-	gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
-	status = "okay";
-};
-
-&reg_usb1_vbus {
-	gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
-	status = "okay";
-};
-
 &r_rsb {
 	status = "okay";
 
@@ -104,6 +116,8 @@
 		reg = <0x3a3>;
 		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		eldoin-supply = <&reg_dcdc1>;
+		swin-supply = <&reg_dcdc1>;
 	};
 
 	ac100: codec@e89 {
@@ -131,6 +145,113 @@
 	};
 };
 
+#include "axp81x.dtsi"
+
+&reg_aldo1 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "vcc-1v8";
+};
+
+&reg_aldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "dram-pll";
+};
+
+&reg_aldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+	regulator-always-on;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpua";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpub";
+};
+
+&reg_dcdc4 {
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-gpu";
+};
+
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+	regulator-always-on;
+	regulator-min-microvolt = <900000>;
+	regulator-max-microvolt = <900000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_dldo2 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-mipi";
+};
+
+&reg_dldo4 {
+	/*
+	 * The PHY requires 20ms after all voltages are applied until core
+	 * logic is ready and 30ms after the reset pin is de-asserted.
+	 * Set a 100ms delay to account for PMIC ramp time and board traces.
+	 */
+	regulator-enable-ramp-delay = <100000>;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-ephy";
+};
+
+&reg_fldo1 {
+	regulator-min-microvolt = <1080000>;
+	regulator-max-microvolt = <1320000>;
+	regulator-name = "vdd12-hsic";
+};
+
+&reg_fldo2 {
+	/*
+	 * Despite the embedded CPUs core not being used in any way,
+	 * this must remain on or the system will hang.
+	 */
+	regulator-always-on;
+	regulator-min-microvolt = <700000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+	regulator-name = "vcc-rtc";
+};
+
+&reg_sw {
+	regulator-name = "vcc-wifi";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pb_pins>;
-- 
2.14.2

[PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Chen-Yu Tsai]

mmc1 only has 1 possible pinmux setting.

Move any settings to the dtsi file and set it by default.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 2 --
 arch/arm/boot/dts/sun8i-a83t.dtsi         | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
index 723641f56a74..de0be140338b 100644
--- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
@@ -115,8 +115,6 @@
 &mmc1 {
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins>;
 	vmmc-supply = <&reg_vcc3v3>;
 	vqmmc-supply = <&reg_vcc3v3>;
 	non-removable;
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index ce6e887c8938..19acae1b4089 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -212,6 +212,8 @@
 			resets = <&ccu RST_BUS_MMC1>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc1_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.14.2

Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Joonas Kylmälä]

Hi,

Chen-Yu Tsai:
> mmc1 only has 1 possible pinmux setting.

What if someone is using the MMC with bus width 1 and then using the
remaining 3 pins for something else?

Joonas

Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Chen-Yu Tsai]

On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä <joonas.kylmala@iki.fi> wrote:
> Hi,
>
> Chen-Yu Tsai:
>> mmc1 only has 1 possible pinmux setting.
>
> What if someone is using the MMC with bus width 1 and then using the
> remaining 3 pins for something else?

I would very much like to see such a design. Currently the devices
we see all follow Allwinner's reference design, with only minor
modifications. As such, mmc1 is used exclusively for connecting
SDIO-based WiFi modules.

If such a radical(?) design is done, the vendor can always add
a "mmc1-1bit-pins" setting and override the default.

ChenYu

Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[icenowy]

在 2017-10-19 14:48，Chen-Yu Tsai 写道：
> On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä 
> <joonas.kylmala@iki.fi> wrote:
>> Hi,
>> 
>> Chen-Yu Tsai:
>>> mmc1 only has 1 possible pinmux setting.
>> 
>> What if someone is using the MMC with bus width 1 and then using the
>> remaining 3 pins for something else?
> 
> I would very much like to see such a design. Currently the devices
> we see all follow Allwinner's reference design, with only minor
> modifications. As such, mmc1 is used exclusively for connecting
> SDIO-based WiFi modules.
> 
> If such a radical(?) design is done, the vendor can always add
> a "mmc1-1bit-pins" setting and override the default.

I think this kind of thing happened on A13 -- the MMC2 of A13 is
8-bit, but Lichee Pi One wires it to a SD card slot (4-bit); then
the remaining 4 data lines are wired out as GPIO. (Lichee Pi's
do not like obeying reference design ;-) )

But I think a MMC/SDIO device under 1-bit mode is too slow that
maybe no one will use such a setup.

> 
> ChenYu

Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Chen-Yu Tsai]

On Thu, Oct 19, 2017 at 4:18 PM,  <icenowy@aosc.io> wrote:
> 在 2017-10-19 14:48，Chen-Yu Tsai 写道：
>>
>> On Wed, Oct 18, 2017 at 11:00 PM, Joonas Kylmälä <joonas.kylmala@iki.fi>
>> wrote:
>>>
>>> Hi,
>>>
>>> Chen-Yu Tsai:
>>>>
>>>> mmc1 only has 1 possible pinmux setting.
>>>
>>>
>>> What if someone is using the MMC with bus width 1 and then using the
>>> remaining 3 pins for something else?
>>
>>
>> I would very much like to see such a design. Currently the devices
>> we see all follow Allwinner's reference design, with only minor
>> modifications. As such, mmc1 is used exclusively for connecting
>> SDIO-based WiFi modules.
>>
>> If such a radical(?) design is done, the vendor can always add
>> a "mmc1-1bit-pins" setting and override the default.
>
>
> I think this kind of thing happened on A13 -- the MMC2 of A13 is
> 8-bit, but Lichee Pi One wires it to a SD card slot (4-bit); then
> the remaining 4 data lines are wired out as GPIO. (Lichee Pi's
> do not like obeying reference design ;-) )

For MMC2 we have mmc2_pins (4-bit) and mmc2_8bit_emmc_pins (8-bit
+ emmc reset pin).

ChenYu

>
> But I think a MMC/SDIO device under 1-bit mode is too slow that
> maybe no one will use such a setup.
>
>>
>> ChenYu
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to linux-sunxi+unsubscribe@googlegroups.com.
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Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Joonas Kylmälä]

Chen-Yu Tsai:
>> Chen-Yu Tsai:
>>> mmc1 only has 1 possible pinmux setting.
>>
>> What if someone is using the MMC with bus width 1 and then using the
>> remaining 3 pins for something else?
> 
> I would very much like to see such a design. Currently the devices
> we see all follow Allwinner's reference design, with only minor
> modifications. As such, mmc1 is used exclusively for connecting
> SDIO-based WiFi modules.
> 
> If such a radical(?) design is done, the vendor can always add
> a "mmc1-1bit-pins" setting and override the default.

Alright. So could we then make similar patches for other SoCs that have
the same situation with the MMC pinmuxing? I.e. let's move the pinctrl
to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could
be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T
to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to
be added to the A38T dtsi.

Joonas

Re: [linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file

[Chen-Yu Tsai]

On Fri, Oct 20, 2017 at 12:02 AM, Joonas Kylmälä <joonas.kylmala@iki.fi> wrote:
> Chen-Yu Tsai:
>>> Chen-Yu Tsai:
>>>> mmc1 only has 1 possible pinmux setting.
>>>
>>> What if someone is using the MMC with bus width 1 and then using the
>>> remaining 3 pins for something else?
>>
>> I would very much like to see such a design. Currently the devices
>> we see all follow Allwinner's reference design, with only minor
>> modifications. As such, mmc1 is used exclusively for connecting
>> SDIO-based WiFi modules.
>>
>> If such a radical(?) design is done, the vendor can always add
>> a "mmc1-1bit-pins" setting and override the default.
>
> Alright. So could we then make similar patches for other SoCs that have
> the same situation with the MMC pinmuxing? I.e. let's move the pinctrl
> to the dtsi file from the dts files. With H3 SDC0 and SDC1 nodes could
> be moved then to the dtsi. Can't we also move the SDC0 pinctrl in A83T
> to the dtsi file? Though, in order to do that mmc0_cd_pin node needs to
> be added to the A38T dtsi.

Yes. We are slowly doing this and other cleanups. This is somewhat
boring and tedious, and it's not exactly a high priority item. You
might have noticed Maxime recently sent patches to clean up sun4i
and sun9i.

ChenYu

[PATCH v2 7/8] ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1

[Chen-Yu Tsai]

The WiFi side of the AP6330 WiFi/BT combo module is connected to
mmc1. There are also GPIOs for enable and interrupts. An external
clock from the AC100 RTC is also used.

Enable WiFi on this board by enabling mmc1 and adding the power
sequencing clocks and GPIO, as well as the chip's interrupt line.

For the WiFi module to correctly detect the frequency of its main
oscillator, the external low power clock must be set to 32768 Hz.

Their does not seem to be proper out-of-band interrupt support
for the BCM4330 chip within the AP6330 module. This part is left
out for now.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index bd53e5748991..7f0a3f6d0cf2 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -131,6 +131,17 @@
 		#sound-dai-cells = <0>;
 		compatible = "linux,spdif-dit";
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&ac100_rtc 1>;
+		clock-names = "ext_clock";
+		/* The WiFi low power clock must be 32768 Hz */
+		assigned-clocks = <&ac100_rtc 1>;
+		assigned-clock-rates = <32768>;
+		/* enables internal regulator and de-asserts reset */
+		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+	};
 };
 
 &ehci0 {
@@ -153,6 +164,15 @@
 	status = "okay";
 };
 
+&mmc1 {
+	vmmc-supply = <&reg_dcdc1>;
+	vqmmc-supply = <&reg_sw>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+};
+
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
-- 
2.14.2

[PATCH v2 8/8] ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1

[Chen-Yu Tsai]

The WiFi side of the AP6212 WiFi/BT combo module is connected to
mmc1. There are also GPIOs for enable and interrupts. An external
clock from the AC100 RTC is also used.

Enable WiFi on this board by enabling mmc1 and adding the power
sequencing clocks and GPIO, as well as the chip's interrupt line.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 78036b2f2ab4..c606af3dbfed 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -68,6 +68,17 @@
 		enable-active-high;
 		gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&ac100_rtc 1>;
+		clock-names = "ext_clock";
+		/* The WiFi low power clock must be 32768 Hz */
+		assigned-clocks = <&ac100_rtc 1>;
+		assigned-clock-rates = <32768>;
+		/* enables internal regulator and de-asserts reset */
+		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+	};
 };
 
 &ehci0 {
@@ -87,6 +98,23 @@
 	status = "okay";
 };
 
+&mmc1 {
+	vmmc-supply = <&reg_dldo1>;
+	vqmmc-supply = <&reg_dldo1>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	brcmf: wifi@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&r_pio>;
+		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-names = "host-wake";
+	};
+};
+
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
-- 
2.14.2

Re: [PATCH v2 0/8] ARM: sun8i: a83t: Enable AXP813/AXP818 regulators

[Maxime Ripard]

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On Wed, Oct 18, 2017 at 04:31:30PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This series was originally name "regulator: axp20x: Add support for
> AXP813/818 regulators". It adds support for the X-Powers AXP813/818 [1]
> PMICs' regulators. The series is quite straightforward.
> 
> Changes since v1:
> 
>   - Regulator driver patches were merged and now dropped from the series
> 
>   - Chose simpler names for the regulators
> 
>   - Added SDIO WiFi enablement patches
> 
> Patch 1 adds a axp20x-regulator cell for AXP813, thereby enabling the
> regulators.
> 
> Patch 2 adds a shared dtsi file for the PMIC. This currently contains
> a list of regulator nodes, but will be expanded with Quentin's power
> supply work.
> 
> Patches 3 through 5 add regulator nodes to board dts files for the A83T
> boards that I have. They are not squashed together as each file has
> substantial additions.
> 
> Patch 6 moves the mmc1 pinmux setting over to the dtsi, and sets it by
> default.
> 
> Patches 7 & 8 enable SDIO-based WiFi on the Cubietruck Plus and Banana
> Pi M3.
> 
> Originally my work also included enabling Ethernet. But the Ethernet
> bindings were reverted. Everything can be found here:
> 
>     https://github.com/wens/linux/tree/a83t-regulator-wifi-eth
> 
> Please have a look.
> 
> Lee, we need the mfd changes merged in before merging the dts changes.
> Otherwise, mmc would break as vmmc/vqmmc is tied to the PMIC regulators.

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

For the whole serie.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH v2 0/8] ARM: sun8i: a83t: Enable AXP813/AXP818 regulators

[Maxime Ripard]

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On Wed, Oct 18, 2017 at 04:31:30PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
> 
> This series was originally name "regulator: axp20x: Add support for
> AXP813/818 regulators". It adds support for the X-Powers AXP813/818 [1]
> PMICs' regulators. The series is quite straightforward.
> 
> Changes since v1:
> 
>   - Regulator driver patches were merged and now dropped from the series
> 
>   - Chose simpler names for the regulators
> 
>   - Added SDIO WiFi enablement patches
> 
> Patch 1 adds a axp20x-regulator cell for AXP813, thereby enabling the
> regulators.
> 
> Patch 2 adds a shared dtsi file for the PMIC. This currently contains
> a list of regulator nodes, but will be expanded with Quentin's power
> supply work.
> 
> Patches 3 through 5 add regulator nodes to board dts files for the A83T
> boards that I have. They are not squashed together as each file has
> substantial additions.
> 
> Patch 6 moves the mmc1 pinmux setting over to the dtsi, and sets it by
> default.
> 
> Patches 7 & 8 enable SDIO-based WiFi on the Cubietruck Plus and Banana
> Pi M3.

Applied patches 2-8, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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