From: Li Wei <liwei213@huawei.com>
To: <robh+dt@kernel.org>, <mark.rutland@arm.com>,
<xuwei5@hisilicon.com>, <catalin.marinas@arm.com>,
<will.deacon@arm.com>, <vinholikatti@gmail.com>,
<jejb@linux.vnet.ibm.com>, <martin.petersen@oracle.com>,
<khilman@baylibre.com>, <arnd@arndb.de>,
<gregory.clement@free-electrons.com>,
<thomas.petazzoni@free-electrons.com>,
<yamada.masahiro@socionext.com>, <riku.voipio@linaro.org>,
<treding@nvidia.com>, <krzk@kernel.org>, <eric@anholt.net>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-scsi@vger.kernel.org>
Cc: <guodong.xu@linaro.org>, <liwei213@huawei.com>,
<fengbaopeng@hisilicon.com>, <lihuan41@hisilicon.com>,
<wangyupeng4@hisilicon.com>
Subject: [PATCH v5 3/5] arm64: dts: add ufs dts node
Date: Fri, 20 Oct 2017 16:52:57 +0800 [thread overview]
Message-ID: <20171020085259.8093-4-liwei213@huawei.com> (raw)
In-Reply-To: <20171020085259.8093-1-liwei213@huawei.com>
arm64: dts: add ufs node for Hisilicon.
Signed-off-by: Li Wei <liwei213@huawei.com>
---
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 5 +++++
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 19 +++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index fd4705c451e2..677d0e41667f 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -276,3 +276,8 @@
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
};
};
+
+&ufs {
+ reset-gpios = <&gpio18 1 0>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index b7a90d632959..a24ab8472347 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -978,5 +978,24 @@
clocks = <&crg_ctrl HI3660_OSC32K>;
clock-names = "apb_pclk";
};
+
+ ufs: ufs@ff3b0000 {
+ compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
+ /* 0: HCI standard */
+ /* 1: UFS SYS CTRL */
+ reg = <0x0 0xff3b0000 0x0 0x1000>,
+ <0x0 0xff3b1000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
+ <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
+ clock-names = "clk_ref", "clk_phy";
+ freq-table-hz = <0 0>, <0 0>;
+ /* offset: 0x84; bit: 12 */
+ /* offset: 0x84; bit: 7 */
+ resets = <&crg_rst 0x84 12>,
+ <&crg_rst 0x84 7>;
+ reset-names = "rst", "assert";
+ };
};
};
--
2.11.0
next prev parent reply other threads:[~2017-10-20 8:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-20 8:52 [PATCH v5 0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC Li Wei
2017-10-20 8:52 ` [PATCH v5 1/5] scsi: ufs: add Hisilicon ufs driver code Li Wei
2017-10-20 8:52 ` [PATCH v5 2/5] dt-bindings: scsi: ufs: add document for hisi-ufs Li Wei
2017-10-20 9:15 ` Arnd Bergmann
2017-10-21 9:59 ` 答复: " liwei (CM)
2017-10-24 9:06 ` liwei (CM)
2017-10-30 15:21 ` Arnd Bergmann
2017-10-31 12:35 ` 答复: " liwei (CM)
2017-12-01 3:17 ` liwei (CM)
2017-10-20 8:52 ` Li Wei [this message]
2017-10-20 8:52 ` [PATCH v5 4/5] arm64: defconfig: enable configs for Hisilicon ufs Li Wei
2017-10-20 8:52 ` [PATCH v5 5/5] arm64: defconfig: enable f2fs and squashfs Li Wei
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