* [PATCH v4 1/5] fw_cfg: fix the command line module name
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
@ 2017-10-31 15:19 ` Marc-André Lureau
2017-11-12 12:40 ` Gabriel L. Somlo
2017-10-31 15:19 ` [PATCH v4 2/5] fw_cfg: add DMA register Marc-André Lureau
` (4 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-10-31 15:19 UTC (permalink / raw)
To: linux-kernel; +Cc: somlo, qemu-devel, mst, Marc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 0e2011636fbb..5cfe39f7a45f 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -10,9 +10,9 @@
* and select subsets of aarch64), a Device Tree node (on arm), or using
* a kernel module (or command line) parameter with the following syntax:
*
- * [fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
* or
- * [fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
*
* where:
* <size> := size of ioport or mmio range
@@ -21,9 +21,9 @@
* <data_off> := (optional) offset of data register
*
* e.g.:
- * fw_cfg.ioport=2@0x510:0:1 (the default on x86)
+ * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86)
* or
- * fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
+ * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
*/
#include <linux/module.h>
--
2.15.0.rc0.40.gaefcc5f6f
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v4 1/5] fw_cfg: fix the command line module name
2017-10-31 15:19 ` [PATCH v4 1/5] fw_cfg: fix the command line module name Marc-André Lureau
@ 2017-11-12 12:40 ` Gabriel L. Somlo
0 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:40 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:34PM +0100, Marc-André Lureau wrote:
> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Gabriel Somlo <somlo@cmu.edu>
> ---
> drivers/firmware/qemu_fw_cfg.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
> index 0e2011636fbb..5cfe39f7a45f 100644
> --- a/drivers/firmware/qemu_fw_cfg.c
> +++ b/drivers/firmware/qemu_fw_cfg.c
> @@ -10,9 +10,9 @@
> * and select subsets of aarch64), a Device Tree node (on arm), or using
> * a kernel module (or command line) parameter with the following syntax:
> *
> - * [fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
> + * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
> * or
> - * [fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
> + * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
> *
> * where:
> * <size> := size of ioport or mmio range
> @@ -21,9 +21,9 @@
> * <data_off> := (optional) offset of data register
> *
> * e.g.:
> - * fw_cfg.ioport=2@0x510:0:1 (the default on x86)
> + * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86)
> * or
> - * fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
> + * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
> */
>
> #include <linux/module.h>
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v4 2/5] fw_cfg: add DMA register
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
2017-10-31 15:19 ` [PATCH v4 1/5] fw_cfg: fix the command line module name Marc-André Lureau
@ 2017-10-31 15:19 ` Marc-André Lureau
2017-11-12 12:41 ` Gabriel L. Somlo
2017-10-31 15:19 ` [PATCH v4 3/5] fw_cfg: do DMA read operation Marc-André Lureau
` (3 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-10-31 15:19 UTC (permalink / raw)
To: linux-kernel; +Cc: somlo, qemu-devel, mst, Marc-André Lureau
Add an optional <dma_off> kernel module (or command line) parameter
using the following syntax:
[qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
or
[qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
and initializes the register address using given or default offset.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 53 ++++++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 12 deletions(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 5cfe39f7a45f..1f3e8545dab7 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -10,20 +10,21 @@
* and select subsets of aarch64), a Device Tree node (on arm), or using
* a kernel module (or command line) parameter with the following syntax:
*
- * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
* or
- * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
*
* where:
* <size> := size of ioport or mmio range
* <base> := physical base address of ioport or mmio range
* <ctrl_off> := (optional) offset of control register
* <data_off> := (optional) offset of data register
+ * <dma_off> := (optional) offset of dma register
*
* e.g.:
- * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86)
+ * qemu_fw_cfg.ioport=12@0x510:0:1:4 (the default on x86)
* or
- * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
+ * qemu_fw_cfg.mmio=16@0x9020000:8:0:16 (the default on arm)
*/
#include <linux/module.h>
@@ -63,6 +64,7 @@ static resource_size_t fw_cfg_p_size;
static void __iomem *fw_cfg_dev_base;
static void __iomem *fw_cfg_reg_ctrl;
static void __iomem *fw_cfg_reg_data;
+static void __iomem *fw_cfg_reg_dma;
/* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */
static DEFINE_MUTEX(fw_cfg_dev_lock);
@@ -118,12 +120,14 @@ static void fw_cfg_io_cleanup(void)
# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64))
# define FW_CFG_CTRL_OFF 0x08
# define FW_CFG_DATA_OFF 0x00
+# define FW_CFG_DMA_OFF 0x10
# elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */
# define FW_CFG_CTRL_OFF 0x00
# define FW_CFG_DATA_OFF 0x02
# elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */
# define FW_CFG_CTRL_OFF 0x00
# define FW_CFG_DATA_OFF 0x01
+# define FW_CFG_DMA_OFF 0x04
# else
# error "QEMU FW_CFG not available on this architecture!"
# endif
@@ -133,7 +137,7 @@ static void fw_cfg_io_cleanup(void)
static int fw_cfg_do_platform_probe(struct platform_device *pdev)
{
char sig[FW_CFG_SIG_SIZE];
- struct resource *range, *ctrl, *data;
+ struct resource *range, *ctrl, *data, *dma;
/* acquire i/o range details */
fw_cfg_is_mmio = false;
@@ -170,6 +174,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
/* were custom register offsets provided (e.g. on the command line)? */
ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl");
data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data");
+ dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma");
if (ctrl && data) {
fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start;
fw_cfg_reg_data = fw_cfg_dev_base + data->start;
@@ -179,6 +184,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF;
}
+ if (dma)
+ fw_cfg_reg_dma = fw_cfg_dev_base + dma->start;
+#ifdef FW_CFG_DMA_OFF
+ else
+ fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF;
+#endif
+
/* verify fw_cfg device signature */
fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
@@ -628,6 +640,7 @@ static struct platform_device *fw_cfg_cmdline_dev;
/* use special scanf/printf modifier for phys_addr_t, resource_size_t */
#define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \
":%" __PHYS_ADDR_PREFIX "i" \
+ ":%" __PHYS_ADDR_PREFIX "i%n" \
":%" __PHYS_ADDR_PREFIX "i%n"
#define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \
@@ -637,12 +650,15 @@ static struct platform_device *fw_cfg_cmdline_dev;
":%" __PHYS_ADDR_PREFIX "u" \
":%" __PHYS_ADDR_PREFIX "u"
+#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \
+ ":%" __PHYS_ADDR_PREFIX "u"
+
static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
{
- struct resource res[3] = {};
+ struct resource res[4] = {};
char *str;
phys_addr_t base;
- resource_size_t size, ctrl_off, data_off;
+ resource_size_t size, ctrl_off, data_off, dma_off;
int processed, consumed = 0;
/* only one fw_cfg device can exist system-wide, so if one
@@ -658,19 +674,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
/* consume "<size>" portion of command line argument */
size = memparse(arg, &str);
- /* get "@<base>[:<ctrl_off>:<data_off>]" chunks */
+ /* get "@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]" chunks */
processed = sscanf(str, PH_ADDR_SCAN_FMT,
&base, &consumed,
- &ctrl_off, &data_off, &consumed);
+ &ctrl_off, &data_off, &consumed,
+ &dma_off, &consumed);
- /* sscanf() must process precisely 1 or 3 chunks:
+ /* sscanf() must process precisely 1, 3 or 4 chunks:
* <base> is mandatory, optionally followed by <ctrl_off>
- * and <data_off>;
+ * and <data_off>, and <dma_off>;
* there must be no extra characters after the last chunk,
* so str[consumed] must be '\0'.
*/
if (str[consumed] ||
- (processed != 1 && processed != 3))
+ (processed != 1 && processed != 3 && processed != 4))
return -EINVAL;
res[0].start = base;
@@ -687,6 +704,11 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
res[2].start = data_off;
res[2].flags = IORESOURCE_REG;
}
+ if (processed > 3) {
+ res[3].name = "dma";
+ res[3].start = dma_off;
+ res[3].flags = IORESOURCE_REG;
+ }
/* "processed" happens to nicely match the number of resources
* we need to pass in to this platform device.
@@ -721,6 +743,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp)
fw_cfg_cmdline_dev->resource[0].start,
fw_cfg_cmdline_dev->resource[1].start,
fw_cfg_cmdline_dev->resource[2].start);
+ case 4:
+ return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT,
+ resource_size(&fw_cfg_cmdline_dev->resource[0]),
+ fw_cfg_cmdline_dev->resource[0].start,
+ fw_cfg_cmdline_dev->resource[1].start,
+ fw_cfg_cmdline_dev->resource[2].start,
+ fw_cfg_cmdline_dev->resource[3].start);
}
/* Should never get here */
--
2.15.0.rc0.40.gaefcc5f6f
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v4 2/5] fw_cfg: add DMA register
2017-10-31 15:19 ` [PATCH v4 2/5] fw_cfg: add DMA register Marc-André Lureau
@ 2017-11-12 12:41 ` Gabriel L. Somlo
0 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:41 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:35PM +0100, Marc-André Lureau wrote:
> Add an optional <dma_off> kernel module (or command line) parameter
> using the following syntax:
>
> [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
> or
> [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
>
> and initializes the register address using given or default offset.
>
> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Gabriel Somlo <somlo@cmu.edu>
> ---
> drivers/firmware/qemu_fw_cfg.c | 53 ++++++++++++++++++++++++++++++++----------
> 1 file changed, 41 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
> index 5cfe39f7a45f..1f3e8545dab7 100644
> --- a/drivers/firmware/qemu_fw_cfg.c
> +++ b/drivers/firmware/qemu_fw_cfg.c
> @@ -10,20 +10,21 @@
> * and select subsets of aarch64), a Device Tree node (on arm), or using
> * a kernel module (or command line) parameter with the following syntax:
> *
> - * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
> + * [qemu_fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
> * or
> - * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
> + * [qemu_fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
> *
> * where:
> * <size> := size of ioport or mmio range
> * <base> := physical base address of ioport or mmio range
> * <ctrl_off> := (optional) offset of control register
> * <data_off> := (optional) offset of data register
> + * <dma_off> := (optional) offset of dma register
> *
> * e.g.:
> - * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86)
> + * qemu_fw_cfg.ioport=12@0x510:0:1:4 (the default on x86)
> * or
> - * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
> + * qemu_fw_cfg.mmio=16@0x9020000:8:0:16 (the default on arm)
> */
>
> #include <linux/module.h>
> @@ -63,6 +64,7 @@ static resource_size_t fw_cfg_p_size;
> static void __iomem *fw_cfg_dev_base;
> static void __iomem *fw_cfg_reg_ctrl;
> static void __iomem *fw_cfg_reg_data;
> +static void __iomem *fw_cfg_reg_dma;
>
> /* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */
> static DEFINE_MUTEX(fw_cfg_dev_lock);
> @@ -118,12 +120,14 @@ static void fw_cfg_io_cleanup(void)
> # if (defined(CONFIG_ARM) || defined(CONFIG_ARM64))
> # define FW_CFG_CTRL_OFF 0x08
> # define FW_CFG_DATA_OFF 0x00
> +# define FW_CFG_DMA_OFF 0x10
> # elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */
> # define FW_CFG_CTRL_OFF 0x00
> # define FW_CFG_DATA_OFF 0x02
> # elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */
> # define FW_CFG_CTRL_OFF 0x00
> # define FW_CFG_DATA_OFF 0x01
> +# define FW_CFG_DMA_OFF 0x04
> # else
> # error "QEMU FW_CFG not available on this architecture!"
> # endif
> @@ -133,7 +137,7 @@ static void fw_cfg_io_cleanup(void)
> static int fw_cfg_do_platform_probe(struct platform_device *pdev)
> {
> char sig[FW_CFG_SIG_SIZE];
> - struct resource *range, *ctrl, *data;
> + struct resource *range, *ctrl, *data, *dma;
>
> /* acquire i/o range details */
> fw_cfg_is_mmio = false;
> @@ -170,6 +174,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
> /* were custom register offsets provided (e.g. on the command line)? */
> ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl");
> data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data");
> + dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma");
> if (ctrl && data) {
> fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start;
> fw_cfg_reg_data = fw_cfg_dev_base + data->start;
> @@ -179,6 +184,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
> fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF;
> }
>
> + if (dma)
> + fw_cfg_reg_dma = fw_cfg_dev_base + dma->start;
> +#ifdef FW_CFG_DMA_OFF
> + else
> + fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF;
> +#endif
> +
> /* verify fw_cfg device signature */
> fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
> if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
> @@ -628,6 +640,7 @@ static struct platform_device *fw_cfg_cmdline_dev;
> /* use special scanf/printf modifier for phys_addr_t, resource_size_t */
> #define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \
> ":%" __PHYS_ADDR_PREFIX "i" \
> + ":%" __PHYS_ADDR_PREFIX "i%n" \
> ":%" __PHYS_ADDR_PREFIX "i%n"
>
> #define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \
> @@ -637,12 +650,15 @@ static struct platform_device *fw_cfg_cmdline_dev;
> ":%" __PHYS_ADDR_PREFIX "u" \
> ":%" __PHYS_ADDR_PREFIX "u"
>
> +#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \
> + ":%" __PHYS_ADDR_PREFIX "u"
> +
> static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
> {
> - struct resource res[3] = {};
> + struct resource res[4] = {};
> char *str;
> phys_addr_t base;
> - resource_size_t size, ctrl_off, data_off;
> + resource_size_t size, ctrl_off, data_off, dma_off;
> int processed, consumed = 0;
>
> /* only one fw_cfg device can exist system-wide, so if one
> @@ -658,19 +674,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
> /* consume "<size>" portion of command line argument */
> size = memparse(arg, &str);
>
> - /* get "@<base>[:<ctrl_off>:<data_off>]" chunks */
> + /* get "@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]" chunks */
> processed = sscanf(str, PH_ADDR_SCAN_FMT,
> &base, &consumed,
> - &ctrl_off, &data_off, &consumed);
> + &ctrl_off, &data_off, &consumed,
> + &dma_off, &consumed);
>
> - /* sscanf() must process precisely 1 or 3 chunks:
> + /* sscanf() must process precisely 1, 3 or 4 chunks:
> * <base> is mandatory, optionally followed by <ctrl_off>
> - * and <data_off>;
> + * and <data_off>, and <dma_off>;
> * there must be no extra characters after the last chunk,
> * so str[consumed] must be '\0'.
> */
> if (str[consumed] ||
> - (processed != 1 && processed != 3))
> + (processed != 1 && processed != 3 && processed != 4))
> return -EINVAL;
>
> res[0].start = base;
> @@ -687,6 +704,11 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
> res[2].start = data_off;
> res[2].flags = IORESOURCE_REG;
> }
> + if (processed > 3) {
> + res[3].name = "dma";
> + res[3].start = dma_off;
> + res[3].flags = IORESOURCE_REG;
> + }
>
> /* "processed" happens to nicely match the number of resources
> * we need to pass in to this platform device.
> @@ -721,6 +743,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp)
> fw_cfg_cmdline_dev->resource[0].start,
> fw_cfg_cmdline_dev->resource[1].start,
> fw_cfg_cmdline_dev->resource[2].start);
> + case 4:
> + return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT,
> + resource_size(&fw_cfg_cmdline_dev->resource[0]),
> + fw_cfg_cmdline_dev->resource[0].start,
> + fw_cfg_cmdline_dev->resource[1].start,
> + fw_cfg_cmdline_dev->resource[2].start,
> + fw_cfg_cmdline_dev->resource[3].start);
> }
>
> /* Should never get here */
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v4 3/5] fw_cfg: do DMA read operation
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
2017-10-31 15:19 ` [PATCH v4 1/5] fw_cfg: fix the command line module name Marc-André Lureau
2017-10-31 15:19 ` [PATCH v4 2/5] fw_cfg: add DMA register Marc-André Lureau
@ 2017-10-31 15:19 ` Marc-André Lureau
2017-11-12 12:42 ` Gabriel L. Somlo
2017-10-31 15:19 ` [PATCH v4 4/5] crash: export paddr_vmcoreinfo_note() Marc-André Lureau
` (2 subsequent siblings)
5 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-10-31 15:19 UTC (permalink / raw)
To: linux-kernel; +Cc: somlo, qemu-devel, mst, Marc-André Lureau
Modify fw_cfg_read_blob() to use DMA if the device supports it.
Return errors, because the operation may fail.
To avoid polling with unbound amount of time, the DMA operation is
expected to complete within 200ms, or will return ETIME error.
We may want to switch all the *buf addresses to use only kmalloc'ed
buffers (instead of using stack/image addresses with dma=false).
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 154 ++++++++++++++++++++++++++++++++++++-----
1 file changed, 137 insertions(+), 17 deletions(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 1f3e8545dab7..8ce5e49b7c62 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -33,6 +33,8 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
@@ -43,12 +45,26 @@ MODULE_LICENSE("GPL");
#define FW_CFG_ID 0x01
#define FW_CFG_FILE_DIR 0x19
+#define FW_CFG_VERSION_DMA 0x02
+#define FW_CFG_DMA_CTL_ERROR 0x01
+#define FW_CFG_DMA_CTL_READ 0x02
+#define FW_CFG_DMA_CTL_SKIP 0x04
+#define FW_CFG_DMA_CTL_SELECT 0x08
+#define FW_CFG_DMA_CTL_WRITE 0x10
+#define FW_CFG_DMA_TIMEOUT 200 /* ms */
+
/* size in bytes of fw_cfg signature */
#define FW_CFG_SIG_SIZE 4
/* fw_cfg "file name" is up to 56 characters (including terminating nul) */
#define FW_CFG_MAX_FILE_PATH 56
+/* platform device for dma mapping */
+static struct device *dev;
+
+/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
+static u32 fw_cfg_rev;
+
/* fw_cfg file directory entry type */
struct fw_cfg_file {
u32 size;
@@ -57,6 +73,12 @@ struct fw_cfg_file {
char name[FW_CFG_MAX_FILE_PATH];
};
+struct fw_cfg_dma {
+ u32 control;
+ u32 length;
+ u64 address;
+} __packed;
+
/* fw_cfg device i/o register addresses */
static bool fw_cfg_is_mmio;
static phys_addr_t fw_cfg_p_base;
@@ -75,12 +97,93 @@ static inline u16 fw_cfg_sel_endianness(u16 key)
return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key);
}
+static inline bool fw_cfg_dma_enabled(void)
+{
+ return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma;
+}
+
+static bool fw_cfg_wait_for_control(struct fw_cfg_dma *d, unsigned long timeout)
+{
+ ktime_t start;
+ ktime_t stop;
+
+ start = ktime_get();
+ stop = ktime_add(start, ms_to_ktime(timeout));
+
+ do {
+ if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0)
+ return true;
+
+ usleep_range(50, 100);
+ } while (ktime_before(ktime_get(), stop));
+
+ return false;
+}
+
+static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
+{
+ dma_addr_t dma_addr = 0;
+ struct fw_cfg_dma *d;
+ dma_addr_t dma;
+ ssize_t ret = length;
+ enum dma_data_direction dir =
+ (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
+
+ if (address && length) {
+ dma_addr = dma_map_single(dev, address, length, dir);
+ if (dma_mapping_error(NULL, dma_addr)) {
+ WARN(1, "%s: failed to map address\n", __func__);
+ return -EFAULT;
+ }
+ }
+
+ d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA);
+ if (!d) {
+ ret = -ENOMEM;
+ goto end;
+ }
+
+ dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL);
+ if (dma_mapping_error(NULL, dma)) {
+ WARN(1, "%s: failed to map fw_cfg_dma\n", __func__);
+ ret = -EFAULT;
+ goto end;
+ }
+
+ *d = (struct fw_cfg_dma) {
+ .address = cpu_to_be64(dma_addr),
+ .length = cpu_to_be32(length),
+ .control = cpu_to_be32(control)
+ };
+
+ iowrite32be((u64)dma >> 32, fw_cfg_reg_dma);
+ iowrite32be(dma, fw_cfg_reg_dma + 4);
+
+ if (!fw_cfg_wait_for_control(d, FW_CFG_DMA_TIMEOUT)) {
+ WARN(1, "%s: timeout", __func__);
+ ret = -ETIME;
+ } else if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) {
+ ret = -EIO;
+ }
+
+ dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL);
+
+end:
+ kfree(d);
+ if (dma_addr)
+ dma_unmap_single(dev, dma_addr, length, dir);
+
+ return ret;
+}
+
/* read chunk of given fw_cfg blob (caller responsible for sanity-check) */
-static inline void fw_cfg_read_blob(u16 key,
- void *buf, loff_t pos, size_t count)
+static ssize_t fw_cfg_read_blob(u16 key,
+ void *buf, loff_t pos, size_t count,
+ bool dma)
{
u32 glk = -1U;
acpi_status status;
+ ssize_t ret = count;
/* If we have ACPI, ensure mutual exclusion against any potential
* device access by the firmware, e.g. via AML methods:
@@ -90,17 +193,36 @@ static inline void fw_cfg_read_blob(u16 key,
/* Should never get here */
WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n");
memset(buf, 0, count);
- return;
+ return -EBUSY;
}
mutex_lock(&fw_cfg_dev_lock);
- iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
- while (pos-- > 0)
- ioread8(fw_cfg_reg_data);
- ioread8_rep(fw_cfg_reg_data, buf, count);
+ if (dma && fw_cfg_dma_enabled()) {
+ if (pos == 0) {
+ ret = fw_cfg_dma_transfer(buf, count, key << 16
+ | FW_CFG_DMA_CTL_SELECT
+ | FW_CFG_DMA_CTL_READ);
+ } else {
+ iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
+ ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
+ if (ret < 0)
+ goto end;
+ ret = fw_cfg_dma_transfer(buf, count,
+ FW_CFG_DMA_CTL_READ);
+ }
+ } else {
+ iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
+ while (pos-- > 0)
+ ioread8(fw_cfg_reg_data);
+ ioread8_rep(fw_cfg_reg_data, buf, count);
+ }
+
+end:
mutex_unlock(&fw_cfg_dev_lock);
acpi_release_global_lock(glk);
+
+ return ret;
}
/* clean up fw_cfg device i/o */
@@ -192,7 +314,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
#endif
/* verify fw_cfg device signature */
- fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
+ fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false);
if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
fw_cfg_io_cleanup();
return -ENODEV;
@@ -201,9 +323,6 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
return 0;
}
-/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
-static u32 fw_cfg_rev;
-
static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf)
{
return sprintf(buf, "%u\n", fw_cfg_rev);
@@ -351,8 +470,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj,
if (count > entry->f.size - pos)
count = entry->f.size - pos;
- fw_cfg_read_blob(entry->f.select, buf, pos, count);
- return count;
+ return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
}
static struct bin_attribute fw_cfg_sysfs_attr_raw = {
@@ -505,7 +623,7 @@ static int fw_cfg_register_dir_entries(void)
struct fw_cfg_file *dir;
size_t dir_size;
- fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count));
+ fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false);
count = be32_to_cpu(count);
dir_size = count * sizeof(struct fw_cfg_file);
@@ -513,7 +631,7 @@ static int fw_cfg_register_dir_entries(void)
if (!dir)
return -ENOMEM;
- fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size);
+ fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true);
for (i = 0; i < count; i++) {
dir[i].size = be32_to_cpu(dir[i].size);
@@ -544,9 +662,10 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
* one fw_cfg device exist system-wide, so if one was already found
* earlier, we might as well stop here.
*/
- if (fw_cfg_sel_ko)
+ if (dev)
return -EBUSY;
+ dev = &pdev->dev;
/* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */
err = -ENOMEM;
fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko);
@@ -562,7 +681,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
goto err_probe;
/* get revision number, add matching top-level attribute */
- fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev));
+ fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false);
fw_cfg_rev = le32_to_cpu(fw_cfg_rev);
err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr);
if (err)
@@ -587,6 +706,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
err_name:
fw_cfg_kobj_cleanup(fw_cfg_sel_ko);
err_sel:
+ dev = NULL;
return err;
}
--
2.15.0.rc0.40.gaefcc5f6f
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v4 3/5] fw_cfg: do DMA read operation
2017-10-31 15:19 ` [PATCH v4 3/5] fw_cfg: do DMA read operation Marc-André Lureau
@ 2017-11-12 12:42 ` Gabriel L. Somlo
2017-11-12 14:36 ` Marc-André Lureau
0 siblings, 1 reply; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:42 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:36PM +0100, Marc-André Lureau wrote:
> Modify fw_cfg_read_blob() to use DMA if the device supports it.
> Return errors, because the operation may fail.
>
> To avoid polling with unbound amount of time, the DMA operation is
> expected to complete within 200ms, or will return ETIME error.
>
> We may want to switch all the *buf addresses to use only kmalloc'ed
> buffers (instead of using stack/image addresses with dma=false).
>
> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
A couple of silly questions, inline, below.
Thanks,
--G
> ---
> drivers/firmware/qemu_fw_cfg.c | 154 ++++++++++++++++++++++++++++++++++++-----
> 1 file changed, 137 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
> index 1f3e8545dab7..8ce5e49b7c62 100644
> --- a/drivers/firmware/qemu_fw_cfg.c
> +++ b/drivers/firmware/qemu_fw_cfg.c
> @@ -33,6 +33,8 @@
> #include <linux/slab.h>
> #include <linux/io.h>
> #include <linux/ioport.h>
> +#include <linux/delay.h>
> +#include <linux/dma-mapping.h>
>
> MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
> MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
> @@ -43,12 +45,26 @@ MODULE_LICENSE("GPL");
> #define FW_CFG_ID 0x01
> #define FW_CFG_FILE_DIR 0x19
>
> +#define FW_CFG_VERSION_DMA 0x02
> +#define FW_CFG_DMA_CTL_ERROR 0x01
> +#define FW_CFG_DMA_CTL_READ 0x02
> +#define FW_CFG_DMA_CTL_SKIP 0x04
> +#define FW_CFG_DMA_CTL_SELECT 0x08
> +#define FW_CFG_DMA_CTL_WRITE 0x10
> +#define FW_CFG_DMA_TIMEOUT 200 /* ms */
> +
> /* size in bytes of fw_cfg signature */
> #define FW_CFG_SIG_SIZE 4
>
> /* fw_cfg "file name" is up to 56 characters (including terminating nul) */
> #define FW_CFG_MAX_FILE_PATH 56
>
> +/* platform device for dma mapping */
> +static struct device *dev;
> +
> +/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
> +static u32 fw_cfg_rev;
> +
> /* fw_cfg file directory entry type */
> struct fw_cfg_file {
> u32 size;
> @@ -57,6 +73,12 @@ struct fw_cfg_file {
> char name[FW_CFG_MAX_FILE_PATH];
> };
>
> +struct fw_cfg_dma {
> + u32 control;
> + u32 length;
> + u64 address;
> +} __packed;
> +
> /* fw_cfg device i/o register addresses */
> static bool fw_cfg_is_mmio;
> static phys_addr_t fw_cfg_p_base;
> @@ -75,12 +97,93 @@ static inline u16 fw_cfg_sel_endianness(u16 key)
> return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key);
> }
>
> +static inline bool fw_cfg_dma_enabled(void)
> +{
> + return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma;
> +}
> +
> +static bool fw_cfg_wait_for_control(struct fw_cfg_dma *d, unsigned long timeout)
> +{
> + ktime_t start;
> + ktime_t stop;
> +
> + start = ktime_get();
> + stop = ktime_add(start, ms_to_ktime(timeout));
> +
> + do {
> + if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0)
> + return true;
> +
> + usleep_range(50, 100);
> + } while (ktime_before(ktime_get(), stop));
> +
> + return false;
> +}
> +
> +static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
> +{
> + dma_addr_t dma_addr = 0;
> + struct fw_cfg_dma *d;
> + dma_addr_t dma;
> + ssize_t ret = length;
> + enum dma_data_direction dir =
> + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
> +
> + if (address && length) {
> + dma_addr = dma_map_single(dev, address, length, dir);
> + if (dma_mapping_error(NULL, dma_addr)) {
> + WARN(1, "%s: failed to map address\n", __func__);
> + return -EFAULT;
> + }
> + }
> +
> + d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA);
> + if (!d) {
> + ret = -ENOMEM;
> + goto end;
> + }
> +
> + dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL);
> + if (dma_mapping_error(NULL, dma)) {
> + WARN(1, "%s: failed to map fw_cfg_dma\n", __func__);
> + ret = -EFAULT;
> + goto end;
> + }
> +
> + *d = (struct fw_cfg_dma) {
> + .address = cpu_to_be64(dma_addr),
> + .length = cpu_to_be32(length),
> + .control = cpu_to_be32(control)
> + };
> +
> + iowrite32be((u64)dma >> 32, fw_cfg_reg_dma);
> + iowrite32be(dma, fw_cfg_reg_dma + 4);
> +
> + if (!fw_cfg_wait_for_control(d, FW_CFG_DMA_TIMEOUT)) {
> + WARN(1, "%s: timeout", __func__);
> + ret = -ETIME;
> + } else if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) {
> + ret = -EIO;
> + }
> +
> + dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL);
> +
> +end:
> + kfree(d);
> + if (dma_addr)
> + dma_unmap_single(dev, dma_addr, length, dir);
> +
> + return ret;
> +}
> +
> /* read chunk of given fw_cfg blob (caller responsible for sanity-check) */
> -static inline void fw_cfg_read_blob(u16 key,
> - void *buf, loff_t pos, size_t count)
> +static ssize_t fw_cfg_read_blob(u16 key,
> + void *buf, loff_t pos, size_t count,
> + bool dma)
> {
> u32 glk = -1U;
> acpi_status status;
> + ssize_t ret = count;
>
> /* If we have ACPI, ensure mutual exclusion against any potential
> * device access by the firmware, e.g. via AML methods:
> @@ -90,17 +193,36 @@ static inline void fw_cfg_read_blob(u16 key,
> /* Should never get here */
> WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n");
> memset(buf, 0, count);
> - return;
> + return -EBUSY;
Why EBUSY here (and not, e.g., EINVAL) ?
> }
>
> mutex_lock(&fw_cfg_dev_lock);
> - iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> - while (pos-- > 0)
> - ioread8(fw_cfg_reg_data);
> - ioread8_rep(fw_cfg_reg_data, buf, count);
> + if (dma && fw_cfg_dma_enabled()) {
> + if (pos == 0) {
> + ret = fw_cfg_dma_transfer(buf, count, key << 16
> + | FW_CFG_DMA_CTL_SELECT
> + | FW_CFG_DMA_CTL_READ);
> + } else {
> + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> + ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
s/0/NULL/ ?
> + if (ret < 0)
> + goto end;
> + ret = fw_cfg_dma_transfer(buf, count,
> + FW_CFG_DMA_CTL_READ);
> + }
> + } else {
> + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> + while (pos-- > 0)
> + ioread8(fw_cfg_reg_data);
> + ioread8_rep(fw_cfg_reg_data, buf, count);
> + }
> +
> +end:
> mutex_unlock(&fw_cfg_dev_lock);
>
> acpi_release_global_lock(glk);
> +
> + return ret;
> }
>
> /* clean up fw_cfg device i/o */
> @@ -192,7 +314,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
> #endif
>
> /* verify fw_cfg device signature */
> - fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
> + fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false);
> if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
> fw_cfg_io_cleanup();
> return -ENODEV;
> @@ -201,9 +323,6 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
> return 0;
> }
>
> -/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
> -static u32 fw_cfg_rev;
> -
> static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf)
> {
> return sprintf(buf, "%u\n", fw_cfg_rev);
> @@ -351,8 +470,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj,
> if (count > entry->f.size - pos)
> count = entry->f.size - pos;
>
> - fw_cfg_read_blob(entry->f.select, buf, pos, count);
> - return count;
> + return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
> }
>
> static struct bin_attribute fw_cfg_sysfs_attr_raw = {
> @@ -505,7 +623,7 @@ static int fw_cfg_register_dir_entries(void)
> struct fw_cfg_file *dir;
> size_t dir_size;
>
> - fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count));
> + fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false);
> count = be32_to_cpu(count);
> dir_size = count * sizeof(struct fw_cfg_file);
>
> @@ -513,7 +631,7 @@ static int fw_cfg_register_dir_entries(void)
> if (!dir)
> return -ENOMEM;
>
> - fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size);
> + fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true);
>
> for (i = 0; i < count; i++) {
> dir[i].size = be32_to_cpu(dir[i].size);
> @@ -544,9 +662,10 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
> * one fw_cfg device exist system-wide, so if one was already found
> * earlier, we might as well stop here.
> */
> - if (fw_cfg_sel_ko)
> + if (dev)
> return -EBUSY;
>
> + dev = &pdev->dev;
> /* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */
> err = -ENOMEM;
> fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko);
> @@ -562,7 +681,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
> goto err_probe;
>
> /* get revision number, add matching top-level attribute */
> - fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev));
> + fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false);
> fw_cfg_rev = le32_to_cpu(fw_cfg_rev);
> err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr);
> if (err)
> @@ -587,6 +706,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
> err_name:
> fw_cfg_kobj_cleanup(fw_cfg_sel_ko);
> err_sel:
> + dev = NULL;
> return err;
> }
>
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v4 3/5] fw_cfg: do DMA read operation
2017-11-12 12:42 ` Gabriel L. Somlo
@ 2017-11-12 14:36 ` Marc-André Lureau
2017-11-12 19:21 ` Gabriel L. Somlo
0 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-11-12 14:36 UTC (permalink / raw)
To: Gabriel L. Somlo; +Cc: linux-kernel, qemu-devel, mst
----- Original Message -----
> On Tue, Oct 31, 2017 at 04:19:36PM +0100, Marc-André Lureau wrote:
> > Modify fw_cfg_read_blob() to use DMA if the device supports it.
> > Return errors, because the operation may fail.
> >
> > To avoid polling with unbound amount of time, the DMA operation is
> > expected to complete within 200ms, or will return ETIME error.
> >
> > We may want to switch all the *buf addresses to use only kmalloc'ed
> > buffers (instead of using stack/image addresses with dma=false).
> >
> > Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
>
> A couple of silly questions, inline, below.
>
> Thanks,
> --G
>
> > ---
> > drivers/firmware/qemu_fw_cfg.c | 154
> > ++++++++++++++++++++++++++++++++++++-----
> > 1 file changed, 137 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/firmware/qemu_fw_cfg.c
> > b/drivers/firmware/qemu_fw_cfg.c
> > index 1f3e8545dab7..8ce5e49b7c62 100644
> > --- a/drivers/firmware/qemu_fw_cfg.c
> > +++ b/drivers/firmware/qemu_fw_cfg.c
> > @@ -33,6 +33,8 @@
> > #include <linux/slab.h>
> > #include <linux/io.h>
> > #include <linux/ioport.h>
> > +#include <linux/delay.h>
> > +#include <linux/dma-mapping.h>
> >
> > MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
> > MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
> > @@ -43,12 +45,26 @@ MODULE_LICENSE("GPL");
> > #define FW_CFG_ID 0x01
> > #define FW_CFG_FILE_DIR 0x19
> >
> > +#define FW_CFG_VERSION_DMA 0x02
> > +#define FW_CFG_DMA_CTL_ERROR 0x01
> > +#define FW_CFG_DMA_CTL_READ 0x02
> > +#define FW_CFG_DMA_CTL_SKIP 0x04
> > +#define FW_CFG_DMA_CTL_SELECT 0x08
> > +#define FW_CFG_DMA_CTL_WRITE 0x10
> > +#define FW_CFG_DMA_TIMEOUT 200 /* ms */
> > +
> > /* size in bytes of fw_cfg signature */
> > #define FW_CFG_SIG_SIZE 4
> >
> > /* fw_cfg "file name" is up to 56 characters (including terminating nul)
> > */
> > #define FW_CFG_MAX_FILE_PATH 56
> >
> > +/* platform device for dma mapping */
> > +static struct device *dev;
> > +
> > +/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir.
> > */
> > +static u32 fw_cfg_rev;
> > +
> > /* fw_cfg file directory entry type */
> > struct fw_cfg_file {
> > u32 size;
> > @@ -57,6 +73,12 @@ struct fw_cfg_file {
> > char name[FW_CFG_MAX_FILE_PATH];
> > };
> >
> > +struct fw_cfg_dma {
> > + u32 control;
> > + u32 length;
> > + u64 address;
> > +} __packed;
> > +
> > /* fw_cfg device i/o register addresses */
> > static bool fw_cfg_is_mmio;
> > static phys_addr_t fw_cfg_p_base;
> > @@ -75,12 +97,93 @@ static inline u16 fw_cfg_sel_endianness(u16 key)
> > return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key);
> > }
> >
> > +static inline bool fw_cfg_dma_enabled(void)
> > +{
> > + return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma;
> > +}
> > +
> > +static bool fw_cfg_wait_for_control(struct fw_cfg_dma *d, unsigned long
> > timeout)
> > +{
> > + ktime_t start;
> > + ktime_t stop;
> > +
> > + start = ktime_get();
> > + stop = ktime_add(start, ms_to_ktime(timeout));
> > +
> > + do {
> > + if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0)
> > + return true;
> > +
> > + usleep_range(50, 100);
> > + } while (ktime_before(ktime_get(), stop));
> > +
> > + return false;
> > +}
> > +
> > +static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
> > +{
> > + dma_addr_t dma_addr = 0;
> > + struct fw_cfg_dma *d;
> > + dma_addr_t dma;
> > + ssize_t ret = length;
> > + enum dma_data_direction dir =
> > + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
> > +
> > + if (address && length) {
> > + dma_addr = dma_map_single(dev, address, length, dir);
> > + if (dma_mapping_error(NULL, dma_addr)) {
> > + WARN(1, "%s: failed to map address\n", __func__);
> > + return -EFAULT;
> > + }
> > + }
> > +
> > + d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA);
> > + if (!d) {
> > + ret = -ENOMEM;
> > + goto end;
> > + }
> > +
> > + dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL);
> > + if (dma_mapping_error(NULL, dma)) {
> > + WARN(1, "%s: failed to map fw_cfg_dma\n", __func__);
> > + ret = -EFAULT;
> > + goto end;
> > + }
> > +
> > + *d = (struct fw_cfg_dma) {
> > + .address = cpu_to_be64(dma_addr),
> > + .length = cpu_to_be32(length),
> > + .control = cpu_to_be32(control)
> > + };
> > +
> > + iowrite32be((u64)dma >> 32, fw_cfg_reg_dma);
> > + iowrite32be(dma, fw_cfg_reg_dma + 4);
> > +
> > + if (!fw_cfg_wait_for_control(d, FW_CFG_DMA_TIMEOUT)) {
> > + WARN(1, "%s: timeout", __func__);
> > + ret = -ETIME;
> > + } else if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) {
> > + ret = -EIO;
> > + }
> > +
> > + dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL);
> > +
> > +end:
> > + kfree(d);
> > + if (dma_addr)
> > + dma_unmap_single(dev, dma_addr, length, dir);
> > +
> > + return ret;
> > +}
> > +
> > /* read chunk of given fw_cfg blob (caller responsible for sanity-check)
> > */
> > -static inline void fw_cfg_read_blob(u16 key,
> > - void *buf, loff_t pos, size_t count)
> > +static ssize_t fw_cfg_read_blob(u16 key,
> > + void *buf, loff_t pos, size_t count,
> > + bool dma)
> > {
> > u32 glk = -1U;
> > acpi_status status;
> > + ssize_t ret = count;
> >
> > /* If we have ACPI, ensure mutual exclusion against any potential
> > * device access by the firmware, e.g. via AML methods:
> > @@ -90,17 +193,36 @@ static inline void fw_cfg_read_blob(u16 key,
> > /* Should never get here */
> > WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n");
> > memset(buf, 0, count);
> > - return;
> > + return -EBUSY;
>
> Why EBUSY here (and not, e.g., EINVAL) ?
no specific reason, I guess EINVAL or ENODEV would be fine too.
>
> > }
> >
> > mutex_lock(&fw_cfg_dev_lock);
> > - iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > - while (pos-- > 0)
> > - ioread8(fw_cfg_reg_data);
> > - ioread8_rep(fw_cfg_reg_data, buf, count);
> > + if (dma && fw_cfg_dma_enabled()) {
> > + if (pos == 0) {
> > + ret = fw_cfg_dma_transfer(buf, count, key << 16
> > + | FW_CFG_DMA_CTL_SELECT
> > + | FW_CFG_DMA_CTL_READ);
> > + } else {
> > + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > + ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
>
> s/0/NULL/ ?
sure
>
> > + if (ret < 0)
> > + goto end;
> > + ret = fw_cfg_dma_transfer(buf, count,
> > + FW_CFG_DMA_CTL_READ);
> > + }
> > + } else {
> > + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > + while (pos-- > 0)
> > + ioread8(fw_cfg_reg_data);
> > + ioread8_rep(fw_cfg_reg_data, buf, count);
> > + }
> > +
> > +end:
> > mutex_unlock(&fw_cfg_dev_lock);
> >
> > acpi_release_global_lock(glk);
> > +
> > + return ret;
> > }
> >
> > /* clean up fw_cfg device i/o */
> > @@ -192,7 +314,7 @@ static int fw_cfg_do_platform_probe(struct
> > platform_device *pdev)
> > #endif
> >
> > /* verify fw_cfg device signature */
> > - fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
> > + fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false);
> > if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
> > fw_cfg_io_cleanup();
> > return -ENODEV;
> > @@ -201,9 +323,6 @@ static int fw_cfg_do_platform_probe(struct
> > platform_device *pdev)
> > return 0;
> > }
> >
> > -/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir.
> > */
> > -static u32 fw_cfg_rev;
> > -
> > static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char
> > *buf)
> > {
> > return sprintf(buf, "%u\n", fw_cfg_rev);
> > @@ -351,8 +470,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp,
> > struct kobject *kobj,
> > if (count > entry->f.size - pos)
> > count = entry->f.size - pos;
> >
> > - fw_cfg_read_blob(entry->f.select, buf, pos, count);
> > - return count;
> > + return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
> > }
> >
> > static struct bin_attribute fw_cfg_sysfs_attr_raw = {
> > @@ -505,7 +623,7 @@ static int fw_cfg_register_dir_entries(void)
> > struct fw_cfg_file *dir;
> > size_t dir_size;
> >
> > - fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count));
> > + fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false);
> > count = be32_to_cpu(count);
> > dir_size = count * sizeof(struct fw_cfg_file);
> >
> > @@ -513,7 +631,7 @@ static int fw_cfg_register_dir_entries(void)
> > if (!dir)
> > return -ENOMEM;
> >
> > - fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size);
> > + fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true);
> >
> > for (i = 0; i < count; i++) {
> > dir[i].size = be32_to_cpu(dir[i].size);
> > @@ -544,9 +662,10 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > *pdev)
> > * one fw_cfg device exist system-wide, so if one was already found
> > * earlier, we might as well stop here.
> > */
> > - if (fw_cfg_sel_ko)
> > + if (dev)
> > return -EBUSY;
> >
> > + dev = &pdev->dev;
> > /* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */
> > err = -ENOMEM;
> > fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko);
> > @@ -562,7 +681,7 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > *pdev)
> > goto err_probe;
> >
> > /* get revision number, add matching top-level attribute */
> > - fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev));
> > + fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false);
> > fw_cfg_rev = le32_to_cpu(fw_cfg_rev);
> > err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr);
> > if (err)
> > @@ -587,6 +706,7 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > *pdev)
> > err_name:
> > fw_cfg_kobj_cleanup(fw_cfg_sel_ko);
> > err_sel:
> > + dev = NULL;
> > return err;
> > }
> >
> > --
> > 2.15.0.rc0.40.gaefcc5f6f
> >
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v4 3/5] fw_cfg: do DMA read operation
2017-11-12 14:36 ` Marc-André Lureau
@ 2017-11-12 19:21 ` Gabriel L. Somlo
0 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 19:21 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, qemu-devel, mst
On Sun, Nov 12, 2017 at 09:36:33AM -0500, Marc-André Lureau wrote:
>
>
> ----- Original Message -----
> > On Tue, Oct 31, 2017 at 04:19:36PM +0100, Marc-André Lureau wrote:
> > > Modify fw_cfg_read_blob() to use DMA if the device supports it.
> > > Return errors, because the operation may fail.
> > >
> > > To avoid polling with unbound amount of time, the DMA operation is
> > > expected to complete within 200ms, or will return ETIME error.
> > >
> > > We may want to switch all the *buf addresses to use only kmalloc'ed
> > > buffers (instead of using stack/image addresses with dma=false).
> > >
> > > Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
> >
> > A couple of silly questions, inline, below.
> >
> > Thanks,
> > --G
> >
> > > ---
> > > drivers/firmware/qemu_fw_cfg.c | 154
> > > ++++++++++++++++++++++++++++++++++++-----
> > > 1 file changed, 137 insertions(+), 17 deletions(-)
> > >
> > > diff --git a/drivers/firmware/qemu_fw_cfg.c
> > > b/drivers/firmware/qemu_fw_cfg.c
> > > index 1f3e8545dab7..8ce5e49b7c62 100644
> > > --- a/drivers/firmware/qemu_fw_cfg.c
> > > +++ b/drivers/firmware/qemu_fw_cfg.c
> > > @@ -33,6 +33,8 @@
> > > #include <linux/slab.h>
> > > #include <linux/io.h>
> > > #include <linux/ioport.h>
> > > +#include <linux/delay.h>
> > > +#include <linux/dma-mapping.h>
> > >
> > > MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
> > > MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
> > > @@ -43,12 +45,26 @@ MODULE_LICENSE("GPL");
> > > #define FW_CFG_ID 0x01
> > > #define FW_CFG_FILE_DIR 0x19
> > >
> > > +#define FW_CFG_VERSION_DMA 0x02
> > > +#define FW_CFG_DMA_CTL_ERROR 0x01
> > > +#define FW_CFG_DMA_CTL_READ 0x02
> > > +#define FW_CFG_DMA_CTL_SKIP 0x04
> > > +#define FW_CFG_DMA_CTL_SELECT 0x08
> > > +#define FW_CFG_DMA_CTL_WRITE 0x10
> > > +#define FW_CFG_DMA_TIMEOUT 200 /* ms */
> > > +
> > > /* size in bytes of fw_cfg signature */
> > > #define FW_CFG_SIG_SIZE 4
> > >
> > > /* fw_cfg "file name" is up to 56 characters (including terminating nul)
> > > */
> > > #define FW_CFG_MAX_FILE_PATH 56
> > >
> > > +/* platform device for dma mapping */
> > > +static struct device *dev;
> > > +
> > > +/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir.
> > > */
> > > +static u32 fw_cfg_rev;
> > > +
> > > /* fw_cfg file directory entry type */
> > > struct fw_cfg_file {
> > > u32 size;
> > > @@ -57,6 +73,12 @@ struct fw_cfg_file {
> > > char name[FW_CFG_MAX_FILE_PATH];
> > > };
> > >
> > > +struct fw_cfg_dma {
> > > + u32 control;
> > > + u32 length;
> > > + u64 address;
> > > +} __packed;
> > > +
> > > /* fw_cfg device i/o register addresses */
> > > static bool fw_cfg_is_mmio;
> > > static phys_addr_t fw_cfg_p_base;
> > > @@ -75,12 +97,93 @@ static inline u16 fw_cfg_sel_endianness(u16 key)
> > > return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key);
> > > }
> > >
> > > +static inline bool fw_cfg_dma_enabled(void)
> > > +{
> > > + return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma;
> > > +}
> > > +
> > > +static bool fw_cfg_wait_for_control(struct fw_cfg_dma *d, unsigned long
> > > timeout)
> > > +{
> > > + ktime_t start;
> > > + ktime_t stop;
> > > +
> > > + start = ktime_get();
> > > + stop = ktime_add(start, ms_to_ktime(timeout));
> > > +
> > > + do {
> > > + if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0)
> > > + return true;
> > > +
> > > + usleep_range(50, 100);
> > > + } while (ktime_before(ktime_get(), stop));
> > > +
> > > + return false;
> > > +}
> > > +
> > > +static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
> > > +{
> > > + dma_addr_t dma_addr = 0;
> > > + struct fw_cfg_dma *d;
> > > + dma_addr_t dma;
> > > + ssize_t ret = length;
> > > + enum dma_data_direction dir =
> > > + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
> > > +
> > > + if (address && length) {
> > > + dma_addr = dma_map_single(dev, address, length, dir);
> > > + if (dma_mapping_error(NULL, dma_addr)) {
> > > + WARN(1, "%s: failed to map address\n", __func__);
> > > + return -EFAULT;
> > > + }
> > > + }
> > > +
> > > + d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA);
> > > + if (!d) {
> > > + ret = -ENOMEM;
> > > + goto end;
> > > + }
> > > +
> > > + dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL);
> > > + if (dma_mapping_error(NULL, dma)) {
> > > + WARN(1, "%s: failed to map fw_cfg_dma\n", __func__);
> > > + ret = -EFAULT;
> > > + goto end;
> > > + }
> > > +
> > > + *d = (struct fw_cfg_dma) {
> > > + .address = cpu_to_be64(dma_addr),
> > > + .length = cpu_to_be32(length),
> > > + .control = cpu_to_be32(control)
> > > + };
> > > +
> > > + iowrite32be((u64)dma >> 32, fw_cfg_reg_dma);
> > > + iowrite32be(dma, fw_cfg_reg_dma + 4);
> > > +
> > > + if (!fw_cfg_wait_for_control(d, FW_CFG_DMA_TIMEOUT)) {
> > > + WARN(1, "%s: timeout", __func__);
> > > + ret = -ETIME;
> > > + } else if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) {
> > > + ret = -EIO;
> > > + }
> > > +
> > > + dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL);
> > > +
> > > +end:
> > > + kfree(d);
> > > + if (dma_addr)
> > > + dma_unmap_single(dev, dma_addr, length, dir);
> > > +
> > > + return ret;
> > > +}
> > > +
> > > /* read chunk of given fw_cfg blob (caller responsible for sanity-check)
> > > */
> > > -static inline void fw_cfg_read_blob(u16 key,
> > > - void *buf, loff_t pos, size_t count)
> > > +static ssize_t fw_cfg_read_blob(u16 key,
> > > + void *buf, loff_t pos, size_t count,
> > > + bool dma)
> > > {
> > > u32 glk = -1U;
> > > acpi_status status;
> > > + ssize_t ret = count;
> > >
> > > /* If we have ACPI, ensure mutual exclusion against any potential
> > > * device access by the firmware, e.g. via AML methods:
> > > @@ -90,17 +193,36 @@ static inline void fw_cfg_read_blob(u16 key,
> > > /* Should never get here */
> > > WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n");
> > > memset(buf, 0, count);
> > > - return;
> > > + return -EBUSY;
> >
> > Why EBUSY here (and not, e.g., EINVAL) ?
>
> no specific reason, I guess EINVAL or ENODEV would be fine too.
Doesn't *really* matter, since we should never reach that code anyway.
But I think EINVAL would cause the casual reader less cause to wonder
what might be going on than any of the others...
> >
> > > }
> > >
> > > mutex_lock(&fw_cfg_dev_lock);
> > > - iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > > - while (pos-- > 0)
> > > - ioread8(fw_cfg_reg_data);
> > > - ioread8_rep(fw_cfg_reg_data, buf, count);
> > > + if (dma && fw_cfg_dma_enabled()) {
> > > + if (pos == 0) {
> > > + ret = fw_cfg_dma_transfer(buf, count, key << 16
> > > + | FW_CFG_DMA_CTL_SELECT
> > > + | FW_CFG_DMA_CTL_READ);
> > > + } else {
> > > + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > > + ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
> >
> > s/0/NULL/ ?
>
> sure
Since the argument is supposed to be a pointer, that'd be following the
"principle of least WTF" :)
With those (in both 3/5 and 5/5),
Reviewed-by: Gabriel Somlo <somlo@cmu.edu>
Thanks,
--Gabriel
> >
> > > + if (ret < 0)
> > > + goto end;
> > > + ret = fw_cfg_dma_transfer(buf, count,
> > > + FW_CFG_DMA_CTL_READ);
> > > + }
> > > + } else {
> > > + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> > > + while (pos-- > 0)
> > > + ioread8(fw_cfg_reg_data);
> > > + ioread8_rep(fw_cfg_reg_data, buf, count);
> > > + }
> > > +
> > > +end:
> > > mutex_unlock(&fw_cfg_dev_lock);
> > >
> > > acpi_release_global_lock(glk);
> > > +
> > > + return ret;
> > > }
> > >
> > > /* clean up fw_cfg device i/o */
> > > @@ -192,7 +314,7 @@ static int fw_cfg_do_platform_probe(struct
> > > platform_device *pdev)
> > > #endif
> > >
> > > /* verify fw_cfg device signature */
> > > - fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
> > > + fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false);
> > > if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
> > > fw_cfg_io_cleanup();
> > > return -ENODEV;
> > > @@ -201,9 +323,6 @@ static int fw_cfg_do_platform_probe(struct
> > > platform_device *pdev)
> > > return 0;
> > > }
> > >
> > > -/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir.
> > > */
> > > -static u32 fw_cfg_rev;
> > > -
> > > static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char
> > > *buf)
> > > {
> > > return sprintf(buf, "%u\n", fw_cfg_rev);
> > > @@ -351,8 +470,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp,
> > > struct kobject *kobj,
> > > if (count > entry->f.size - pos)
> > > count = entry->f.size - pos;
> > >
> > > - fw_cfg_read_blob(entry->f.select, buf, pos, count);
> > > - return count;
> > > + return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
> > > }
> > >
> > > static struct bin_attribute fw_cfg_sysfs_attr_raw = {
> > > @@ -505,7 +623,7 @@ static int fw_cfg_register_dir_entries(void)
> > > struct fw_cfg_file *dir;
> > > size_t dir_size;
> > >
> > > - fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count));
> > > + fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false);
> > > count = be32_to_cpu(count);
> > > dir_size = count * sizeof(struct fw_cfg_file);
> > >
> > > @@ -513,7 +631,7 @@ static int fw_cfg_register_dir_entries(void)
> > > if (!dir)
> > > return -ENOMEM;
> > >
> > > - fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size);
> > > + fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true);
> > >
> > > for (i = 0; i < count; i++) {
> > > dir[i].size = be32_to_cpu(dir[i].size);
> > > @@ -544,9 +662,10 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > > *pdev)
> > > * one fw_cfg device exist system-wide, so if one was already found
> > > * earlier, we might as well stop here.
> > > */
> > > - if (fw_cfg_sel_ko)
> > > + if (dev)
> > > return -EBUSY;
> > >
> > > + dev = &pdev->dev;
> > > /* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */
> > > err = -ENOMEM;
> > > fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko);
> > > @@ -562,7 +681,7 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > > *pdev)
> > > goto err_probe;
> > >
> > > /* get revision number, add matching top-level attribute */
> > > - fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev));
> > > + fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false);
> > > fw_cfg_rev = le32_to_cpu(fw_cfg_rev);
> > > err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr);
> > > if (err)
> > > @@ -587,6 +706,7 @@ static int fw_cfg_sysfs_probe(struct platform_device
> > > *pdev)
> > > err_name:
> > > fw_cfg_kobj_cleanup(fw_cfg_sel_ko);
> > > err_sel:
> > > + dev = NULL;
> > > return err;
> > > }
> > >
> > > --
> > > 2.15.0.rc0.40.gaefcc5f6f
> > >
> >
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v4 4/5] crash: export paddr_vmcoreinfo_note()
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
` (2 preceding siblings ...)
2017-10-31 15:19 ` [PATCH v4 3/5] fw_cfg: do DMA read operation Marc-André Lureau
@ 2017-10-31 15:19 ` Marc-André Lureau
2017-11-12 12:42 ` Gabriel L. Somlo
2017-10-31 15:19 ` [PATCH v4 5/5] fw_cfg: write vmcoreinfo details Marc-André Lureau
2017-11-12 12:40 ` [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Gabriel L. Somlo
5 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-10-31 15:19 UTC (permalink / raw)
To: linux-kernel; +Cc: somlo, qemu-devel, mst, Marc-André Lureau
The following patch is going to use the symbol from the fw_cfg module.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
kernel/crash_core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/crash_core.c b/kernel/crash_core.c
index 6db80fc0810b..47541c891810 100644
--- a/kernel/crash_core.c
+++ b/kernel/crash_core.c
@@ -375,6 +375,7 @@ phys_addr_t __weak paddr_vmcoreinfo_note(void)
{
return __pa(vmcoreinfo_note);
}
+EXPORT_SYMBOL(paddr_vmcoreinfo_note);
static int __init crash_save_vmcoreinfo_init(void)
{
--
2.15.0.rc0.40.gaefcc5f6f
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v4 4/5] crash: export paddr_vmcoreinfo_note()
2017-10-31 15:19 ` [PATCH v4 4/5] crash: export paddr_vmcoreinfo_note() Marc-André Lureau
@ 2017-11-12 12:42 ` Gabriel L. Somlo
0 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:42 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:37PM +0100, Marc-André Lureau wrote:
> The following patch is going to use the symbol from the fw_cfg module.
>
> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Gabriel Somlo <somlo@cmu.edu>
> ---
> kernel/crash_core.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/kernel/crash_core.c b/kernel/crash_core.c
> index 6db80fc0810b..47541c891810 100644
> --- a/kernel/crash_core.c
> +++ b/kernel/crash_core.c
> @@ -375,6 +375,7 @@ phys_addr_t __weak paddr_vmcoreinfo_note(void)
> {
> return __pa(vmcoreinfo_note);
> }
> +EXPORT_SYMBOL(paddr_vmcoreinfo_note);
>
> static int __init crash_save_vmcoreinfo_init(void)
> {
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v4 5/5] fw_cfg: write vmcoreinfo details
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
` (3 preceding siblings ...)
2017-10-31 15:19 ` [PATCH v4 4/5] crash: export paddr_vmcoreinfo_note() Marc-André Lureau
@ 2017-10-31 15:19 ` Marc-André Lureau
2017-11-12 12:43 ` Gabriel L. Somlo
2017-11-12 12:40 ` [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Gabriel L. Somlo
5 siblings, 1 reply; 14+ messages in thread
From: Marc-André Lureau @ 2017-10-31 15:19 UTC (permalink / raw)
To: linux-kernel; +Cc: somlo, qemu-devel, mst, Marc-André Lureau
If the "etc/vmcoreinfo" fw_cfg file is present and we are not running
the kdump kernel, write the addr/size of the vmcoreinfo ELF note.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 87 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 86 insertions(+), 1 deletion(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 8ce5e49b7c62..ebd9bb134900 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -35,6 +35,8 @@
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
+#include <linux/crash_core.h>
+#include <linux/crash_dump.h>
MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
@@ -59,6 +61,8 @@ MODULE_LICENSE("GPL");
/* fw_cfg "file name" is up to 56 characters (including terminating nul) */
#define FW_CFG_MAX_FILE_PATH 56
+#define VMCOREINFO_FORMAT_ELF 0x1
+
/* platform device for dma mapping */
static struct device *dev;
@@ -127,7 +131,8 @@ static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
dma_addr_t dma;
ssize_t ret = length;
enum dma_data_direction dir =
- (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
+ (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0) |
+ (control & FW_CFG_DMA_CTL_WRITE ? DMA_TO_DEVICE : 0);
if (address && length) {
dma_addr = dma_map_single(dev, address, length, dir);
@@ -225,6 +230,48 @@ static ssize_t fw_cfg_read_blob(u16 key,
return ret;
}
+#ifdef CONFIG_CRASH_CORE
+/* write chunk of given fw_cfg blob (caller responsible for sanity-check) */
+static ssize_t fw_cfg_write_blob(u16 key,
+ void *buf, loff_t pos, size_t count)
+{
+ u32 glk = -1U;
+ acpi_status status;
+ ssize_t ret = count;
+
+ /* If we have ACPI, ensure mutual exclusion against any potential
+ * device access by the firmware, e.g. via AML methods:
+ */
+ status = acpi_acquire_global_lock(ACPI_WAIT_FOREVER, &glk);
+ if (ACPI_FAILURE(status) && status != AE_NOT_CONFIGURED) {
+ /* Should never get here */
+ WARN(1, "%s: Failed to lock ACPI!\n", __func__);
+ memset(buf, 0, count);
+ return -EBUSY;
+ }
+
+ mutex_lock(&fw_cfg_dev_lock);
+ if (pos == 0) {
+ ret = fw_cfg_dma_transfer(buf, count, key << 16
+ | FW_CFG_DMA_CTL_SELECT
+ | FW_CFG_DMA_CTL_WRITE);
+ } else {
+ iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
+ ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
+ if (ret < 0)
+ goto end;
+ ret = fw_cfg_dma_transfer(buf, count, FW_CFG_DMA_CTL_WRITE);
+ }
+
+end:
+ mutex_unlock(&fw_cfg_dev_lock);
+
+ acpi_release_global_lock(glk);
+
+ return ret;
+}
+#endif /* CONFIG_CRASH_CORE */
+
/* clean up fw_cfg device i/o */
static void fw_cfg_io_cleanup(void)
{
@@ -343,6 +390,37 @@ struct fw_cfg_sysfs_entry {
struct list_head list;
};
+#ifdef CONFIG_CRASH_CORE
+static ssize_t write_vmcoreinfo(const struct fw_cfg_file *f)
+{
+ struct vmci {
+ __le16 host_format;
+ __le16 guest_format;
+ __le32 size;
+ __le64 paddr;
+ } __packed;
+ struct vmci *data;
+ ssize_t ret;
+
+ data = kmalloc(sizeof(struct vmci), GFP_KERNEL | GFP_DMA);
+ if (!data)
+ return -ENOMEM;
+
+ /* spare ourself reading host format support for now since we
+ * don't know what else to format - host may ignore ours
+ */
+ *data = (struct vmci) {
+ .guest_format = cpu_to_le16(VMCOREINFO_FORMAT_ELF),
+ .size = cpu_to_le32(VMCOREINFO_NOTE_SIZE),
+ .paddr = cpu_to_le64(paddr_vmcoreinfo_note())
+ };
+ ret = fw_cfg_write_blob(f->select, data, 0, sizeof(struct vmci));
+
+ kfree(data);
+ return ret;
+}
+#endif /* CONFIG_CRASH_CORE */
+
/* get fw_cfg_sysfs_entry from kobject member */
static inline struct fw_cfg_sysfs_entry *to_entry(struct kobject *kobj)
{
@@ -582,6 +660,13 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f)
int err;
struct fw_cfg_sysfs_entry *entry;
+#ifdef CONFIG_CRASH_CORE
+ if (strcmp(f->name, "etc/vmcoreinfo") == 0 && !is_kdump_kernel()) {
+ if (write_vmcoreinfo(f) < 0)
+ pr_warn("fw_cfg: failed to write vmcoreinfo");
+ }
+#endif
+
/* allocate new entry */
entry = kzalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
--
2.15.0.rc0.40.gaefcc5f6f
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH v4 5/5] fw_cfg: write vmcoreinfo details
2017-10-31 15:19 ` [PATCH v4 5/5] fw_cfg: write vmcoreinfo details Marc-André Lureau
@ 2017-11-12 12:43 ` Gabriel L. Somlo
0 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:43 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:38PM +0100, Marc-André Lureau wrote:
> If the "etc/vmcoreinfo" fw_cfg file is present and we are not running
> the kdump kernel, write the addr/size of the vmcoreinfo ELF note.
>
> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Same two questions as for 3/5 earlier :)
Thanks,
--G
> ---
> drivers/firmware/qemu_fw_cfg.c | 87 +++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 86 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
> index 8ce5e49b7c62..ebd9bb134900 100644
> --- a/drivers/firmware/qemu_fw_cfg.c
> +++ b/drivers/firmware/qemu_fw_cfg.c
> @@ -35,6 +35,8 @@
> #include <linux/ioport.h>
> #include <linux/delay.h>
> #include <linux/dma-mapping.h>
> +#include <linux/crash_core.h>
> +#include <linux/crash_dump.h>
>
> MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
> MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
> @@ -59,6 +61,8 @@ MODULE_LICENSE("GPL");
> /* fw_cfg "file name" is up to 56 characters (including terminating nul) */
> #define FW_CFG_MAX_FILE_PATH 56
>
> +#define VMCOREINFO_FORMAT_ELF 0x1
> +
> /* platform device for dma mapping */
> static struct device *dev;
>
> @@ -127,7 +131,8 @@ static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
> dma_addr_t dma;
> ssize_t ret = length;
> enum dma_data_direction dir =
> - (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
> + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0) |
> + (control & FW_CFG_DMA_CTL_WRITE ? DMA_TO_DEVICE : 0);
>
> if (address && length) {
> dma_addr = dma_map_single(dev, address, length, dir);
> @@ -225,6 +230,48 @@ static ssize_t fw_cfg_read_blob(u16 key,
> return ret;
> }
>
> +#ifdef CONFIG_CRASH_CORE
> +/* write chunk of given fw_cfg blob (caller responsible for sanity-check) */
> +static ssize_t fw_cfg_write_blob(u16 key,
> + void *buf, loff_t pos, size_t count)
> +{
> + u32 glk = -1U;
> + acpi_status status;
> + ssize_t ret = count;
> +
> + /* If we have ACPI, ensure mutual exclusion against any potential
> + * device access by the firmware, e.g. via AML methods:
> + */
> + status = acpi_acquire_global_lock(ACPI_WAIT_FOREVER, &glk);
> + if (ACPI_FAILURE(status) && status != AE_NOT_CONFIGURED) {
> + /* Should never get here */
> + WARN(1, "%s: Failed to lock ACPI!\n", __func__);
> + memset(buf, 0, count);
> + return -EBUSY;
Same question as before: why not e.g. EINVAL?
> + }
> +
> + mutex_lock(&fw_cfg_dev_lock);
> + if (pos == 0) {
> + ret = fw_cfg_dma_transfer(buf, count, key << 16
> + | FW_CFG_DMA_CTL_SELECT
> + | FW_CFG_DMA_CTL_WRITE);
> + } else {
> + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
> + ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
NULL?
> + if (ret < 0)
> + goto end;
> + ret = fw_cfg_dma_transfer(buf, count, FW_CFG_DMA_CTL_WRITE);
> + }
> +
> +end:
> + mutex_unlock(&fw_cfg_dev_lock);
> +
> + acpi_release_global_lock(glk);
> +
> + return ret;
> +}
> +#endif /* CONFIG_CRASH_CORE */
> +
> /* clean up fw_cfg device i/o */
> static void fw_cfg_io_cleanup(void)
> {
> @@ -343,6 +390,37 @@ struct fw_cfg_sysfs_entry {
> struct list_head list;
> };
>
> +#ifdef CONFIG_CRASH_CORE
> +static ssize_t write_vmcoreinfo(const struct fw_cfg_file *f)
> +{
> + struct vmci {
> + __le16 host_format;
> + __le16 guest_format;
> + __le32 size;
> + __le64 paddr;
> + } __packed;
> + struct vmci *data;
> + ssize_t ret;
> +
> + data = kmalloc(sizeof(struct vmci), GFP_KERNEL | GFP_DMA);
> + if (!data)
> + return -ENOMEM;
> +
> + /* spare ourself reading host format support for now since we
> + * don't know what else to format - host may ignore ours
> + */
> + *data = (struct vmci) {
> + .guest_format = cpu_to_le16(VMCOREINFO_FORMAT_ELF),
> + .size = cpu_to_le32(VMCOREINFO_NOTE_SIZE),
> + .paddr = cpu_to_le64(paddr_vmcoreinfo_note())
> + };
> + ret = fw_cfg_write_blob(f->select, data, 0, sizeof(struct vmci));
> +
> + kfree(data);
> + return ret;
> +}
> +#endif /* CONFIG_CRASH_CORE */
> +
> /* get fw_cfg_sysfs_entry from kobject member */
> static inline struct fw_cfg_sysfs_entry *to_entry(struct kobject *kobj)
> {
> @@ -582,6 +660,13 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f)
> int err;
> struct fw_cfg_sysfs_entry *entry;
>
> +#ifdef CONFIG_CRASH_CORE
> + if (strcmp(f->name, "etc/vmcoreinfo") == 0 && !is_kdump_kernel()) {
> + if (write_vmcoreinfo(f) < 0)
> + pr_warn("fw_cfg: failed to write vmcoreinfo");
> + }
> +#endif
> +
> /* allocate new entry */
> entry = kzalloc(sizeof(*entry), GFP_KERNEL);
> if (!entry)
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support
2017-10-31 15:19 [PATCH v4 0/5] fw_cfg: add DMA operations & etc/vmcoreinfo support Marc-André Lureau
` (4 preceding siblings ...)
2017-10-31 15:19 ` [PATCH v4 5/5] fw_cfg: write vmcoreinfo details Marc-André Lureau
@ 2017-11-12 12:40 ` Gabriel L. Somlo
5 siblings, 0 replies; 14+ messages in thread
From: Gabriel L. Somlo @ 2017-11-12 12:40 UTC (permalink / raw)
To: Marc-André Lureau; +Cc: linux-kernel, somlo, qemu-devel, mst
On Tue, Oct 31, 2017 at 04:19:33PM +0100, Marc-André Lureau wrote:
> Hi,
>
> This series adds DMA operations support to the qemu fw_cfg kernel
> module and populates "etc/vmcoreinfo" with vmcoreinfo location
> details.
>
> Note: the support for this entry handling has been merged for next
> qemu release (2.11)
>
> v4:
> - export paddr_vmcoreinfo_note() to fix fw_cfg.ko build
> - fix build with !CONFIG_CRASH_CORE
> - replace the unbounded yield() loop with a usleep_range() loop and a
> 200ms timeout
> - do not write vmcoreinfo entry when running the kdump kernel (D. Hatayama)
> - drop the experimental sysfs write support patch from this series
Tested it on x86_64, appears to work fine.
I have a couple of silly questions re. 3/5 and 5/5. Lost the v5 emails
with the vmcore folks cc-ed, but my questions are unrelated to vmcore
anyway :)
Thanks,
--Gabriel
>
> v3: (thanks kbuild)
> - add "fw_cfg: fix the command line module name" patch
> - fix build of "fw_cfg: add DMA register" with CONFIG_FW_CFG_SYSFS_CMDLINE=y
> - fix 'Wshift-count-overflow'
>
> v2:
> - use platform device for dma mapping
> - add etc/vmcoreinfo patch
> - some code cleanups
>
> Marc-André Lureau (5):
> fw_cfg: fix the command line module name
> fw_cfg: add DMA register
> fw_cfg: do DMA read operation
> crash: export paddr_vmcoreinfo_note()
> fw_cfg: write vmcoreinfo details
>
> drivers/firmware/qemu_fw_cfg.c | 292 +++++++++++++++++++++++++++++++++++++----
> kernel/crash_core.c | 1 +
> 2 files changed, 264 insertions(+), 29 deletions(-)
>
> --
> 2.15.0.rc0.40.gaefcc5f6f
>
^ permalink raw reply [flat|nested] 14+ messages in thread