From: Borislav Petkov <bp@alien8.de>
To: "Yu, Fenghua" <fenghua.yu@intel.com>
Cc: "Kammela, Gayatri" <gayatri.kammela@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>,
"hpa@linux.intel.com" <hpa@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
"Kleen, Andi" <andi.kleen@intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
"Neri, Ricardo" <ricardo.neri@intel.com>,
"Zhong, Yang" <yang.zhong@intel.com>
Subject: Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features
Date: Tue, 31 Oct 2017 19:32:58 +0100 [thread overview]
Message-ID: <20171031183258.uqqhe6qdyivx3t6f@pd.tnic> (raw)
In-Reply-To: <3E5A0FA7E9CA944F9D5414FEC6C712207589C94F@ORSMSX106.amr.corp.intel.com>
On Tue, Oct 31, 2017 at 06:25:55PM +0000, Yu, Fenghua wrote:
> We may need to send a patch to fix a few legacy names that don't match
> exactly specs, e.g. AVX512VBMI as you mentioned.
Or we can make them all uniform and ignore the spec. It's not like they
would be harder to grep afterwards.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2017-10-31 18:33 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-31 1:20 [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features Gayatri Kammela
2017-10-31 10:06 ` Borislav Petkov
2017-10-31 18:02 ` Yu, Fenghua
2017-10-31 18:25 ` Borislav Petkov
2017-10-31 18:25 ` Yu, Fenghua
2017-10-31 18:32 ` Borislav Petkov [this message]
2017-10-31 19:37 ` Yu, Fenghua
2017-10-31 20:02 ` Borislav Petkov
2017-10-31 12:05 ` [tip:x86/fpu] x86/cpufeatures: Enable new SSE/AVX/AVX512 CPU features tip-bot for Gayatri Kammela
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