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From: Borislav Petkov <bp@alien8.de>
To: "Yu, Fenghua" <fenghua.yu@intel.com>
Cc: "Kammela, Gayatri" <gayatri.kammela@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"x86@kernel.org" <x86@kernel.org>,
	"hpa@linux.intel.com" <hpa@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"Kleen, Andi" <andi.kleen@intel.com>,
	"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
	"Neri, Ricardo" <ricardo.neri@intel.com>,
	"Zhong, Yang" <yang.zhong@intel.com>
Subject: Re: [PATCH v2]  x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features
Date: Tue, 31 Oct 2017 21:02:41 +0100	[thread overview]
Message-ID: <20171031200241.jixw35zatcrk6yyh@pd.tnic> (raw)
In-Reply-To: <3E5A0FA7E9CA944F9D5414FEC6C712207589CA3A@ORSMSX106.amr.corp.intel.com>

On Tue, Oct 31, 2017 at 07:37:29PM +0000, Yu, Fenghua wrote:
> Should we change the legacy names as well? User apps may use the names
> already. Changing the names may break the apps.

Yeah, we can't do that.

> If we do make all uniform, do you prefer adding "_" after AVX512?

Well, I think we can forget the whole endeavor. We already have the two
variants, which we can't change anymore:

#define X86_FEATURE_AVX512_4VNNIW (7*32+16) /* AVX-512 Neural Network Instructions */
#define X86_FEATURE_AVX512_4FMAPS (7*32+17) /* AVX-512 Multiply Accumulation Single precision */
#define X86_FEATURE_AVX512F     ( 9*32+16) /* AVX-512 Foundation */
#define X86_FEATURE_AVX512DQ    ( 9*32+17) /* AVX-512 DQ (Double/Quad granular) Instructions */
#define X86_FEATURE_AVX512IFMA  ( 9*32+21) /* AVX-512 Integer Fused Multiply-Add instructions */
#define X86_FEATURE_AVX512PF    ( 9*32+26) /* AVX-512 Prefetch */
#define X86_FEATURE_AVX512ER    ( 9*32+27) /* AVX-512 Exponential and Reciprocal */
#define X86_FEATURE_AVX512CD    ( 9*32+28) /* AVX-512 Conflict Detection */
#define X86_FEATURE_AVX512BW    ( 9*32+30) /* AVX-512 BW (Byte/Word granular) Instructions */
#define X86_FEATURE_AVX512VL    ( 9*32+31) /* AVX-512 VL (128/256 Vector Length) Extensions */
#define X86_FEATURE_AVX512VBMI  (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */

:-\

Oh well, as long as the AVX512 prefix is there at least the grepping works.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

  reply	other threads:[~2017-10-31 20:02 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-31  1:20 [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features Gayatri Kammela
2017-10-31 10:06 ` Borislav Petkov
2017-10-31 18:02   ` Yu, Fenghua
2017-10-31 18:25     ` Borislav Petkov
2017-10-31 18:25   ` Yu, Fenghua
2017-10-31 18:32     ` Borislav Petkov
2017-10-31 19:37       ` Yu, Fenghua
2017-10-31 20:02         ` Borislav Petkov [this message]
2017-10-31 12:05 ` [tip:x86/fpu] x86/cpufeatures: Enable new SSE/AVX/AVX512 CPU features tip-bot for Gayatri Kammela

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