From: Damien Riegel <damien.riegel@savoirfairelinux.com>
To: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
kernel@savoirfairelinux.com,
Damien Riegel <damien.riegel@savoirfairelinux.com>
Subject: [PATCH 3/4] arm64: dts: qcom: msm8916: normalize I2C bindings
Date: Wed, 1 Nov 2017 13:53:34 -0400 [thread overview]
Message-ID: <20171101175335.22123-4-damien.riegel@savoirfairelinux.com> (raw)
In-Reply-To: <20171101175335.22123-1-damien.riegel@savoirfairelinux.com>
The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x600, as the driver only accesses registers up to address
0x408. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index e16ba8334518..de25bd6070f5 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -457,10 +457,10 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b6000 0x1000>;
+ reg = <0x078b6000 0x600>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
@@ -472,10 +472,10 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b8000 0x1000>;
+ reg = <0x078b8000 0x600>;
interrupts = <GIC_SPI 98 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
@@ -487,10 +487,10 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78ba000 0x1000>;
+ reg = <0x078ba000 0x600>;
interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
--
2.15.0
next prev parent reply other threads:[~2017-11-01 17:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-01 17:53 [PATCH 0/4] arm64: dts: qcom: dts improvements Damien Riegel
2017-11-01 17:53 ` [PATCH 1/4] arm64: dts: qcom: pm8916: fix wcd_codec indentation Damien Riegel
2017-11-09 16:49 ` Bjorn Andersson
2017-11-01 17:53 ` [PATCH 2/4] arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable Damien Riegel
2017-11-09 16:50 ` Bjorn Andersson
2017-11-01 17:53 ` Damien Riegel [this message]
2017-11-09 16:56 ` [PATCH 3/4] arm64: dts: qcom: msm8916: normalize I2C bindings Bjorn Andersson
2017-11-01 17:53 ` [PATCH 4/4] arm64: dts: qcom: msm8916: add bindings for i2c1, i2c3, i2c5 Damien Riegel
2017-11-09 17:00 ` Bjorn Andersson
2017-11-09 17:14 ` Damien Riegel
2017-11-11 7:56 ` Bjorn Andersson
2017-11-14 23:13 ` Damien Riegel
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