From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Sudeep Holla <sudeep.holla@arm.com>
Cc: "Kirill A. Shutemov" <kirill@shutemov.name>,
Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Peter Zijlstra <peterz@infradead.org>,
hpa@zytor.com, Andrew Morton <akpm@linux-foundation.org>,
gorcunov@openvz.org, luto@amacapital.net, bp@suse.de,
open list <linux-kernel@vger.kernel.org>,
torvalds@linux-foundation.org, Will Deacon <Will.Deacon@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: [tip:x86/mm] mm/sparsemem: Allocate mem_section at runtime for CONFIG_SPARSEMEM_EXTREME=y
Date: Thu, 2 Nov 2017 17:12:11 +0300 [thread overview]
Message-ID: <20171102141210.gu4cwpoq2e6o7liu@black.fi.intel.com> (raw)
In-Reply-To: <44b8b5c8-0e9d-0534-0d0c-49618b292802@arm.com>
On Thu, Nov 02, 2017 at 01:42:42PM +0000, Sudeep Holla wrote:
>
>
> On 02/11/17 13:34, Kirill A. Shutemov wrote:
> > On Thu, Nov 02, 2017 at 12:31:54PM +0000, Sudeep Holla wrote:
> >> (+Will, Catalin)
> >>
> >> On Fri, Oct 20, 2017 at 1:27 PM, tip-bot for Kirill A. Shutemov
> >> <tipbot@zytor.com> wrote:
> >>> Commit-ID: 83e3c48729d9ebb7af5a31a504f3fd6aff0348c4
> >>> Gitweb: https://git.kernel.org/tip/83e3c48729d9ebb7af5a31a504f3fd6aff0348c4
> >>> Author: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> >>> AuthorDate: Fri, 29 Sep 2017 17:08:16 +0300
> >>> Committer: Ingo Molnar <mingo@kernel.org>
> >>> CommitDate: Fri, 20 Oct 2017 13:07:09 +0200
> >>>
> >>> mm/sparsemem: Allocate mem_section at runtime for CONFIG_SPARSEMEM_EXTREME=y
> >>>
> >>> Size of the mem_section[] array depends on the size of the physical address space.
> >>>
> >>> In preparation for boot-time switching between paging modes on x86-64
> >>> we need to make the allocation of mem_section[] dynamic, because otherwise
> >>> we waste a lot of RAM: with CONFIG_NODE_SHIFT=10, mem_section[] size is 32kB
> >>> for 4-level paging and 2MB for 5-level paging mode.
> >>>
> >>> The patch allocates the array on the first call to sparse_memory_present_with_active_regions().
> >>>
> >>
> >> I am seeing a boot failure with this patch in linux-next today(20171102)
> >
> > Could you share the kernel config?
> >
>
> It's the default config on arm64. Generated file is almost 160kB, I will
> send it to you off-list.
>
> > Have you bisected the failure to the commit?
> >
> I just reverted this commit as I suspected that and it boots fine after
> the revert.
Could you try the patch below instead?
>From 4a9d843f9d939d958612b0079ebe5743f265e1e0 Mon Sep 17 00:00:00 2001
From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Date: Thu, 2 Nov 2017 17:02:29 +0300
Subject: [PATCH] mm, sparse: Fix boot on arm64
Since 83e3c48729d9 ("mm/sparsemem: Allocate mem_section at runtime for
CONFIG_SPARSEMEM_EXTREME=y") we allocate mem_section dynamically in
sparse_memory_present_with_active_regions(). But some architectures, like
arm64, don't use the routine to initialize sparsemem.
Let's move the initialization into memory_present() it should cover all
architectures.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Fixes: 83e3c48729d9 ("mm/sparsemem: Allocate mem_section at runtime for CONFIG_SPARSEMEM_EXTREME=y")
---
mm/page_alloc.c | 10 ----------
mm/sparse.c | 10 ++++++++++
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 8dfd13f724d9..77e4d3c5c57b 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -5646,16 +5646,6 @@ void __init sparse_memory_present_with_active_regions(int nid)
unsigned long start_pfn, end_pfn;
int i, this_nid;
-#ifdef CONFIG_SPARSEMEM_EXTREME
- if (!mem_section) {
- unsigned long size, align;
-
- size = sizeof(struct mem_section) * NR_SECTION_ROOTS;
- align = 1 << (INTERNODE_CACHE_SHIFT);
- mem_section = memblock_virt_alloc(size, align);
- }
-#endif
-
for_each_mem_pfn_range(i, nid, &start_pfn, &end_pfn, &this_nid)
memory_present(this_nid, start_pfn, end_pfn);
}
diff --git a/mm/sparse.c b/mm/sparse.c
index b00a97398795..d294148ba395 100644
--- a/mm/sparse.c
+++ b/mm/sparse.c
@@ -206,6 +206,16 @@ void __init memory_present(int nid, unsigned long start, unsigned long end)
{
unsigned long pfn;
+#ifdef CONFIG_SPARSEMEM_EXTREME
+ if (unlikely(!mem_section)) {
+ unsigned long size, align;
+
+ size = sizeof(struct mem_section) * NR_SECTION_ROOTS;
+ align = 1 << (INTERNODE_CACHE_SHIFT);
+ mem_section = memblock_virt_alloc(size, align);
+ }
+#endif
+
start &= PAGE_SECTION_MASK;
mminit_validate_memmodel_limits(&start, &end);
for (pfn = start; pfn < end; pfn += PAGES_PER_SECTION) {
--
Kirill A. Shutemov
next prev parent reply other threads:[~2017-11-02 14:13 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-29 14:08 [PATCH 0/6] Boot-time switching between 4- and 5-level paging for 4.15, Part 1 Kirill A. Shutemov
2017-09-29 14:08 ` [PATCH 1/6] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME Kirill A. Shutemov
2017-10-20 12:27 ` [tip:x86/mm] mm/sparsemem: Allocate mem_section at runtime for CONFIG_SPARSEMEM_EXTREME=y tip-bot for Kirill A. Shutemov
2017-11-02 12:31 ` Sudeep Holla
2017-11-02 13:34 ` Kirill A. Shutemov
2017-11-02 13:42 ` Sudeep Holla
2017-11-02 14:12 ` Kirill A. Shutemov [this message]
2017-11-02 15:07 ` Sudeep Holla
2017-11-02 15:37 ` Thierry Reding
2017-11-06 19:00 ` Bjorn Andersson
2017-11-07 1:15 ` Will Deacon
2017-09-29 14:08 ` [PATCH 2/6] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS Kirill A. Shutemov
2017-10-14 0:00 ` Nitin Gupta
2017-10-16 14:44 ` Kirill A. Shutemov
2017-10-18 23:39 ` Nitin Gupta
2017-09-29 14:08 ` [PATCH 3/6] x86/kasan: Use the same shadow offset for 4- and 5-level paging Kirill A. Shutemov
2017-10-20 12:28 ` [tip:x86/mm] " tip-bot for Andrey Ryabinin
2017-09-29 14:08 ` [PATCH 4/6] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-10-20 12:28 ` [tip:x86/mm] x86/xen: Provide pre-built page tables only for CONFIG_XEN_PV=y and CONFIG_XEN_PVH=y tip-bot for Kirill A. Shutemov
2017-09-29 14:08 ` [PATCH 5/6] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-10-20 12:29 ` [tip:x86/mm] x86/xen: Drop 5-level paging support code from the " tip-bot for Kirill A. Shutemov
2017-09-29 14:08 ` [PATCH 6/6] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-10-03 8:27 ` [PATCH 0/6] Boot-time switching between 4- and 5-level paging for 4.15, Part 1 Kirill A. Shutemov
2017-10-17 15:42 ` Kirill A. Shutemov
2017-10-20 8:18 ` Ingo Molnar
2017-10-20 9:41 ` Kirill A. Shutemov
2017-10-20 15:23 ` Ingo Molnar
2017-10-20 16:23 ` Kirill A. Shutemov
2017-10-23 11:56 ` Ingo Molnar
2017-10-23 12:21 ` Kirill A. Shutemov
2017-10-23 12:40 ` Ingo Molnar
2017-10-23 12:48 ` Kirill A. Shutemov
2017-10-24 9:40 ` Ingo Molnar
2017-10-24 11:38 ` Kirill A. Shutemov
2017-10-24 12:47 ` Ingo Molnar
2017-10-24 13:12 ` Kirill A. Shutemov
2017-10-26 7:37 ` Ingo Molnar
2017-10-26 14:40 ` Kirill A. Shutemov
2017-10-31 9:47 ` Ingo Molnar
2017-10-31 12:04 ` Kirill A. Shutemov
2017-10-20 9:49 ` Minchan Kim
2017-10-20 12:18 ` Kirill A. Shutemov
2017-10-24 11:32 ` hpa
2017-10-24 11:43 ` Kirill A. Shutemov
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