From: Dave Hansen <dave.hansen@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org, dave.hansen@linux.intel.com,
moritz.lipp@iaik.tugraz.at, daniel.gruss@iaik.tugraz.at,
michael.schwarz@iaik.tugraz.at,
richard.fellner@student.tugraz.at, luto@kernel.org,
torvalds@linux-foundation.org, keescook@google.com,
hughd@google.com, x86@kernel.org
Subject: [PATCH 15/23] x86, mm: put mmu-to-h/w ASID translation in one place
Date: Wed, 22 Nov 2017 16:35:06 -0800 [thread overview]
Message-ID: <20171123003506.67E81D7F@viggo.jf.intel.com> (raw)
In-Reply-To: <20171123003438.48A0EEDE@viggo.jf.intel.com>
From: Dave Hansen <dave.hansen@linux.intel.com>
There are effectively two ASID types:
1. The one stored in the mmu_context that goes from 0->5
2. The one programmed into the hardware that goes from 1->6
This consolidates the locations where converting beween the two
(by doing +1) to a single place which gives us a nice place to
comment. KAISER will also need to, given an ASID, know which
hardware ASID to flush for the userspace mapping.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Moritz Lipp <moritz.lipp@iaik.tugraz.at>
Cc: Daniel Gruss <daniel.gruss@iaik.tugraz.at>
Cc: Michael Schwarz <michael.schwarz@iaik.tugraz.at>
Cc: Richard Fellner <richard.fellner@student.tugraz.at>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Kees Cook <keescook@google.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: x86@kernel.org
---
b/arch/x86/include/asm/tlbflush.h | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
diff -puN arch/x86/include/asm/tlbflush.h~kaiser-pcid-pre-build-kern arch/x86/include/asm/tlbflush.h
--- a/arch/x86/include/asm/tlbflush.h~kaiser-pcid-pre-build-kern 2017-11-22 15:45:52.346619731 -0800
+++ b/arch/x86/include/asm/tlbflush.h 2017-11-22 15:45:52.350619731 -0800
@@ -88,21 +88,26 @@ static inline u64 inc_mm_tlb_gen(struct
*/
#define MAX_ASID_AVAILABLE ((1<<CR3_AVAIL_ASID_BITS) - 2)
-/*
- * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
- * bits. This serves two purposes. It prevents a nasty situation in
- * which PCID-unaware code saves CR3, loads some other value (with PCID
- * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
- * the saved ASID was nonzero. It also means that any bugs involving
- * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
- * deterministically.
- */
+static inline u16 kern_asid(u16 asid)
+{
+ VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
+ /*
+ * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
+ * bits. This serves two purposes. It prevents a nasty situation in
+ * which PCID-unaware code saves CR3, loads some other value (with PCID
+ * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
+ * the saved ASID was nonzero. It also means that any bugs involving
+ * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
+ * deterministically.
+ */
+ return asid + 1;
+}
+
struct pgd_t;
static inline unsigned long build_cr3(pgd_t *pgd, u16 asid)
{
if (static_cpu_has(X86_FEATURE_PCID)) {
- VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
- return __sme_pa(pgd) | (asid + 1);
+ return __sme_pa(pgd) | kern_asid(asid);
} else {
VM_WARN_ON_ONCE(asid != 0);
return __sme_pa(pgd);
@@ -112,7 +117,8 @@ static inline unsigned long build_cr3(pg
static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid)
{
VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
- return __sme_pa(pgd) | (asid + 1) | CR3_NOFLUSH;
+ VM_WARN_ON_ONCE(!this_cpu_has(X86_FEATURE_PCID));
+ return __sme_pa(pgd) | kern_asid(asid) | CR3_NOFLUSH;
}
#ifdef CONFIG_PARAVIRT
_
next prev parent reply other threads:[~2017-11-23 0:36 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-23 0:34 [PATCH 00/23] [v4] KAISER: unmap most of the kernel from userspace page tables Dave Hansen
2017-11-23 0:34 ` [PATCH 01/23] x86, kaiser: disable global pages by default with KAISER Dave Hansen
2017-11-23 0:34 ` [PATCH 02/23] x86, kaiser: prepare assembly for entry/exit CR3 switching Dave Hansen
2017-11-23 0:34 ` [PATCH 03/23] x86, kaiser: introduce user-mapped per-cpu areas Dave Hansen
2017-11-23 0:34 ` [PATCH 04/23] x86, kaiser: mark per-cpu data structures required for entry/exit Dave Hansen
2017-11-23 0:34 ` [PATCH 05/23] x86, kaiser: unmap kernel from userspace page tables (core patch) Dave Hansen
2017-11-23 4:07 ` Andy Lutomirski
2017-11-26 16:10 ` Andy Lutomirski
2017-11-26 16:24 ` Dave Hansen
2017-11-26 16:29 ` Andy Lutomirski
2018-01-05 4:16 ` Yisheng Xie
2018-01-05 5:18 ` Dave Hansen
2018-01-05 6:16 ` Yisheng Xie
2018-01-05 6:29 ` Dave Hansen
2018-01-05 11:49 ` Andrea Arcangeli
2018-01-05 18:19 ` Jiri Kosina
2018-01-05 19:00 ` Jiri Kosina
2018-01-05 19:03 ` Dave Hansen
2018-01-05 19:17 ` Jiri Kosina
2018-01-05 19:18 ` Jiri Kosina
2018-01-05 19:55 ` Andrea Arcangeli
2018-01-05 21:07 ` Dave Hansen
2018-01-05 21:14 ` Jiri Kosina
2018-01-05 21:29 ` Andy Lutomirski
2018-01-05 22:48 ` Hugh Dickins
2018-01-06 4:54 ` Hanjun Guo
2018-01-06 6:06 ` Dave Hansen
2018-01-06 6:28 ` Hanjun Guo
2018-01-06 6:53 ` Hanjun Guo
2018-01-06 7:55 ` Dave Hansen
2018-01-06 8:42 ` Hanjun Guo
2018-01-06 7:51 ` Dave Hansen
2018-01-06 17:22 ` Andrea Arcangeli
2017-11-23 0:34 ` [PATCH 06/23] x86, kaiser: allow NX poison to be set in p4d/pgd Dave Hansen
2017-11-23 0:34 ` [PATCH 07/23] x86, kaiser: make sure static PGDs are 8k in size Dave Hansen
2017-11-23 0:34 ` [PATCH 08/23] x86, kaiser: map cpu entry area Dave Hansen
2017-11-23 0:34 ` [PATCH 09/23] x86, kaiser: map dynamically-allocated LDTs Dave Hansen
2017-11-23 19:42 ` Eric Biggers
2017-11-23 20:12 ` Andy Lutomirski
2017-11-23 0:34 ` [PATCH 10/23] x86, kaiser: map espfix structures Dave Hansen
2017-11-23 0:34 ` [PATCH 11/23] x86, kaiser: map entry stack variables Dave Hansen
2017-11-23 3:31 ` Andy Lutomirski
2017-11-23 15:37 ` Dave Hansen
2017-11-23 15:55 ` Andy Lutomirski
2017-11-23 0:35 ` [PATCH 12/23] x86, kaiser: map virtually-addressed performance monitoring buffers Dave Hansen
2017-11-23 0:35 ` [PATCH 13/23] x86, mm: Move CR3 construction functions Dave Hansen
2017-11-23 0:35 ` [PATCH 14/23] x86, mm: remove hard-coded ASID limit checks Dave Hansen
2017-11-23 0:35 ` Dave Hansen [this message]
2017-11-23 0:35 ` [PATCH 16/23] x86, pcid, kaiser: allow flushing for future ASID switches Dave Hansen
2017-11-23 0:35 ` [PATCH 17/23] x86, kaiser: use PCID feature to make user and kernel switches faster Dave Hansen
2017-11-23 0:35 ` [PATCH 18/23] x86, kaiser: disable native VSYSCALL Dave Hansen
2017-11-23 0:35 ` [PATCH 19/23] x86, kaiser: add debugfs file to turn KAISER on/off at runtime Dave Hansen
2017-11-23 0:35 ` [PATCH 20/23] x86, kaiser: add a function to check for KAISER being enabled Dave Hansen
2017-11-25 1:23 ` Eduardo Valentin
2017-11-23 0:35 ` [PATCH 21/23] x86, kaiser: un-poison PGDs at runtime Dave Hansen
2017-11-25 1:17 ` Eduardo Valentin
2017-11-23 0:35 ` [PATCH 22/23] x86, kaiser: allow KAISER to be enabled/disabled " Dave Hansen
2017-11-23 0:35 ` [PATCH 23/23] x86, kaiser: add Kconfig Dave Hansen
2017-11-23 7:23 ` [PATCH 00/23] [v4] KAISER: unmap most of the kernel from userspace page tables Ingo Molnar
2017-11-23 7:27 ` Ingo Molnar
2017-11-23 7:32 ` Ingo Molnar
2017-11-23 15:02 ` Dave Hansen
2017-11-23 16:20 ` Dave Hansen
2017-11-24 6:35 ` Ingo Molnar
2017-11-24 6:41 ` Dave Hansen
2017-11-24 7:33 ` Ingo Molnar
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