From: Ingo Molnar <mingo@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Thomas Gleixner <tglx@linutronix.de>,
"H . Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: [PATCH 35/43] x86/mm: Put mmu-to-h/w ASID translation in one place
Date: Fri, 24 Nov 2017 18:24:03 +0100 [thread overview]
Message-ID: <20171124172411.19476-36-mingo@kernel.org> (raw)
In-Reply-To: <20171124172411.19476-1-mingo@kernel.org>
From: Dave Hansen <dave.hansen@linux.intel.com>
There are effectively two ASID types:
1. The one stored in the mmu_context that goes from 0->5
2. The one programmed into the hardware that goes from 1->6
This consolidates the locations where converting beween the two
(by doing +1) to a single place which gives us a nice place to
comment. KAISER will also need to, given an ASID, know which
hardware ASID to flush for the userspace mapping.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: daniel.gruss@iaik.tugraz.at
Cc: hughd@google.com
Cc: keescook@google.com
Cc: linux-mm@kvack.org
Cc: luto@kernel.org
Cc: michael.schwarz@iaik.tugraz.at
Cc: moritz.lipp@iaik.tugraz.at
Cc: richard.fellner@student.tugraz.at
Link: https://lkml.kernel.org/r/20171123003506.67E81D7F@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/include/asm/tlbflush.h | 30 ++++++++++++++++++------------
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 3101581c5da0..24b27eb5904c 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -88,21 +88,26 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm)
*/
#define MAX_ASID_AVAILABLE ((1<<CR3_AVAIL_ASID_BITS) - 2)
-/*
- * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
- * bits. This serves two purposes. It prevents a nasty situation in
- * which PCID-unaware code saves CR3, loads some other value (with PCID
- * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
- * the saved ASID was nonzero. It also means that any bugs involving
- * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
- * deterministically.
- */
+static inline u16 kern_asid(u16 asid)
+{
+ VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
+ /*
+ * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID
+ * bits. This serves two purposes. It prevents a nasty situation in
+ * which PCID-unaware code saves CR3, loads some other value (with PCID
+ * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if
+ * the saved ASID was nonzero. It also means that any bugs involving
+ * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger
+ * deterministically.
+ */
+ return asid + 1;
+}
+
struct pgd_t;
static inline unsigned long build_cr3(pgd_t *pgd, u16 asid)
{
if (static_cpu_has(X86_FEATURE_PCID)) {
- VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
- return __sme_pa(pgd) | (asid + 1);
+ return __sme_pa(pgd) | kern_asid(asid);
} else {
VM_WARN_ON_ONCE(asid != 0);
return __sme_pa(pgd);
@@ -112,7 +117,8 @@ static inline unsigned long build_cr3(pgd_t *pgd, u16 asid)
static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid)
{
VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
- return __sme_pa(pgd) | (asid + 1) | CR3_NOFLUSH;
+ VM_WARN_ON_ONCE(!this_cpu_has(X86_FEATURE_PCID));
+ return __sme_pa(pgd) | kern_asid(asid) | CR3_NOFLUSH;
}
#ifdef CONFIG_PARAVIRT
--
2.14.1
next prev parent reply other threads:[~2017-11-24 17:27 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-24 17:23 [PATCH 00/43] x86 entry-stack and Kaiser series, 2017/11/24, v2 version Ingo Molnar
2017-11-24 17:23 ` [PATCH 01/43] x86/decoder: Add new TEST instruction pattern Ingo Molnar
2017-11-24 17:23 ` [PATCH 02/43] x86/asm/64: Allocate and enable the SYSENTER stack Ingo Molnar
2017-11-24 17:23 ` [PATCH 03/43] x86/dumpstack: Add get_stack_info() support for " Ingo Molnar
2017-11-24 17:23 ` [PATCH 04/43] x86/gdt: Put per-cpu GDT remaps in ascending order Ingo Molnar
2017-11-24 17:23 ` [PATCH 05/43] x86/fixmap: Generalize the GDT fixmap mechanism Ingo Molnar
2017-11-24 17:23 ` [PATCH 06/43] x86/kasan/64: Teach KASAN about the cpu_entry_area Ingo Molnar
2017-11-24 17:23 ` [PATCH 07/43] x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss Ingo Molnar
2017-11-24 17:23 ` [PATCH 08/43] x86/dumpstack: Handle stack overflow on all stacks Ingo Molnar
2017-11-24 17:23 ` [PATCH 09/43] x86/asm: Move SYSENTER_stack to the beginning of struct tss_struct Ingo Molnar
2017-11-24 17:23 ` [PATCH 10/43] x86/asm: Remap the TSS into the cpu entry area Ingo Molnar
2017-11-24 17:23 ` [PATCH 11/43] x86/asm/64: Separate cpu_current_top_of_stack from TSS.sp0 Ingo Molnar
2017-11-24 17:23 ` [PATCH 12/43] x86/espfix/64: Stop assuming that pt_regs is on the entry stack Ingo Molnar
2017-11-24 18:25 ` Borislav Petkov
2017-11-24 19:12 ` Andy Lutomirski
2017-11-26 14:05 ` Ingo Molnar
2017-11-26 17:28 ` Borislav Petkov
2017-11-27 9:19 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 13/43] x86/asm/64: Use a percpu trampoline stack for IDT entries Ingo Molnar
2017-11-24 19:02 ` Borislav Petkov
2017-11-26 14:16 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 14/43] x86/asm/64: Return to userspace from the trampoline stack Ingo Molnar
2017-11-24 19:10 ` Borislav Petkov
2017-11-26 14:18 ` Ingo Molnar
2017-11-26 17:33 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 15/43] x86/entry/64: Create a percpu SYSCALL entry trampoline Ingo Molnar
2017-11-25 11:40 ` Borislav Petkov
2017-11-25 15:00 ` Andy Lutomirski
2017-11-26 14:26 ` [PATCH] " Ingo Molnar
2017-11-24 17:23 ` [PATCH 16/43] x86/irq: Remove an old outdated comment about context tracking races Ingo Molnar
2017-11-25 12:05 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 17/43] x86/irq/64: In the stack overflow warning, print the offending IP Ingo Molnar
2017-11-25 12:07 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 18/43] x86/entry/64: Move the IST stacks into cpu_entry_area Ingo Molnar
2017-11-25 12:34 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 19/43] x86/entry/64: Remove the SYSENTER stack canary Ingo Molnar
2017-11-25 15:29 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 20/43] x86/entry: Clean up SYSENTER_stack code Ingo Molnar
2017-11-25 16:39 ` Borislav Petkov
2017-11-25 16:50 ` Thomas Gleixner
2017-11-25 16:55 ` Andy Lutomirski
2017-11-25 17:03 ` Thomas Gleixner
2017-11-25 17:10 ` Borislav Petkov
2017-11-25 17:26 ` Andy Lutomirski
2017-11-27 9:27 ` Peter Zijlstra
2017-11-24 17:23 ` [PATCH 21/43] x86/mm/kaiser: Disable global pages by default with KAISER Ingo Molnar
2017-11-24 17:23 ` [PATCH 22/43] x86/mm/kaiser: Prepare assembly for entry/exit CR3 switching Ingo Molnar
2017-11-25 0:02 ` Thomas Gleixner
2017-11-25 12:41 ` Thomas Gleixner
2017-11-26 11:50 ` Borislav Petkov
2017-11-26 14:55 ` [PATCH v2] x86/mm/kaiser: Prepare the x86/entry assembly code " Ingo Molnar
2017-11-27 13:29 ` Josh Poimboeuf
2017-11-27 13:36 ` Thomas Gleixner
2017-11-24 17:23 ` [PATCH 23/43] x86/mm/kaiser: Introduce user-mapped per-cpu areas Ingo Molnar
2017-11-26 17:41 ` Borislav Petkov
2017-11-27 9:26 ` Ingo Molnar
2017-11-27 21:14 ` Dave Hansen
2017-11-24 17:23 ` [PATCH 24/43] x86/mm/kaiser: Mark per-cpu data structures required for entry/exit Ingo Molnar
2017-11-25 17:17 ` Thomas Gleixner
2017-11-26 15:54 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 25/43] x86/mm/kaiser: Unmap kernel from userspace page tables (core patch) Ingo Molnar
2017-11-26 18:51 ` Borislav Petkov
2017-11-27 9:30 ` Ingo Molnar
2017-11-26 20:49 ` Borislav Petkov
2017-11-27 10:38 ` Ingo Molnar
2017-11-26 22:25 ` [PATCH 25/43] x86/mm/kaiser: Unmap kernel from userspace page tables (core patch), noexec=off Borislav Petkov
2017-11-26 22:41 ` Thomas Gleixner
2017-11-24 17:23 ` [PATCH 26/43] x86/mm/kaiser: Allow NX poison to be set in p4d/pgd Ingo Molnar
2017-11-24 17:23 ` [PATCH 27/43] x86/mm/kaiser: Make sure static PGDs are 8k in size Ingo Molnar
2017-11-24 17:23 ` [PATCH 28/43] x86/mm/kaiser: Map cpu entry area Ingo Molnar
2017-11-25 21:40 ` Thomas Gleixner
2017-11-26 15:19 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 29/43] x86/mm/kaiser: Map dynamically-allocated LDTs Ingo Molnar
2017-11-24 17:23 ` [PATCH 30/43] x86/mm/kaiser: Map espfix structures Ingo Molnar
2017-11-24 17:23 ` [PATCH 31/43] x86/mm/kaiser: Map entry stack variable Ingo Molnar
2017-11-24 17:24 ` [PATCH 32/43] x86/mm/kaiser: Map virtually-addressed performance monitoring buffers Ingo Molnar
2017-11-24 17:24 ` [PATCH 33/43] x86/mm: Move CR3 construction functions Ingo Molnar
2017-11-24 17:24 ` [PATCH 34/43] x86/mm: Remove hard-coded ASID limit checks Ingo Molnar
2017-11-24 17:24 ` Ingo Molnar [this message]
2017-11-24 17:24 ` [PATCH 36/43] x86/mm/kaiser: Allow flushing for future ASID switches Ingo Molnar
2017-11-24 17:24 ` [PATCH 37/43] x86/mm/kaiser: Use PCID feature to make user and kernel switches faster Ingo Molnar
2017-11-24 17:24 ` [PATCH 38/43] x86/mm/kaiser: Disable native VSYSCALL Ingo Molnar
2017-11-24 17:24 ` [PATCH 39/43] x86/mm/kaiser: Add debugfs file to turn KAISER on/off at runtime Ingo Molnar
2017-11-24 17:24 ` [PATCH 40/43] x86/mm/kaiser: Add a function to check for KAISER being enabled Ingo Molnar
2017-11-24 17:24 ` [PATCH 41/43] x86/mm/kaiser: Un-poison PGDs at runtime Ingo Molnar
2017-11-24 17:24 ` [PATCH 42/43] x86/mm/kaiser: Allow KAISER to be enabled/disabled " Ingo Molnar
2017-11-25 19:18 ` Thomas Gleixner
2017-11-25 19:53 ` Andy Lutomirski
2017-11-25 20:05 ` Thomas Gleixner
2017-11-25 22:10 ` Andy Lutomirski
2017-11-25 22:48 ` Thomas Gleixner
2017-11-26 0:21 ` Andy Lutomirski
2017-11-26 8:11 ` Thomas Gleixner
2017-11-24 17:24 ` [PATCH 43/43] x86/mm/kaiser: Add Kconfig Ingo Molnar
2017-11-24 20:22 ` [crash] PANIC: double fault, error_code: 0x0 Ingo Molnar
2017-11-24 20:59 ` Andy Lutomirski
2017-11-24 21:49 ` Ingo Molnar
2017-11-24 21:52 ` Ingo Molnar
2017-11-24 22:09 ` Ingo Molnar
2017-11-24 22:35 ` Andy Lutomirski
2017-11-24 22:53 ` Ingo Molnar
2017-11-25 9:21 ` Ingo Molnar
2017-11-25 9:32 ` Ingo Molnar
2017-11-25 9:39 ` Ingo Molnar
2017-11-25 11:17 ` [PATCH] x86/mm/kaiser: Fix IRQ entries text section mapping Ingo Molnar
2017-11-25 16:08 ` Thomas Gleixner
2017-11-25 20:06 ` Steven Rostedt
2017-11-27 8:14 ` Peter Zijlstra
2017-11-27 8:21 ` Peter Zijlstra
2017-11-25 4:09 ` [crash] PANIC: double fault, error_code: 0x0 Dave Hansen
2017-11-25 4:15 ` Dave Hansen
-- strict thread matches above, loose matches on Subject: below --
2017-11-24 9:14 [PATCH 00/43] x86 entry-stack and Kaiser series, 2017/11/24 version Ingo Molnar
2017-11-24 9:14 ` [PATCH 35/43] x86/mm: Put mmu-to-h/w ASID translation in one place Ingo Molnar
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