From: Andy Lutomirski <luto@amacapital.net>
To: Borislav Petkov <bp@alien8.de>
Cc: Ingo Molnar <mingo@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
"H . Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH 15/43] x86/entry/64: Create a percpu SYSCALL entry trampoline
Date: Sat, 25 Nov 2017 07:00:36 -0800 [thread overview]
Message-ID: <CALCETrXJpq=L4Ov=L6mvgNAzZuV1=4M54GZFMMqoNLjsD0-A5A@mail.gmail.com> (raw)
In-Reply-To: <20171125114043.f72547iiowbzyjvd@pd.tnic>
On Sat, Nov 25, 2017 at 3:40 AM, Borislav Petkov <bp@alien8.de> wrote:
> On Fri, Nov 24, 2017 at 06:23:43PM +0100, Ingo Molnar wrote:
>> From: Andy Lutomirski <luto@kernel.org>
>>
>> Handling SYSCALL is tricky: the SYSCALL handler is entered with every
>> single register (except FLAGS), including RSP, live. It somehow needs
>> to set RSP to point to a valid stack, which means it needs to save the
>> user RSP somewhere and find its own stack pointer. The canonical way
>> to do this is with SWAPGS, which lets us access percpu data using the
>> %gs prefix.
>>
>> With KAISER-like pagetable switching, this is problematic. Without a
>> scratch register, switching CR3 is impossible, so %gs-based percpu
>> memory would need to be mapped in the user pagetables. Doing that
>> without information leaks is difficult or impossible.
>>
>> Instead, use a different sneaky trick. Map a copy of the first part
>> of the SYSCALL asm at a different address for each CPU. Now RIP
>> varies depending on the CPU, so we can use RIP-relative memory access
>> to access percpu memory. By putting the relevant information (one
>> scratch slot and the stack address) at a constant offset relative to
>> RIP, we can make SYSCALL work without relying on %gs.
>>
>> A nice thing about this approach is that we can easily switch it on
>> and off if we want pagetable switching to be configurable.
>>
>> The compat variant of SYSCALL doesn't have this problem in the first
>> place -- there are plenty of scratch registers, since we don't care
>> about preserving r8-r15. This patch therefore doesn't touch SYSCALL32
>> at all.
>>
>> XXX: Whenever we settle how KAISER gets turned on and off, we should do
>> the same to this.
>>
>> Signed-off-by: Andy Lutomirski <luto@kernel.org>
>> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
>> Cc: Borislav Petkov <bpetkov@suse.de>
>> Cc: Brian Gerst <brgerst@gmail.com>
>> Cc: Dave Hansen <dave.hansen@intel.com>
>> Cc: Josh Poimboeuf <jpoimboe@redhat.com>
>> Cc: Linus Torvalds <torvalds@linux-foundation.org>
>> Cc: Peter Zijlstra <peterz@infradead.org>
>> Link: https://lkml.kernel.org/r/b95ccae0a5a2f090c901e49fce7c9e8ff6acd40d.1511497875.git.luto@kernel.org
>> Signed-off-by: Ingo Molnar <mingo@kernel.org>
>> ---
>> arch/x86/entry/entry_64.S | 48 +++++++++++++++++++++++++++++++++++++++++++
>> arch/x86/include/asm/fixmap.h | 2 ++
>> arch/x86/kernel/asm-offsets.c | 1 +
>> arch/x86/kernel/cpu/common.c | 12 ++++++++++-
>> arch/x86/kernel/vmlinux.lds.S | 10 +++++++++
>> 5 files changed, 72 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
>> index 426b8c669d6a..0cde243b7542 100644
>> --- a/arch/x86/entry/entry_64.S
>> +++ b/arch/x86/entry/entry_64.S
>> @@ -140,6 +140,54 @@ END(native_usergs_sysret64)
>> * with them due to bugs in both AMD and Intel CPUs.
>> */
>>
>> + .pushsection .entry_trampoline, "ax"
>> +
>> +/*
>> + * The code in here gets remapped into cpu_entry_area's trampoline. This means
>> + * that the assembler and linker have the wrong idea as to where this code
>> + * lives (and, in fact, it's mapped more than once, so it's not even at a
>> + * fixed address). So we can't reference any symbols outside the entry
>> + * trampoline and expect it to work.
>> + *
>> + * Instead, we carefully abuse %rip-relative addressing.
>> + * .Lentry_trampoline(%rip) refers to the start of the remapped) entry
>
> _entry_trampoline(%rip) I'd guess.
Indeed. It used to be .L, but then I put it in the linker script the
obvious way and it wasn't any more.
>
>> + * trampoline. We can thus find cpu_entry_area with this macro:
>
> Uuh, fun. :)
That's what I thought!
>
>> + */
>> +
>> +#define CPU_ENTRY_AREA \
>> + _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
>
> So this generates
>
> _entry_trampoline - 16384(%rip)
>
> here. IINM, the layout looks like this
>
> [ GDT | TSS | TSS | TSS | trampoline ]
>
> where each section is a page, and we have 4 pages per CPU. Just for my
> own understanding...
Indeed.
>
>> +
>> +/* The top word of the SYSENTER stack is hot and is usable as scratch space. */
>> +#define RSP_SCRATCH CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack + \
>> + SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
>
> I'm wondering if it would be easier to make SYSENTER_stack part of
> struct cpu_entry_area and thus simplify that wild offset math here :)
It's like that with the last patch that I haven't send out applied, actually :)
>
> Also, pls align:
>
> #define RSP_SCRATCH CPU_ENTRY_AREA_tss + CPU_TSS_SYSENTER_stack + \
> SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
Done.
>
>> +
>> +ENTRY(entry_SYSCALL_64_trampoline)
>> + UNWIND_HINT_EMPTY
>> + swapgs
>> +
>> + /* Stash the user RSP. */
>> + movq %rsp, RSP_SCRATCH
>> +
>> + /* Load the top of the task stack into RSP */
>> + movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
>
> Yeah, let's put CPU_ENTRY_AREA first because then it reads easier:
>
> movq CPU_ENTRY_AREA + CPU_ENTRY_AREA_tss + TSS_sp1, %rsp
Nope, it won't build. That would expand like 0x1(%rip) + 0x2, which
isn't valid.
>
> i.e., pointer to cpu_entry_area, offset to tss within said
> cpu_entry_area and then inside that, sp1.
>
> Ditto for above.
>
> ...
>
>> @@ -1417,10 +1424,13 @@ static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
>> /* May not be marked __init: used by software suspend */
>> void syscall_init(void)
>> {
>> + extern char _entry_trampoline[];
>> + extern char entry_SYSCALL_64_trampoline[];
>> +
>> int cpu = smp_processor_id();
>>
>> wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS);
>> - wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);
>> + wrmsrl(MSR_LSTAR, (unsigned long)get_cpu_entry_area(cpu)->entry_trampoline + (entry_SYSCALL_64_trampoline - _entry_trampoline));
>
> Definitely a local var.
Done.
>
>> #ifdef CONFIG_IA32_EMULATION
>> wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
>> diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
>> index a4009fb9be87..2738cfb6c8c8 100644
>> --- a/arch/x86/kernel/vmlinux.lds.S
>> +++ b/arch/x86/kernel/vmlinux.lds.S
>> @@ -107,6 +107,16 @@ SECTIONS
>> SOFTIRQENTRY_TEXT
>> *(.fixup)
>> *(.gnu.warning)
>> +
>> +#ifdef CONFIG_X86_64
>> + /* Entry trampoline */
>
> No need for that comment - variable and section names are enough. :)
>
next prev parent reply other threads:[~2017-11-25 15:00 UTC|newest]
Thread overview: 113+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-24 17:23 [PATCH 00/43] x86 entry-stack and Kaiser series, 2017/11/24, v2 version Ingo Molnar
2017-11-24 17:23 ` [PATCH 01/43] x86/decoder: Add new TEST instruction pattern Ingo Molnar
2017-11-24 17:23 ` [PATCH 02/43] x86/asm/64: Allocate and enable the SYSENTER stack Ingo Molnar
2017-11-24 17:23 ` [PATCH 03/43] x86/dumpstack: Add get_stack_info() support for " Ingo Molnar
2017-11-24 17:23 ` [PATCH 04/43] x86/gdt: Put per-cpu GDT remaps in ascending order Ingo Molnar
2017-11-24 17:23 ` [PATCH 05/43] x86/fixmap: Generalize the GDT fixmap mechanism Ingo Molnar
2017-11-24 17:23 ` [PATCH 06/43] x86/kasan/64: Teach KASAN about the cpu_entry_area Ingo Molnar
2017-11-24 17:23 ` [PATCH 07/43] x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss Ingo Molnar
2017-11-24 17:23 ` [PATCH 08/43] x86/dumpstack: Handle stack overflow on all stacks Ingo Molnar
2017-11-24 17:23 ` [PATCH 09/43] x86/asm: Move SYSENTER_stack to the beginning of struct tss_struct Ingo Molnar
2017-11-24 17:23 ` [PATCH 10/43] x86/asm: Remap the TSS into the cpu entry area Ingo Molnar
2017-11-24 17:23 ` [PATCH 11/43] x86/asm/64: Separate cpu_current_top_of_stack from TSS.sp0 Ingo Molnar
2017-11-24 17:23 ` [PATCH 12/43] x86/espfix/64: Stop assuming that pt_regs is on the entry stack Ingo Molnar
2017-11-24 18:25 ` Borislav Petkov
2017-11-24 19:12 ` Andy Lutomirski
2017-11-26 14:05 ` Ingo Molnar
2017-11-26 17:28 ` Borislav Petkov
2017-11-27 9:19 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 13/43] x86/asm/64: Use a percpu trampoline stack for IDT entries Ingo Molnar
2017-11-24 19:02 ` Borislav Petkov
2017-11-26 14:16 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 14/43] x86/asm/64: Return to userspace from the trampoline stack Ingo Molnar
2017-11-24 19:10 ` Borislav Petkov
2017-11-26 14:18 ` Ingo Molnar
2017-11-26 17:33 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 15/43] x86/entry/64: Create a percpu SYSCALL entry trampoline Ingo Molnar
2017-11-25 11:40 ` Borislav Petkov
2017-11-25 15:00 ` Andy Lutomirski [this message]
2017-11-26 14:26 ` [PATCH] " Ingo Molnar
2017-11-24 17:23 ` [PATCH 16/43] x86/irq: Remove an old outdated comment about context tracking races Ingo Molnar
2017-11-25 12:05 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 17/43] x86/irq/64: In the stack overflow warning, print the offending IP Ingo Molnar
2017-11-25 12:07 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 18/43] x86/entry/64: Move the IST stacks into cpu_entry_area Ingo Molnar
2017-11-25 12:34 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 19/43] x86/entry/64: Remove the SYSENTER stack canary Ingo Molnar
2017-11-25 15:29 ` Borislav Petkov
2017-11-24 17:23 ` [PATCH 20/43] x86/entry: Clean up SYSENTER_stack code Ingo Molnar
2017-11-25 16:39 ` Borislav Petkov
2017-11-25 16:50 ` Thomas Gleixner
2017-11-25 16:55 ` Andy Lutomirski
2017-11-25 17:03 ` Thomas Gleixner
2017-11-25 17:10 ` Borislav Petkov
2017-11-25 17:26 ` Andy Lutomirski
2017-11-27 9:27 ` Peter Zijlstra
2017-11-24 17:23 ` [PATCH 21/43] x86/mm/kaiser: Disable global pages by default with KAISER Ingo Molnar
2017-11-24 17:23 ` [PATCH 22/43] x86/mm/kaiser: Prepare assembly for entry/exit CR3 switching Ingo Molnar
2017-11-25 0:02 ` Thomas Gleixner
2017-11-25 12:41 ` Thomas Gleixner
2017-11-26 11:50 ` Borislav Petkov
2017-11-26 14:55 ` [PATCH v2] x86/mm/kaiser: Prepare the x86/entry assembly code " Ingo Molnar
2017-11-27 13:29 ` Josh Poimboeuf
2017-11-27 13:36 ` Thomas Gleixner
2017-11-24 17:23 ` [PATCH 23/43] x86/mm/kaiser: Introduce user-mapped per-cpu areas Ingo Molnar
2017-11-26 17:41 ` Borislav Petkov
2017-11-27 9:26 ` Ingo Molnar
2017-11-27 21:14 ` Dave Hansen
2017-11-24 17:23 ` [PATCH 24/43] x86/mm/kaiser: Mark per-cpu data structures required for entry/exit Ingo Molnar
2017-11-25 17:17 ` Thomas Gleixner
2017-11-26 15:54 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 25/43] x86/mm/kaiser: Unmap kernel from userspace page tables (core patch) Ingo Molnar
2017-11-26 18:51 ` Borislav Petkov
2017-11-27 9:30 ` Ingo Molnar
2017-11-26 20:49 ` Borislav Petkov
2017-11-27 10:38 ` Ingo Molnar
2017-11-26 22:25 ` [PATCH 25/43] x86/mm/kaiser: Unmap kernel from userspace page tables (core patch), noexec=off Borislav Petkov
2017-11-26 22:41 ` Thomas Gleixner
2017-11-24 17:23 ` [PATCH 26/43] x86/mm/kaiser: Allow NX poison to be set in p4d/pgd Ingo Molnar
2017-11-24 17:23 ` [PATCH 27/43] x86/mm/kaiser: Make sure static PGDs are 8k in size Ingo Molnar
2017-11-24 17:23 ` [PATCH 28/43] x86/mm/kaiser: Map cpu entry area Ingo Molnar
2017-11-25 21:40 ` Thomas Gleixner
2017-11-26 15:19 ` Ingo Molnar
2017-11-24 17:23 ` [PATCH 29/43] x86/mm/kaiser: Map dynamically-allocated LDTs Ingo Molnar
2017-11-24 17:23 ` [PATCH 30/43] x86/mm/kaiser: Map espfix structures Ingo Molnar
2017-11-24 17:23 ` [PATCH 31/43] x86/mm/kaiser: Map entry stack variable Ingo Molnar
2017-11-24 17:24 ` [PATCH 32/43] x86/mm/kaiser: Map virtually-addressed performance monitoring buffers Ingo Molnar
2017-11-24 17:24 ` [PATCH 33/43] x86/mm: Move CR3 construction functions Ingo Molnar
2017-11-24 17:24 ` [PATCH 34/43] x86/mm: Remove hard-coded ASID limit checks Ingo Molnar
2017-11-24 17:24 ` [PATCH 35/43] x86/mm: Put mmu-to-h/w ASID translation in one place Ingo Molnar
2017-11-24 17:24 ` [PATCH 36/43] x86/mm/kaiser: Allow flushing for future ASID switches Ingo Molnar
2017-11-24 17:24 ` [PATCH 37/43] x86/mm/kaiser: Use PCID feature to make user and kernel switches faster Ingo Molnar
2017-11-24 17:24 ` [PATCH 38/43] x86/mm/kaiser: Disable native VSYSCALL Ingo Molnar
2017-11-24 17:24 ` [PATCH 39/43] x86/mm/kaiser: Add debugfs file to turn KAISER on/off at runtime Ingo Molnar
2017-11-24 17:24 ` [PATCH 40/43] x86/mm/kaiser: Add a function to check for KAISER being enabled Ingo Molnar
2017-11-24 17:24 ` [PATCH 41/43] x86/mm/kaiser: Un-poison PGDs at runtime Ingo Molnar
2017-11-24 17:24 ` [PATCH 42/43] x86/mm/kaiser: Allow KAISER to be enabled/disabled " Ingo Molnar
2017-11-25 19:18 ` Thomas Gleixner
2017-11-25 19:53 ` Andy Lutomirski
2017-11-25 20:05 ` Thomas Gleixner
2017-11-25 22:10 ` Andy Lutomirski
2017-11-25 22:48 ` Thomas Gleixner
2017-11-26 0:21 ` Andy Lutomirski
2017-11-26 8:11 ` Thomas Gleixner
2017-11-24 17:24 ` [PATCH 43/43] x86/mm/kaiser: Add Kconfig Ingo Molnar
2017-11-24 20:22 ` [crash] PANIC: double fault, error_code: 0x0 Ingo Molnar
2017-11-24 20:59 ` Andy Lutomirski
2017-11-24 21:49 ` Ingo Molnar
2017-11-24 21:52 ` Ingo Molnar
2017-11-24 22:09 ` Ingo Molnar
2017-11-24 22:35 ` Andy Lutomirski
2017-11-24 22:53 ` Ingo Molnar
2017-11-25 9:21 ` Ingo Molnar
2017-11-25 9:32 ` Ingo Molnar
2017-11-25 9:39 ` Ingo Molnar
2017-11-25 11:17 ` [PATCH] x86/mm/kaiser: Fix IRQ entries text section mapping Ingo Molnar
2017-11-25 16:08 ` Thomas Gleixner
2017-11-25 20:06 ` Steven Rostedt
2017-11-27 8:14 ` Peter Zijlstra
2017-11-27 8:21 ` Peter Zijlstra
2017-11-25 4:09 ` [crash] PANIC: double fault, error_code: 0x0 Dave Hansen
2017-11-25 4:15 ` Dave Hansen
-- strict thread matches above, loose matches on Subject: below --
2017-11-24 9:14 [PATCH 00/43] x86 entry-stack and Kaiser series, 2017/11/24 version Ingo Molnar
2017-11-24 9:14 ` [PATCH 15/43] x86/entry/64: Create a percpu SYSCALL entry trampoline Ingo Molnar
2017-11-24 13:52 ` Thomas Gleixner
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