* [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset
@ 2017-11-29 23:35 Brian Norris
2017-11-30 1:07 ` Brian Norris
2017-12-04 9:58 ` [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Heiko Stuebner
0 siblings, 2 replies; 6+ messages in thread
From: Brian Norris @ 2017-11-29 23:35 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-kernel, linux-rockchip, mka, Doug Anderson,
linux-arm-kernel, Nickey Yang, Brian Norris
We've documented this one already, but we didn't add it to the DTSI yet.
Suggested-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c6dae25a3f23..8940a3dc3670 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1648,6 +1648,8 @@
<&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>;
clock-names = "ref", "pclk", "phy_cfg", "grf";
power-domains = <&power RK3399_PD_VIO>;
+ resets = <&cru SRST_P_MIPI_DSI0>;
+ reset-names = "apb";
rockchip,grf = <&grf>;
status = "disabled";
--
2.15.0.531.g2ccb3012c9-goog
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset
2017-11-29 23:35 [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Brian Norris
@ 2017-11-30 1:07 ` Brian Norris
2017-11-30 1:10 ` Brian Norris
2017-11-30 1:11 ` [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399 Brian Norris
2017-12-04 9:58 ` [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Heiko Stuebner
1 sibling, 2 replies; 6+ messages in thread
From: Brian Norris @ 2017-11-30 1:07 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-kernel, Doug Anderson, linux-rockchip, Nickey Yang, mka,
linux-arm-kernel, Chris Zhong
From: Nickey Yang <nickey.yang@rock-chips.com>
This patch adds the information for the secondary MIPI DSI controller,
e.g., interrupts, grf, clocks, ports and so on. Mirrors the existing
definition for dsi0.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 ++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8940a3dc3670..e7e882d06c68 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1526,6 +1526,11 @@
reg = <2>;
remote-endpoint = <&hdmi_in_vopl>;
};
+
+ vopl_out_mipi1: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&mipi1_in_vopl>;
+ };
};
};
@@ -1573,6 +1578,11 @@
reg = <2>;
remote-endpoint = <&hdmi_in_vopb>;
};
+
+ vopb_out_mipi1: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&mipi1_in_vopb>;
+ };
};
};
@@ -1674,6 +1684,41 @@
};
};
+ mipi_dsi1: mipi@ff968000 {
+ compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x0 0xff968000 0x0 0x8000>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI1>,
+ <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru PCLK_VIO_GRF>;
+ clock-names = "ref", "pclk", "phy_cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ resets = <&cru SRST_P_MIPI_DSI1>;
+ reset-names = "apb";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi1_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi1_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi1>;
+ };
+
+ mipi1_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi1>;
+ };
+ };
+ };
+ };
+
edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
--
2.15.0.531.g2ccb3012c9-goog
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset
2017-11-30 1:07 ` Brian Norris
@ 2017-11-30 1:10 ` Brian Norris
2017-11-30 1:11 ` [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399 Brian Norris
1 sibling, 0 replies; 6+ messages in thread
From: Brian Norris @ 2017-11-30 1:10 UTC (permalink / raw)
To: Brian Norris
Cc: Heiko Stuebner, linux-kernel, Doug Anderson, linux-rockchip,
Nickey Yang, mka, Chris Zhong, linux-arm-kernel
On Wed, Nov 29, 2017 at 05:07:27PM -0800, Brian Norris wrote:
Sorry, I got the wrong $subject, will resend :(
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399
2017-11-30 1:07 ` Brian Norris
2017-11-30 1:10 ` Brian Norris
@ 2017-11-30 1:11 ` Brian Norris
2017-12-04 10:01 ` Heiko Stuebner
1 sibling, 1 reply; 6+ messages in thread
From: Brian Norris @ 2017-11-30 1:11 UTC (permalink / raw)
To: Brian Norris
Cc: Heiko Stuebner, linux-kernel, Doug Anderson, linux-rockchip,
Nickey Yang, mka, Chris Zhong, linux-arm-kernel
From: Nickey Yang <nickey.yang@rock-chips.com>
This patch adds the information for the secondary MIPI DSI controller,
e.g., interrupts, grf, clocks, ports and so on. Mirrors the existing
definition for dsi0.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 ++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8940a3dc3670..e7e882d06c68 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1526,6 +1526,11 @@
reg = <2>;
remote-endpoint = <&hdmi_in_vopl>;
};
+
+ vopl_out_mipi1: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&mipi1_in_vopl>;
+ };
};
};
@@ -1573,6 +1578,11 @@
reg = <2>;
remote-endpoint = <&hdmi_in_vopb>;
};
+
+ vopb_out_mipi1: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&mipi1_in_vopb>;
+ };
};
};
@@ -1674,6 +1684,41 @@
};
};
+ mipi_dsi1: mipi@ff968000 {
+ compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x0 0xff968000 0x0 0x8000>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI1>,
+ <&cru SCLK_DPHY_TX1RX1_CFG>, <&cru PCLK_VIO_GRF>;
+ clock-names = "ref", "pclk", "phy_cfg", "grf";
+ power-domains = <&power RK3399_PD_VIO>;
+ resets = <&cru SRST_P_MIPI_DSI1>;
+ reset-names = "apb";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi1_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi1_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi1>;
+ };
+
+ mipi1_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi1>;
+ };
+ };
+ };
+ };
+
edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
--
2.15.0.531.g2ccb3012c9-goog
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset
2017-11-29 23:35 [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Brian Norris
2017-11-30 1:07 ` Brian Norris
@ 2017-12-04 9:58 ` Heiko Stuebner
1 sibling, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2017-12-04 9:58 UTC (permalink / raw)
To: Brian Norris
Cc: linux-kernel, linux-rockchip, mka, Doug Anderson,
linux-arm-kernel, Nickey Yang
Am Mittwoch, 29. November 2017, 15:35:41 CET schrieb Brian Norris:
> We've documented this one already, but we didn't add it to the DTSI yet.
>
> Suggested-by: Nickey Yang <nickey.yang@rock-chips.com>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
applied for 4.16
Thanks
Heiko
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399
2017-11-30 1:11 ` [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399 Brian Norris
@ 2017-12-04 10:01 ` Heiko Stuebner
0 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2017-12-04 10:01 UTC (permalink / raw)
To: Brian Norris
Cc: Brian Norris, linux-kernel, Doug Anderson, linux-rockchip,
Nickey Yang, mka, Chris Zhong, linux-arm-kernel
Am Mittwoch, 29. November 2017, 17:11:27 CET schrieb Brian Norris:
> From: Nickey Yang <nickey.yang@rock-chips.com>
>
> This patch adds the information for the secondary MIPI DSI controller,
> e.g., interrupts, grf, clocks, ports and so on. Mirrors the existing
> definition for dsi0.
>
> Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
applied for 4.16
Thanks
Heiko
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-12-04 10:01 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2017-11-29 23:35 [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Brian Norris
2017-11-30 1:07 ` Brian Norris
2017-11-30 1:10 ` Brian Norris
2017-11-30 1:11 ` [PATCH] arm64: dts: rockchip: add mipi_dsi1 support for rk3399 Brian Norris
2017-12-04 10:01 ` Heiko Stuebner
2017-12-04 9:58 ` [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Heiko Stuebner
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