From: Andrew Lunn <andrew@lunn.ch>
To: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Cc: joel@jms.id.au, andrew@aj.id.au, arnd@arndb.de,
gregkh@linuxfoundation.org, jdelvare@suse.com,
linux@roeck-us.net, benh@kernel.crashing.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, openbmc@lists.ozlabs.org
Subject: Re: [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core
Date: Wed, 21 Feb 2018 18:04:34 +0100 [thread overview]
Message-ID: <20180221170434.GF29204@lunn.ch> (raw)
In-Reply-To: <20180221161606.32247-2-jae.hyun.yoo@linux.intel.com>
> +static int peci_locked_xfer(struct peci_adapter *adapter,
> + struct peci_xfer_msg *msg,
> + bool do_retry,
> + bool has_aw_fcs)
> +{
> + ktime_t start, end;
> + s64 elapsed_ms;
> + int rc = 0;
> +
> + if (!adapter->xfer) {
> + dev_dbg(&adapter->dev, "PECI level transfers not supported\n");
> + return -ENODEV;
> + }
> +
> + if (in_atomic() || irqs_disabled()) {
Hi Jae
Is there a real need to do transfers in atomic context, or with
interrupts disabled?
> + rt_mutex_trylock(&adapter->bus_lock);
> + if (!rc)
> + return -EAGAIN; /* PECI activity is ongoing */
> + } else {
> + rt_mutex_lock(&adapter->bus_lock);
> + }
> +
> + if (do_retry)
> + start = ktime_get();
> +
> + do {
> + rc = adapter->xfer(adapter, msg);
> +
> + if (!do_retry)
> + break;
> +
> + /* Per the PECI spec, need to retry commands that return 0x8x */
> + if (!(!rc && ((msg->rx_buf[0] & DEV_PECI_CC_RETRY_ERR_MASK) ==
> + DEV_PECI_CC_TIMEOUT)))
> + break;
> +
> + /* Set the retry bit to indicate a retry attempt */
> + msg->tx_buf[1] |= DEV_PECI_RETRY_BIT;
> +
> + /* Recalculate the AW FCS if it has one */
> + if (has_aw_fcs)
> + msg->tx_buf[msg->tx_len - 1] = 0x80 ^
> + peci_aw_fcs((u8 *)msg,
> + 2 + msg->tx_len);
> +
> + /* Retry for at least 250ms before returning an error */
> + end = ktime_get();
> + elapsed_ms = ktime_to_ms(ktime_sub(end, start));
> + if (elapsed_ms >= DEV_PECI_RETRY_TIME_MS) {
> + dev_dbg(&adapter->dev, "Timeout retrying xfer!\n");
> + break;
> + }
> + } while (true);
So you busy loop to 1/4 second? How about putting a sleep in here so
other things can be done between each retry.
And should it not return -ETIMEDOUT after that 1/4 second?
> +static int peci_scan_cmd_mask(struct peci_adapter *adapter)
> +{
> + struct peci_xfer_msg msg;
> + u32 dib;
> + int rc = 0;
> +
> + /* Update command mask just once */
> + if (adapter->cmd_mask & BIT(PECI_CMD_PING))
> + return 0;
> +
> + msg.addr = PECI_BASE_ADDR;
> + msg.tx_len = GET_DIB_WR_LEN;
> + msg.rx_len = GET_DIB_RD_LEN;
> + msg.tx_buf[0] = GET_DIB_PECI_CMD;
> +
> + rc = peci_xfer(adapter, &msg);
> + if (rc < 0) {
> + dev_dbg(&adapter->dev, "PECI xfer error, rc : %d\n", rc);
> + return rc;
> + }
> +
> + dib = msg.rx_buf[0] | (msg.rx_buf[1] << 8) |
> + (msg.rx_buf[2] << 16) | (msg.rx_buf[3] << 24);
> +
> + /* Check special case for Get DIB command */
> + if (dib == 0x00) {
> + dev_dbg(&adapter->dev, "DIB read as 0x00\n");
> + return -1;
> + }
> +
> + if (!rc) {
> + /**
> + * setting up the supporting commands based on minor rev#
> + * see PECI Spec Table 3-1
> + */
> + dib = (dib >> 8) & 0xF;
> +
> + if (dib >= 0x1) {
> + adapter->cmd_mask |= BIT(PECI_CMD_RD_PKG_CFG);
> + adapter->cmd_mask |= BIT(PECI_CMD_WR_PKG_CFG);
> + }
> +
> + if (dib >= 0x2)
> + adapter->cmd_mask |= BIT(PECI_CMD_RD_IA_MSR);
> +
> + if (dib >= 0x3) {
> + adapter->cmd_mask |= BIT(PECI_CMD_RD_PCI_CFG_LOCAL);
> + adapter->cmd_mask |= BIT(PECI_CMD_WR_PCI_CFG_LOCAL);
> + }
> +
> + if (dib >= 0x4)
> + adapter->cmd_mask |= BIT(PECI_CMD_RD_PCI_CFG);
> +
> + if (dib >= 0x5)
> + adapter->cmd_mask |= BIT(PECI_CMD_WR_PCI_CFG);
> +
> + if (dib >= 0x6)
> + adapter->cmd_mask |= BIT(PECI_CMD_WR_IA_MSR);
Lots of magic numbers here. Can they be replaced with #defines. Also,
it looks like a switch statement could be used, with fall through.
> +
> + adapter->cmd_mask |= BIT(PECI_CMD_GET_TEMP);
> + adapter->cmd_mask |= BIT(PECI_CMD_GET_DIB);
> + adapter->cmd_mask |= BIT(PECI_CMD_PING);
> + } else {
> + dev_dbg(&adapter->dev, "Error reading DIB, rc : %d\n", rc);
> + }
> +
> + return rc;
> +}
> +
> +static int peci_ioctl_get_temp(struct peci_adapter *adapter, void *vmsg)
> +{
> + struct peci_get_temp_msg *umsg = vmsg;
> + struct peci_xfer_msg msg;
> + int rc;
> +
Is this getting the temperature?
> + rc = peci_cmd_support(adapter, PECI_CMD_GET_TEMP);
> + if (rc < 0)
> + return rc;
> +
> + msg.addr = umsg->addr;
> + msg.tx_len = GET_TEMP_WR_LEN;
> + msg.rx_len = GET_TEMP_RD_LEN;
> + msg.tx_buf[0] = GET_TEMP_PECI_CMD;
> +
> + rc = peci_xfer(adapter, &msg);
> + if (rc < 0)
> + return rc;
> +
> + umsg->temp_raw = msg.rx_buf[0] | (msg.rx_buf[1] << 8);
> +
> + return 0;
> +}
> +static long peci_ioctl(struct file *file, unsigned int iocmd, unsigned long arg)
> +{
> + struct peci_adapter *adapter = file->private_data;
> + void __user *argp = (void __user *)arg;
> + unsigned int msg_len;
> + enum peci_cmd cmd;
> + u8 *msg;
> + int rc = 0;
> +
> + dev_dbg(&adapter->dev, "ioctl, cmd=0x%x, arg=0x%lx\n", iocmd, arg);
> +
> + switch (iocmd) {
> + case PECI_IOC_PING:
> + case PECI_IOC_GET_DIB:
> + case PECI_IOC_GET_TEMP:
> + case PECI_IOC_RD_PKG_CFG:
> + case PECI_IOC_WR_PKG_CFG:
> + case PECI_IOC_RD_IA_MSR:
> + case PECI_IOC_RD_PCI_CFG:
> + case PECI_IOC_RD_PCI_CFG_LOCAL:
> + case PECI_IOC_WR_PCI_CFG_LOCAL:
> + cmd = _IOC_TYPE(iocmd) - PECI_IOC_BASE;
> + msg_len = _IOC_SIZE(iocmd);
> + break;
Adding new ioctl calls is pretty frowned up. Can you export this info
via /sysfs?
Also, should there be some permission checks here? Or is any user
allowed to call these ioctls?
Andrew
next prev parent reply other threads:[~2018-02-21 17:04 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-21 16:15 [PATCH v2 0/8] PECI device driver introduction Jae Hyun Yoo
2018-02-21 16:15 ` [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core Jae Hyun Yoo
2018-02-21 17:04 ` Andrew Lunn [this message]
2018-02-21 20:31 ` Jae Hyun Yoo
2018-02-21 21:51 ` Andrew Lunn
2018-02-21 22:03 ` Jae Hyun Yoo
2018-02-21 17:58 ` Greg KH
2018-02-21 20:42 ` Jae Hyun Yoo
2018-02-22 6:54 ` Greg KH
2018-02-22 17:20 ` Jae Hyun Yoo
2018-02-22 7:01 ` kbuild test robot
2018-02-22 7:01 ` [RFC PATCH] drivers/peci: peci_match_id() can be static kbuild test robot
2018-02-22 17:25 ` Jae Hyun Yoo
2018-03-07 3:19 ` [PATCH v2 1/8] [PATCH 1/8] drivers/peci: Add support for PECI bus driver core Julia Cartwright
2018-03-07 19:03 ` Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 2/8] [PATCH 2/8] Documentations: dt-bindings: Add a document of PECI adapter driver for Aspeed AST24xx/25xx SoCs Jae Hyun Yoo
2018-02-21 17:13 ` Andrew Lunn
2018-02-21 20:35 ` Jae Hyun Yoo
2018-03-06 12:40 ` Pavel Machek
2018-03-06 12:54 ` Andrew Lunn
2018-03-06 13:05 ` Pavel Machek
2018-03-06 13:19 ` Arnd Bergmann
2018-03-06 19:05 ` Jae Hyun Yoo
2018-03-07 22:11 ` Pavel Machek
2018-03-09 23:41 ` Milton Miller II
2018-03-09 23:47 ` Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 3/8] [PATCH 3/8] ARM: dts: aspeed: peci: Add PECI node Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 4/8] [PATCH 4/8] drivers/peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 5/8] [PATCH [5/8] Documentation: dt-bindings: Add a document for PECI hwmon client driver Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 6/8] [PATCH 6/8] Documentation: hwmon: " Jae Hyun Yoo
2018-03-06 20:28 ` Randy Dunlap
2018-03-06 21:08 ` Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 7/8] [PATCH 7/8] drivers/hwmon: Add a generic " Jae Hyun Yoo
2018-02-21 18:26 ` Guenter Roeck
2018-02-21 21:24 ` Jae Hyun Yoo
2018-02-21 21:48 ` Guenter Roeck
2018-02-21 23:07 ` Jae Hyun Yoo
2018-02-22 0:37 ` Andrew Lunn
2018-02-22 1:29 ` Jae Hyun Yoo
2018-02-24 0:00 ` Miguel Ojeda
2018-02-24 9:32 ` Jae Hyun Yoo
2018-03-13 9:32 ` Stef van Os
2018-03-13 18:56 ` Jae Hyun Yoo
2018-02-21 16:16 ` [PATCH v2 8/8] [PATCH 8/8] Add a maintainer for the PECI subsystem Jae Hyun Yoo
2018-03-06 12:40 ` [PATCH v2 0/8] PECI device driver introduction Pavel Machek
2018-03-06 19:21 ` Jae Hyun Yoo
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