[PATCH 0/4] ARM: brcmstb: Add support for the V7 memory map

[PATCH 0/4] ARM: brcmstb: Add support for the V7 memory map

[Florian Fainelli]

Hi all,

This patch series updates the brcmstb.S DEBUG_LL routines to dynamically detect
one of the latest STB chip: BCM7278. This chip has a different memory map which
requires use to lookup the main ID register to know whether which register
physical offset we must use.

As a consequence of doing that, we do a number of things:

- allow the inclusion of cputype.h in assembly files to reduce the duplication
  of constants
- define the Brahma-B53 and Brahma-B15 main ID register values, which was long
  overdue
- finaly update brcmstb.S to detect 7278 and offset the base register address
  accordingly

Note that Doug had a slightly different approach in our downstream tree where he
actually added the same MIDR_* constants similar to what ARM64 has, I took that
part away in order to minimize the delta, but I can easily submit that patch
if this is the desired direction moving forward.

Thank you!

Doug Berger (3):
  ARM: Allow this header to be included by assembly files
  ARM: add Broadcom Brahma-B53 main ID definition
  ARM: brcmstb: Add support for the V7 memory map

Florian Fainelli (1):
  ARM: add Broadcom Brahma-B15 main ID definition

 arch/arm/include/asm/cputype.h   | 15 ++++++++++++---
 arch/arm/include/debug/brcmstb.S | 21 ++++++++++++++++++++-
 2 files changed, 32 insertions(+), 4 deletions(-)

-- 
2.14.1

[PATCH 1/4] ARM: Allow this header to be included by assembly files

[Florian Fainelli]

From: Doug Berger <opendmb@gmail.com>

The constants defined in this file are equally useful in assembly and C
source files. The arm64 architecture version of this file allows
inclusion in both assembly and C source files, so this this commit adds
that capability to the arm architecture version so that the constants
don't need to be defined in multiple places.

Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/arm/include/asm/cputype.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index cb546425da8a..e7632f536633 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -2,9 +2,6 @@
 #ifndef __ASM_ARM_CPUTYPE_H
 #define __ASM_ARM_CPUTYPE_H
 
-#include <linux/stringify.h>
-#include <linux/kernel.h>
-
 #define CPUID_ID	0
 #define CPUID_CACHETYPE	1
 #define CPUID_TCM	2
@@ -98,6 +95,11 @@
 /* Qualcomm implemented cores */
 #define ARM_CPU_PART_SCORPION		0x510002d0
 
+#ifndef __ASSEMBLY__
+
+#include <linux/stringify.h>
+#include <linux/kernel.h>
+
 extern unsigned int processor_id;
 
 #ifdef CONFIG_CPU_CP15
@@ -326,4 +328,6 @@ static inline int __attribute_const__ cpuid_feature_extract_field(u32 features,
 #define cpuid_feature_extract(reg, field) \
 	cpuid_feature_extract_field(read_cpuid_ext(reg), field)
 
+#endif /* __ASSEMBLY__ */
+
 #endif
-- 
2.14.1

[PATCH 2/4] ARM: add Broadcom Brahma-B53 main ID definition

[Florian Fainelli]

From: Doug Berger <opendmb@gmail.com>

This commit allows a Broadcom Brahma-B53 core to be detected when executing
an arm architecture kernel in aarch32 state.

Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/arm/include/asm/cputype.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index e7632f536633..6d1c7b22faea 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -59,6 +59,7 @@
 	((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
 
 #define ARM_CPU_IMP_ARM			0x41
+#define ARM_CPU_IMP_BRCM		0x42
 #define ARM_CPU_IMP_DEC			0x44
 #define ARM_CPU_IMP_INTEL		0x69
 
@@ -76,6 +77,9 @@
 #define ARM_CPU_PART_CORTEX_A15		0x4100c0f0
 #define ARM_CPU_PART_MASK		0xff00fff0
 
+/* Broadcom implemented processors */
+#define ARM_CPU_PART_BRAHMA_B53		0x42001000
+
 /* DEC implemented cores */
 #define ARM_CPU_PART_SA1100		0x4400a110
 
-- 
2.14.1

[PATCH 3/4] ARM: add Broadcom Brahma-B15 main ID definition

[Florian Fainelli]

Define Broadcom's Brahma-B15 main ID register value, masked with
ARM_CPU_PART_MASK.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/arm/include/asm/cputype.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 6d1c7b22faea..d1b62ee69f3b 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -78,6 +78,7 @@
 #define ARM_CPU_PART_MASK		0xff00fff0
 
 /* Broadcom implemented processors */
+#define ARM_CPU_PART_BRAHMA_B15		0x420000f0
 #define ARM_CPU_PART_BRAHMA_B53		0x42001000
 
 /* DEC implemented cores */
-- 
2.14.1

[PATCH 4/4] ARM: brcmstb: Add support for the V7 memory map

[Florian Fainelli]

From: Doug Berger <opendmb@gmail.com>

The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.

Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.

Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/arm/include/debug/brcmstb.S | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index c826f15d2f80..0f580caa81e5 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -11,20 +11,25 @@
  * GNU General Public License for more details.
  */
 #include <linux/serial_reg.h>
+#include <asm/cputype.h>
 
 /* Physical register offset and virtual register offset */
 #define REG_PHYS_BASE		0xf0000000
+#define REG_PHYS_BASE_V7	0x08000000
 #define REG_VIRT_BASE		0xfc000000
 #define REG_PHYS_ADDR(x)	((x) + REG_PHYS_BASE)
+#define REG_PHYS_ADDR_V7(x)	((x) + REG_PHYS_BASE_V7)
 
 /* Product id can be read from here */
 #define SUN_TOP_CTRL_BASE	REG_PHYS_ADDR(0x404000)
+#define SUN_TOP_CTRL_BASE_V7	REG_PHYS_ADDR_V7(0x404000)
 
 #define UARTA_3390		REG_PHYS_ADDR(0x40a900)
 #define UARTA_7250		REG_PHYS_ADDR(0x40b400)
 #define UARTA_7260		REG_PHYS_ADDR(0x40c000)
 #define UARTA_7268		UARTA_7260
 #define UARTA_7271		UARTA_7268
+#define UARTA_7278		REG_PHYS_ADDR_V7(0x40c000)
 #define UARTA_7364		REG_PHYS_ADDR(0x40b000)
 #define UARTA_7366		UARTA_7364
 #define UARTA_74371		REG_PHYS_ADDR(0x406b00)
@@ -55,8 +60,21 @@
 		mov	\rv, #0			@ yes; record init is done
 		str	\rv, [\tmp]
 
+		/* Check for V7 memory map if B53 */
+		mrc	p15, 0, \rv, c0, c0, 0	@ get Main ID register
+		ldr	\rp, =ARM_CPU_PART_MASK
+		and	\rv, \rv, \rp
+		ldr	\rp, =ARM_CPU_PART_BRAHMA_B53	@ check for B53 CPU
+		cmp	\rv, \rp
+		bne	10f
+
+		/* if PERIPHBASE doesn't overlap REG_PHYS_BASE use V7 map */
+		mrc	p15, 1, \rv, c15, c3, 0	@ get PERIPHBASE from CBAR
+		ands	\rv, \rv, #REG_PHYS_BASE
+		ldreq	\rp, =SUN_TOP_CTRL_BASE_V7
+
 		/* Check SUN_TOP_CTRL base */
-		ldr	\rp, =SUN_TOP_CTRL_BASE	@ load SUN_TOP_CTRL PA
+10:		ldrne	\rp, =SUN_TOP_CTRL_BASE	@ load SUN_TOP_CTRL PA
 		ldr	\rv, [\rp, #0]		@ get register contents
 ARM_BE8(	rev	\rv, \rv )
 		and	\rv, \rv, #0xffffff00	@ strip revision bits [7:0]
@@ -72,6 +90,7 @@ ARM_BE8(	rev	\rv, \rv )
 27:		checkuart(\rp, \rv, 0x07437100, 74371)
 28:		checkuart(\rp, \rv, 0x74390000, 7439)
 29:		checkuart(\rp, \rv, 0x74450000, 7445)
+30:		checkuart(\rp, \rv, 0x72780000, 7278)
 
 		/* No valid UART found */
 90:		mov	\rp, #0
-- 
2.14.1

Re: [PATCH 0/4] ARM: brcmstb: Add support for the V7 memory map

[Florian Fainelli]

On 02/23/2018 01:09 PM, Florian Fainelli wrote:
> Hi all,
> 
> This patch series updates the brcmstb.S DEBUG_LL routines to dynamically detect
> one of the latest STB chip: BCM7278. This chip has a different memory map which
> requires use to lookup the main ID register to know whether which register
> physical offset we must use.
> 
> As a consequence of doing that, we do a number of things:
> 
> - allow the inclusion of cputype.h in assembly files to reduce the duplication
>   of constants
> - define the Brahma-B53 and Brahma-B15 main ID register values, which was long
>   overdue
> - finaly update brcmstb.S to detect 7278 and offset the base register address
>   accordingly
> 
> Note that Doug had a slightly different approach in our downstream tree where he
> actually added the same MIDR_* constants similar to what ARM64 has, I took that
> part away in order to minimize the delta, but I can easily submit that patch
> if this is the desired direction moving forward.

Russell, I would be more comfortable taking those changes through our
Broadcom ARM SoC pull requests, since the majority of the changes are in
brcmstb.S, can I get your acknowledgment for the first 3 patches?

Thank you!

> 
> Thank you!
> 
> Doug Berger (3):
>   ARM: Allow this header to be included by assembly files
>   ARM: add Broadcom Brahma-B53 main ID definition
>   ARM: brcmstb: Add support for the V7 memory map
> 
> Florian Fainelli (1):
>   ARM: add Broadcom Brahma-B15 main ID definition
> 
>  arch/arm/include/asm/cputype.h   | 15 ++++++++++++---
>  arch/arm/include/debug/brcmstb.S | 21 ++++++++++++++++++++-
>  2 files changed, 32 insertions(+), 4 deletions(-)
> 


-- 
Florian

Re: [PATCH 1/4] ARM: Allow this header to be included by assembly files

[Mylène Josserand]

Hello,

On Fri, 23 Feb 2018 13:09:20 -0800
Florian Fainelli <f.fainelli@gmail.com> wrote:

> From: Doug Berger <opendmb@gmail.com>
> 
> The constants defined in this file are equally useful in assembly and C
> source files. The arm64 architecture version of this file allows
> inclusion in both assembly and C source files, so this this commit adds
> that capability to the arm architecture version so that the constants
> don't need to be defined in multiple places.
> 
> Signed-off-by: Doug Berger <opendmb@gmail.com>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
>  arch/arm/include/asm/cputype.h | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
> index cb546425da8a..e7632f536633 100644
> --- a/arch/arm/include/asm/cputype.h
> +++ b/arch/arm/include/asm/cputype.h
> @@ -2,9 +2,6 @@
>  #ifndef __ASM_ARM_CPUTYPE_H
>  #define __ASM_ARM_CPUTYPE_H
>  
> -#include <linux/stringify.h>
> -#include <linux/kernel.h>
> -
>  #define CPUID_ID	0
>  #define CPUID_CACHETYPE	1
>  #define CPUID_TCM	2
> @@ -98,6 +95,11 @@
>  /* Qualcomm implemented cores */
>  #define ARM_CPU_PART_SCORPION		0x510002d0
>  
> +#ifndef __ASSEMBLY__
> +
> +#include <linux/stringify.h>
> +#include <linux/kernel.h>
> +
>  extern unsigned int processor_id;
>  
>  #ifdef CONFIG_CPU_CP15
> @@ -326,4 +328,6 @@ static inline int __attribute_const__ cpuid_feature_extract_field(u32 features,
>  #define cpuid_feature_extract(reg, field) \
>  	cpuid_feature_extract_field(read_cpuid_ext(reg), field)
>  
> +#endif /* __ASSEMBLY__ */
> +
>  #endif

Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>

Thanks!

Best regards,

-- 
Mylène Josserand, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH 1/4] ARM: Allow this header to be included by assembly files

[Florian Fainelli]

On Fri, 23 Feb 2018 13:09:20 -0800, Florian Fainelli <f.fainelli@gmail.com> wrote:
> From: Doug Berger <opendmb@gmail.com>
> 
> The constants defined in this file are equally useful in assembly and C
> source files. The arm64 architecture version of this file allows
> inclusion in both assembly and C source files, so this this commit adds
> that capability to the arm architecture version so that the constants
> don't need to be defined in multiple places.
> 
> Signed-off-by: Doug Berger <opendmb@gmail.com>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---

Applied to soc/next, thanks!
--
Florian

Re: [PATCH 2/4] ARM: add Broadcom Brahma-B53 main ID definition

[Florian Fainelli]

On Fri, 23 Feb 2018 13:09:21 -0800, Florian Fainelli <f.fainelli@gmail.com> wrote:
> From: Doug Berger <opendmb@gmail.com>
> 
> This commit allows a Broadcom Brahma-B53 core to be detected when executing
> an arm architecture kernel in aarch32 state.
> 
> Signed-off-by: Doug Berger <opendmb@gmail.com>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---

Applied to soc/next, thanks!
--
Florian

Re: [PATCH 3/4] ARM: add Broadcom Brahma-B15 main ID definition

[Florian Fainelli]

On Fri, 23 Feb 2018 13:09:22 -0800, Florian Fainelli <f.fainelli@gmail.com> wrote:
> Define Broadcom's Brahma-B15 main ID register value, masked with
> ARM_CPU_PART_MASK.
> 
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---

Applied to soc/next, thanks!
--
Florian

Re: [PATCH 4/4] ARM: brcmstb: Add support for the V7 memory map

[Florian Fainelli]

On Fri, 23 Feb 2018 13:09:23 -0800, Florian Fainelli <f.fainelli@gmail.com> wrote:
> From: Doug Berger <opendmb@gmail.com>
> 
> The 7278 device is the first device that includes support for the V7
> memory map developed for use in 64-bit architecture brcmstb devices.
> This map relocates the register physical offset from 0xF0000000 to
> 0x0000000008000000.
> 
> Since the ARM PERIPHBASE value is also relocated in the V7 memory map
> we can use its value to determine whether this device uses the new
> V7 memory map and therefore where to look for the SUN_TOP_CTRL
> register used to identify the chip family.
> 
> Signed-off-by: Doug Berger <opendmb@gmail.com>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---

Applied to soc/next, thanks!
--
Florian