linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, will.deacon@arm.com,
	dave.martin@arm.com, catalin.marinas@arm.com,
	marc.zyngier@arm.com, mark.rutland@arm.com,
	ard.biesheuvel@linaro.org, jnair@caviumnetworks.com,
	ckadabi@codeaurora.org, robin.murphy@arm.com,
	shankerd@codeaurora.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v4 15/22] arm64: capabilities: Change scope of VHE to Boot CPU feature
Date: Tue, 13 Mar 2018 11:51:13 +0000	[thread overview]
Message-ID: <20180313115120.17256-16-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20180313115120.17256-1-suzuki.poulose@arm.com>

We expect all CPUs to be running at the same EL inside the kernel
with or without VHE enabled and we have strict checks to ensure
that any mismatch triggers a kernel panic. If VHE is enabled,
we use the feature based on the boot CPU and all other CPUs
should follow. This makes it a perfect candidate for a cpability
based on the boot CPU,  which should be matched by all the CPUs
(both when is ON and OFF). This saves us some not-so-pretty
hooks and special code, just for verifying the conflict.

The patch also makes the VHE capability entry depend on
CONFIG_ARM64_VHE.

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Dave Martin <dave.martin@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/include/asm/cpufeature.h |  6 ++++++
 arch/arm64/include/asm/virt.h       |  6 ------
 arch/arm64/kernel/cpufeature.c      |  5 +++--
 arch/arm64/kernel/smp.c             | 38 -------------------------------------
 4 files changed, 9 insertions(+), 46 deletions(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 2f5edefdff99..6a1280493f57 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -287,6 +287,12 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
 	(ARM64_CPUCAP_SCOPE_LOCAL_CPU		|	\
 	 ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU)
 
+/*
+ * CPU feature used early in the boot based on the boot CPU. All secondary
+ * CPUs must match the state of the capability as detected by the boot CPU.
+ */
+#define ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE ARM64_CPUCAP_SCOPE_BOOT_CPU
+
 struct arm64_cpu_capabilities {
 	const char *desc;
 	u16 capability;
diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h
index c5f89442785c..9d1e24e030b3 100644
--- a/arch/arm64/include/asm/virt.h
+++ b/arch/arm64/include/asm/virt.h
@@ -102,12 +102,6 @@ static inline bool has_vhe(void)
 	return false;
 }
 
-#ifdef CONFIG_ARM64_VHE
-extern void verify_cpu_run_el(void);
-#else
-static inline void verify_cpu_run_el(void) {}
-#endif
-
 #endif /* __ASSEMBLY__ */
 
 #endif /* ! __ASM__VIRT_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index e9e81aabfe91..006e95d46a4a 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1030,13 +1030,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 		.matches = cpufeature_pan_not_uao,
 	},
 #endif /* CONFIG_ARM64_PAN */
+#ifdef CONFIG_ARM64_VHE
 	{
 		.desc = "Virtualization Host Extensions",
 		.capability = ARM64_HAS_VIRT_HOST_EXTN,
-		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
+		.type = ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE,
 		.matches = runs_at_el2,
 		.cpu_enable = cpu_copy_el2regs,
 	},
+#endif	/* CONFIG_ARM64_VHE */
 	{
 		.desc = "32-bit EL0 Support",
 		.capability = ARM64_HAS_32BIT_EL0,
@@ -1402,7 +1404,6 @@ static bool verify_local_cpu_caps(u16 scope_mask)
  */
 static void check_early_cpu_features(void)
 {
-	verify_cpu_run_el();
 	verify_cpu_asid_bits();
 	/*
 	 * Early features are used by the kernel already. If there
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 5cef11450183..f3e2e3aec0b0 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -85,43 +85,6 @@ enum ipi_msg_type {
 	IPI_WAKEUP
 };
 
-#ifdef CONFIG_ARM64_VHE
-
-/* Whether the boot CPU is running in HYP mode or not*/
-static bool boot_cpu_hyp_mode;
-
-static inline void save_boot_cpu_run_el(void)
-{
-	boot_cpu_hyp_mode = is_kernel_in_hyp_mode();
-}
-
-static inline bool is_boot_cpu_in_hyp_mode(void)
-{
-	return boot_cpu_hyp_mode;
-}
-
-/*
- * Verify that a secondary CPU is running the kernel at the same
- * EL as that of the boot CPU.
- */
-void verify_cpu_run_el(void)
-{
-	bool in_el2 = is_kernel_in_hyp_mode();
-	bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode();
-
-	if (in_el2 ^ boot_cpu_el2) {
-		pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n",
-					smp_processor_id(),
-					in_el2 ? 2 : 1,
-					boot_cpu_el2 ? 2 : 1);
-		cpu_panic_kernel();
-	}
-}
-
-#else
-static inline void save_boot_cpu_run_el(void) {}
-#endif
-
 #ifdef CONFIG_HOTPLUG_CPU
 static int op_cpu_kill(unsigned int cpu);
 #else
@@ -447,7 +410,6 @@ void __init smp_prepare_boot_cpu(void)
 	 */
 	jump_label_init();
 	cpuinfo_store_boot_cpu();
-	save_boot_cpu_run_el();
 }
 
 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
-- 
2.14.3

  parent reply	other threads:[~2018-03-13 11:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-13 11:50 [PATCH v4 00/22] arm64: Rework cpu capabilities handling Suzuki K Poulose
2018-03-13 11:50 ` [PATCH v4 01/22] arm64: capabilities: Update prototype for enable call back Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 02/22] arm64: capabilities: Move errata work around check on boot CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 03/22] arm64: capabilities: Move errata processing code Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 04/22] arm64: capabilities: Prepare for fine grained capabilities Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 05/22] arm64: capabilities: Add flags to handle the conflicts on late CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 06/22] arm64: capabilities: Unify the verification Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 07/22] arm64: capabilities: Filter the entries based on a given mask Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 08/22] arm64: capabilities: Prepare for grouping features and errata work arounds Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 09/22] arm64: capabilities: Split the processing of " Suzuki K Poulose
2018-03-22 16:44   ` Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 10/22] arm64: capabilities: Allow features based on local CPU scope Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 11/22] arm64: capabilities: Group handling of features and errata workarounds Suzuki K Poulose
2018-03-21 15:07   ` Dave Martin
2018-03-13 11:51 ` [PATCH v4 12/22] arm64: capabilities: Introduce weak features based on local CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 13/22] arm64: capabilities: Restrict KPTI detection to boot-time CPUs Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 14/22] arm64: capabilities: Add support for features enabled early Suzuki K Poulose
2018-03-13 11:51 ` Suzuki K Poulose [this message]
2018-03-21 15:18   ` [PATCH v4 15/22] arm64: capabilities: Change scope of VHE to Boot CPU feature Dave Martin
2018-03-13 11:51 ` [PATCH v4 16/22] arm64: capabilities: Clean up midr range helpers Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 17/22] arm64: Add helpers for checking CPU MIDR against a range Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 18/22] arm64: capabilities: Add support for checks based on a list of MIDRs Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 19/22] arm64: capabilities: Handle shared entries Suzuki K Poulose
2018-03-22 16:43   ` Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 20/22] arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 21/22] arm64: Delay enabling hardware DBM feature Suzuki K Poulose
2018-03-21 15:22   ` Dave Martin
2018-03-13 11:51 ` [PATCH v4 22/22] arm64: Add work around for Arm Cortex-A55 Erratum 1024718 Suzuki K Poulose
2018-03-21 15:31   ` Dave Martin
2018-03-22 16:42     ` Suzuki K Poulose
2018-03-26 11:53 ` [PATCH v4 00/22] arm64: Rework cpu capabilities handling Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180313115120.17256-16-suzuki.poulose@arm.com \
    --to=suzuki.poulose@arm.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=ckadabi@codeaurora.org \
    --cc=dave.martin@arm.com \
    --cc=jnair@caviumnetworks.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=robin.murphy@arm.com \
    --cc=shankerd@codeaurora.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).