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From: Dave Martin <Dave.Martin@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com,
	ckadabi@codeaurora.org, ard.biesheuvel@linaro.org,
	marc.zyngier@arm.com, catalin.marinas@arm.com,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	jnair@caviumnetworks.com, robin.murphy@arm.com,
	shankerd@codeaurora.org
Subject: Re: [PATCH v4 22/22] arm64: Add work around for Arm Cortex-A55 Erratum 1024718
Date: Wed, 21 Mar 2018 15:31:19 +0000	[thread overview]
Message-ID: <20180321153118.GE16308@e103592.cambridge.arm.com> (raw)
In-Reply-To: <20180313115120.17256-23-suzuki.poulose@arm.com>

On Tue, Mar 13, 2018 at 11:51:20AM +0000, Suzuki K Poulose wrote:
> Some variants of the Arm Cortex-55 cores (r0p0, r0p1, r1p0) suffer
> from an erratum 1024718, which causes incorrect updates when DBM/AP
> bits in a page table entry is modified without a break-before-make
> sequence. The work around is to skip enabling the hardware DBM feature
> on the affected cores. The hardware Access Flag management features
> is not affected. There are some other cores suffering from this
> errata, which could be added to the midr_list to trigger the work
> around.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: ckadabi@codeaurora.org
> Cc: Dave Martin <dave.martin@arm.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>

[...]

> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 4e73c610a409..0fc097e2b72e 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -963,9 +963,23 @@ static inline void __cpu_enable_hw_dbm(void)
>  	isb();
>  }
>  
> +static bool cpu_has_broken_dbm(void)
> +{
> +	/* List of CPUs which have broken DBM support. */
> +	static const struct midr_range cpus[] = {
> +#ifdef CONFIG_ARM64_ERRATUM_1024718
> +		MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0),  // A55 r0p0 -r1p0
> +#endif
> +		{},
> +	};
> +
> +	return is_midr_in_range_list(read_cpuid_id(), cpus);
> +}
> +
>  static bool cpu_can_use_dbm(const struct arm64_cpu_capabilities *cap)
>  {
> -	return has_cpuid_feature(cap, SCOPE_LOCAL_CPU);
> +	return has_cpuid_feature(cap, SCOPE_LOCAL_CPU) &&
> +	       !cpu_has_broken_dbm();

This refactoring seems sensbile to me.  The mapping between erratum IDs
and features that don't work is never guaranteed to be 1:1, so it
makes sense for the check function to have a generic name and to paste
in the relevant erratum ID ranges depending on the kernel config.

[...]

Reviewed-by: Dave Martin <Dave.Martin@arm.com>

Cheers
---Dave

  reply	other threads:[~2018-03-21 15:31 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-13 11:50 [PATCH v4 00/22] arm64: Rework cpu capabilities handling Suzuki K Poulose
2018-03-13 11:50 ` [PATCH v4 01/22] arm64: capabilities: Update prototype for enable call back Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 02/22] arm64: capabilities: Move errata work around check on boot CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 03/22] arm64: capabilities: Move errata processing code Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 04/22] arm64: capabilities: Prepare for fine grained capabilities Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 05/22] arm64: capabilities: Add flags to handle the conflicts on late CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 06/22] arm64: capabilities: Unify the verification Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 07/22] arm64: capabilities: Filter the entries based on a given mask Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 08/22] arm64: capabilities: Prepare for grouping features and errata work arounds Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 09/22] arm64: capabilities: Split the processing of " Suzuki K Poulose
2018-03-22 16:44   ` Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 10/22] arm64: capabilities: Allow features based on local CPU scope Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 11/22] arm64: capabilities: Group handling of features and errata workarounds Suzuki K Poulose
2018-03-21 15:07   ` Dave Martin
2018-03-13 11:51 ` [PATCH v4 12/22] arm64: capabilities: Introduce weak features based on local CPU Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 13/22] arm64: capabilities: Restrict KPTI detection to boot-time CPUs Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 14/22] arm64: capabilities: Add support for features enabled early Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 15/22] arm64: capabilities: Change scope of VHE to Boot CPU feature Suzuki K Poulose
2018-03-21 15:18   ` Dave Martin
2018-03-13 11:51 ` [PATCH v4 16/22] arm64: capabilities: Clean up midr range helpers Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 17/22] arm64: Add helpers for checking CPU MIDR against a range Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 18/22] arm64: capabilities: Add support for checks based on a list of MIDRs Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 19/22] arm64: capabilities: Handle shared entries Suzuki K Poulose
2018-03-22 16:43   ` Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 20/22] arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 Suzuki K Poulose
2018-03-13 11:51 ` [PATCH v4 21/22] arm64: Delay enabling hardware DBM feature Suzuki K Poulose
2018-03-21 15:22   ` Dave Martin
2018-03-13 11:51 ` [PATCH v4 22/22] arm64: Add work around for Arm Cortex-A55 Erratum 1024718 Suzuki K Poulose
2018-03-21 15:31   ` Dave Martin [this message]
2018-03-22 16:42     ` Suzuki K Poulose
2018-03-26 11:53 ` [PATCH v4 00/22] arm64: Rework cpu capabilities handling Will Deacon

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