From: Mark Rutland <mark.rutland@arm.com>
To: Ganapatrao Kulkarni <gklkml16@gmail.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>,
linux-doc@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org,
Will Deacon <Will.Deacon@arm.com>,
jnair@caviumnetworks.com,
Robert Richter <Robert.Richter@cavium.com>,
Vadim.Lomovtsev@cavium.com, Jan.Glauber@cavium.com
Subject: Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver
Date: Mon, 21 May 2018 11:40:08 +0100 [thread overview]
Message-ID: <20180521104008.z6ei5zjve7u5iwho@lakrids.cambridge.arm.com> (raw)
In-Reply-To: <20180521103712.gofbrjdtghfwolmd@lakrids.cambridge.arm.com>
On Mon, May 21, 2018 at 11:37:12AM +0100, Mark Rutland wrote:
> Hi Ganapat,
>
>
> Sorry for the delay in replying; I was away most of last week.
>
> On Tue, May 15, 2018 at 04:03:19PM +0530, Ganapatrao Kulkarni wrote:
> > On Sat, May 5, 2018 at 12:16 AM, Ganapatrao Kulkarni <gklkml16@gmail.com> wrote:
> > > On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> > >> On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote:
>
> > >>> +static int alloc_counter(struct thunderx2_pmu_uncore_channel *pmu_uncore)
> > >>> +{
> > >>> + int counter;
> > >>> +
> > >>> + raw_spin_lock(&pmu_uncore->lock);
> > >>> + counter = find_first_zero_bit(pmu_uncore->counter_mask,
> > >>> + pmu_uncore->uncore_dev->max_counters);
> > >>> + if (counter == pmu_uncore->uncore_dev->max_counters) {
> > >>> + raw_spin_unlock(&pmu_uncore->lock);
> > >>> + return -ENOSPC;
> > >>> + }
> > >>> + set_bit(counter, pmu_uncore->counter_mask);
> > >>> + raw_spin_unlock(&pmu_uncore->lock);
> > >>> + return counter;
> > >>> +}
> > >>> +
> > >>> +static void free_counter(struct thunderx2_pmu_uncore_channel *pmu_uncore,
> > >>> + int counter)
> > >>> +{
> > >>> + raw_spin_lock(&pmu_uncore->lock);
> > >>> + clear_bit(counter, pmu_uncore->counter_mask);
> > >>> + raw_spin_unlock(&pmu_uncore->lock);
> > >>> +}
> > >>
> > >> I don't believe that locking is required in either of these, as the perf
> > >> core serializes pmu::add() and pmu::del(), where these get called.
> >
> > without this locking, i am seeing "BUG: scheduling while atomic" when
> > i run perf with more events together than the maximum counters
> > supported
>
> Did you manage to get to the bottom of this?
>
> Do you have a backtrace?
>
> It looks like in your latest posting you reserve counters through the
> userspace ABI, which doesn't seem right to me, and I'd like to
> understand the problem.
Looks like I misunderstood -- those are still allocated kernel-side.
I'll follow that up in the v5 posting.
Thanks,
Mark.
next prev parent reply other threads:[~2018-05-21 10:40 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-25 9:00 [PATCH v4 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver Ganapatrao Kulkarni
2018-04-25 9:00 ` [PATCH v4 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver Ganapatrao Kulkarni
2018-04-26 20:55 ` Randy Dunlap
2018-04-27 4:49 ` Ganapatrao Kulkarni
2018-04-25 9:00 ` [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver Ganapatrao Kulkarni
2018-04-26 10:59 ` Mark Rutland
2018-05-04 18:46 ` Ganapatrao Kulkarni
2018-05-15 10:33 ` Ganapatrao Kulkarni
2018-05-21 10:37 ` Mark Rutland
2018-05-21 10:40 ` Mark Rutland [this message]
2018-05-21 12:42 ` Ganapatrao Kulkarni
2018-05-21 10:55 ` Mark Rutland
2018-05-21 12:34 ` Ganapatrao Kulkarni
2018-04-26 22:06 ` Kim Phillips
2018-04-27 9:30 ` Mark Rutland
2018-04-27 13:15 ` Kim Phillips
2018-04-27 14:37 ` Will Deacon
2018-04-27 15:46 ` Kim Phillips
2018-04-27 16:09 ` Will Deacon
2018-04-27 16:56 ` Kim Phillips
2018-05-01 11:54 ` Will Deacon
2018-05-04 0:30 ` Kim Phillips
2018-05-04 17:10 ` Robin Murphy
2018-05-10 1:09 ` Kim Phillips
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