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* [PATCH 0/4] perf intel-pt: Fixes
@ 2018-05-31 10:23 Adrian Hunter
  2018-05-31 10:23 ` [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING Adrian Hunter
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Adrian Hunter @ 2018-05-31 10:23 UTC (permalink / raw)
  To: Arnaldo Carvalho de Melo; +Cc: linux-kernel

Hi

Here are some small non-urgent fixes for Intel PT.


Adrian Hunter (4):
      perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING
      perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP
      perf intel-pt: Fix MTC timing after overflow
      perf intel-pt: Fix "Unexpected indirect branch" error

 .../perf/util/intel-pt-decoder/intel-pt-decoder.c  | 23 ++++++++++++++++++----
 .../perf/util/intel-pt-decoder/intel-pt-decoder.h  |  9 +++++++++
 tools/perf/util/intel-pt.c                         |  5 +++++
 3 files changed, 33 insertions(+), 4 deletions(-)


Regards
Adrian

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING
  2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
@ 2018-05-31 10:23 ` Adrian Hunter
  2018-06-07  8:22   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
  2018-05-31 10:23 ` [PATCH 2/4] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP Adrian Hunter
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 10+ messages in thread
From: Adrian Hunter @ 2018-05-31 10:23 UTC (permalink / raw)
  To: Arnaldo Carvalho de Melo; +Cc: linux-kernel

sync_switch is a facility to synchronize decoding more closely with the
point in the kernel when the context actually switched.

In one case, INTEL_PT_SS_NOT_TRACING state was not correctly transitioning
to INTEL_PT_SS_TRACING state due to a missing case clause. Add it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
---
 tools/perf/util/intel-pt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 492986a25ef6..3db7f0ee52a8 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -1521,6 +1521,7 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
 
 	if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
 		switch (ptq->switch_state) {
+		case INTEL_PT_SS_NOT_TRACING:
 		case INTEL_PT_SS_UNKNOWN:
 		case INTEL_PT_SS_EXPECTING_SWITCH_IP:
 			err = intel_pt_next_tid(pt, ptq);
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 2/4] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP
  2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
  2018-05-31 10:23 ` [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING Adrian Hunter
@ 2018-05-31 10:23 ` Adrian Hunter
  2018-06-07  8:22   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
  2018-05-31 10:23 ` [PATCH 3/4] perf intel-pt: Fix MTC timing after overflow Adrian Hunter
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 10+ messages in thread
From: Adrian Hunter @ 2018-05-31 10:23 UTC (permalink / raw)
  To: Arnaldo Carvalho de Melo; +Cc: linux-kernel

It is possible to have a CBR packet between a FUP packet and corresponding
TIP packet. Stop treating it as an error.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index f9157aed1289..e5eb91777383 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1604,7 +1604,6 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 		case INTEL_PT_PSB:
 		case INTEL_PT_TSC:
 		case INTEL_PT_TMA:
-		case INTEL_PT_CBR:
 		case INTEL_PT_MODE_TSX:
 		case INTEL_PT_BAD:
 		case INTEL_PT_PSBEND:
@@ -1620,6 +1619,10 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 			decoder->pkt_step = 0;
 			return -ENOENT;
 
+		case INTEL_PT_CBR:
+			intel_pt_calc_cbr(decoder);
+			break;
+
 		case INTEL_PT_OVF:
 			return intel_pt_overflow(decoder);
 
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 3/4] perf intel-pt: Fix MTC timing after overflow
  2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
  2018-05-31 10:23 ` [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING Adrian Hunter
  2018-05-31 10:23 ` [PATCH 2/4] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP Adrian Hunter
@ 2018-05-31 10:23 ` Adrian Hunter
  2018-06-07  8:23   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
  2018-05-31 10:23 ` [PATCH 4/4] perf intel-pt: Fix "Unexpected indirect branch" error Adrian Hunter
  2018-06-05 15:32 ` [PATCH 0/4] perf intel-pt: Fixes Arnaldo Carvalho de Melo
  4 siblings, 1 reply; 10+ messages in thread
From: Adrian Hunter @ 2018-05-31 10:23 UTC (permalink / raw)
  To: Arnaldo Carvalho de Melo; +Cc: linux-kernel

On some platforms, overflows will clear before MTC wraparound, and there is
no following TSC/TMA packet. In that case the previous TMA is valid. Since
there will be a valid TMA either way, stop setting 'have_tma' to false upon
overflow.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index e5eb91777383..881d7c5e5e2a 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1376,7 +1376,6 @@ static int intel_pt_overflow(struct intel_pt_decoder *decoder)
 {
 	intel_pt_log("ERROR: Buffer overflow\n");
 	intel_pt_clear_tx_flags(decoder);
-	decoder->have_tma = false;
 	decoder->cbr = 0;
 	decoder->timestamp_insn_cnt = 0;
 	decoder->pkt_state = INTEL_PT_STATE_ERR_RESYNC;
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH 4/4] perf intel-pt: Fix "Unexpected indirect branch" error
  2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
                   ` (2 preceding siblings ...)
  2018-05-31 10:23 ` [PATCH 3/4] perf intel-pt: Fix MTC timing after overflow Adrian Hunter
@ 2018-05-31 10:23 ` Adrian Hunter
  2018-06-07  8:23   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
  2018-06-05 15:32 ` [PATCH 0/4] perf intel-pt: Fixes Arnaldo Carvalho de Melo
  4 siblings, 1 reply; 10+ messages in thread
From: Adrian Hunter @ 2018-05-31 10:23 UTC (permalink / raw)
  To: Arnaldo Carvalho de Melo; +Cc: linux-kernel

Some Atom CPUs can produce FUP packets that contain NLIP (next linear
instruction pointer) instead of CLIP (current linear instruction pointer).
That will result in "Unexpected indirect branch" errors. Fix by comparing
IP to NLIP in that case.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 17 +++++++++++++++--
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.h |  9 +++++++++
 tools/perf/util/intel-pt.c                          |  4 ++++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index 881d7c5e5e2a..d404bed7003a 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -113,6 +113,7 @@ struct intel_pt_decoder {
 	bool have_cyc;
 	bool fixup_last_mtc;
 	bool have_last_ip;
+	enum intel_pt_param_flags flags;
 	uint64_t pos;
 	uint64_t last_ip;
 	uint64_t ip;
@@ -226,6 +227,8 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params)
 	decoder->return_compression = params->return_compression;
 	decoder->branch_enable      = params->branch_enable;
 
+	decoder->flags              = params->flags;
+
 	decoder->period             = params->period;
 	decoder->period_type        = params->period_type;
 
@@ -1097,6 +1100,15 @@ static bool intel_pt_fup_event(struct intel_pt_decoder *decoder)
 	return ret;
 }
 
+static inline bool intel_pt_fup_with_nlip(struct intel_pt_decoder *decoder,
+					  struct intel_pt_insn *intel_pt_insn,
+					  uint64_t ip, int err)
+{
+	return decoder->flags & INTEL_PT_FUP_WITH_NLIP && !err &&
+	       intel_pt_insn->branch == INTEL_PT_BR_INDIRECT &&
+	       ip == decoder->ip + intel_pt_insn->length;
+}
+
 static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 {
 	struct intel_pt_insn intel_pt_insn;
@@ -1109,10 +1121,11 @@ static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 		err = intel_pt_walk_insn(decoder, &intel_pt_insn, ip);
 		if (err == INTEL_PT_RETURN)
 			return 0;
-		if (err == -EAGAIN) {
+		if (err == -EAGAIN ||
+		    intel_pt_fup_with_nlip(decoder, &intel_pt_insn, ip, err)) {
 			if (intel_pt_fup_event(decoder))
 				return 0;
-			return err;
+			return -EAGAIN;
 		}
 		decoder->set_fup_tx_flags = false;
 		if (err)
diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
index fc1752d50019..51c18d67f4ca 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
@@ -60,6 +60,14 @@ enum {
 	INTEL_PT_ERR_MAX,
 };
 
+enum intel_pt_param_flags {
+	/*
+	 * FUP packet can contain next linear instruction pointer instead of
+	 * current linear instruction pointer.
+	 */
+	INTEL_PT_FUP_WITH_NLIP	= 1 << 0,
+};
+
 struct intel_pt_state {
 	enum intel_pt_sample_type type;
 	int err;
@@ -106,6 +114,7 @@ struct intel_pt_params {
 	unsigned int mtc_period;
 	uint32_t tsc_ctc_ratio_n;
 	uint32_t tsc_ctc_ratio_d;
+	enum intel_pt_param_flags flags;
 };
 
 struct intel_pt_decoder;
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 3db7f0ee52a8..aec68908d604 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -749,6 +749,7 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 						   unsigned int queue_nr)
 {
 	struct intel_pt_params params = { .get_trace = 0, };
+	struct perf_env *env = pt->machine->env;
 	struct intel_pt_queue *ptq;
 
 	ptq = zalloc(sizeof(struct intel_pt_queue));
@@ -830,6 +831,9 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 		}
 	}
 
+	if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
+		params.flags |= INTEL_PT_FUP_WITH_NLIP;
+
 	ptq->decoder = intel_pt_decoder_new(&params);
 	if (!ptq->decoder)
 		goto out_free;
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH 0/4] perf intel-pt: Fixes
  2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
                   ` (3 preceding siblings ...)
  2018-05-31 10:23 ` [PATCH 4/4] perf intel-pt: Fix "Unexpected indirect branch" error Adrian Hunter
@ 2018-06-05 15:32 ` Arnaldo Carvalho de Melo
  4 siblings, 0 replies; 10+ messages in thread
From: Arnaldo Carvalho de Melo @ 2018-06-05 15:32 UTC (permalink / raw)
  To: Adrian Hunter; +Cc: linux-kernel

Em Thu, May 31, 2018 at 01:23:41PM +0300, Adrian Hunter escreveu:
> Hi
> 
> Here are some small non-urgent fixes for Intel PT.

Thanks, applied the kit,

- Arnaldo
 
> 
> Adrian Hunter (4):
>       perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING
>       perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP
>       perf intel-pt: Fix MTC timing after overflow
>       perf intel-pt: Fix "Unexpected indirect branch" error
> 
>  .../perf/util/intel-pt-decoder/intel-pt-decoder.c  | 23 ++++++++++++++++++----
>  .../perf/util/intel-pt-decoder/intel-pt-decoder.h  |  9 +++++++++
>  tools/perf/util/intel-pt.c                         |  5 +++++
>  3 files changed, 33 insertions(+), 4 deletions(-)
> 
> 
> Regards
> Adrian

^ permalink raw reply	[flat|nested] 10+ messages in thread

* [tip:perf/urgent] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING
  2018-05-31 10:23 ` [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING Adrian Hunter
@ 2018-06-07  8:22   ` tip-bot for Adrian Hunter
  0 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Adrian Hunter @ 2018-06-07  8:22 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: mingo, acme, adrian.hunter, hpa, linux-kernel, tglx

Commit-ID:  dbcb82b93f3e8322891e47472c89e63058b81e99
Gitweb:     https://git.kernel.org/tip/dbcb82b93f3e8322891e47472c89e63058b81e99
Author:     Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 31 May 2018 13:23:42 +0300
Committer:  Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Wed, 6 Jun 2018 12:52:07 -0300

perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING

sync_switch is a facility to synchronize decoding more closely with the
point in the kernel when the context actually switched.

In one case, INTEL_PT_SS_NOT_TRACING state was not correctly
transitioning to INTEL_PT_SS_TRACING state due to a missing case clause.
Add it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-2-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
 tools/perf/util/intel-pt.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 492986a25ef6..3db7f0ee52a8 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -1521,6 +1521,7 @@ static int intel_pt_sample(struct intel_pt_queue *ptq)
 
 	if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
 		switch (ptq->switch_state) {
+		case INTEL_PT_SS_NOT_TRACING:
 		case INTEL_PT_SS_UNKNOWN:
 		case INTEL_PT_SS_EXPECTING_SWITCH_IP:
 			err = intel_pt_next_tid(pt, ptq);

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [tip:perf/urgent] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP
  2018-05-31 10:23 ` [PATCH 2/4] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP Adrian Hunter
@ 2018-06-07  8:22   ` tip-bot for Adrian Hunter
  0 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Adrian Hunter @ 2018-06-07  8:22 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: linux-kernel, tglx, adrian.hunter, hpa, mingo, acme

Commit-ID:  bd2e49ec48feb1855f7624198849eea4610e2286
Gitweb:     https://git.kernel.org/tip/bd2e49ec48feb1855f7624198849eea4610e2286
Author:     Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 31 May 2018 13:23:43 +0300
Committer:  Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Wed, 6 Jun 2018 12:52:07 -0300

perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP

It is possible to have a CBR packet between a FUP packet and
corresponding TIP packet. Stop treating it as an error.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-3-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index f9157aed1289..e5eb91777383 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1604,7 +1604,6 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 		case INTEL_PT_PSB:
 		case INTEL_PT_TSC:
 		case INTEL_PT_TMA:
-		case INTEL_PT_CBR:
 		case INTEL_PT_MODE_TSX:
 		case INTEL_PT_BAD:
 		case INTEL_PT_PSBEND:
@@ -1620,6 +1619,10 @@ static int intel_pt_walk_fup_tip(struct intel_pt_decoder *decoder)
 			decoder->pkt_step = 0;
 			return -ENOENT;
 
+		case INTEL_PT_CBR:
+			intel_pt_calc_cbr(decoder);
+			break;
+
 		case INTEL_PT_OVF:
 			return intel_pt_overflow(decoder);
 

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [tip:perf/urgent] perf intel-pt: Fix MTC timing after overflow
  2018-05-31 10:23 ` [PATCH 3/4] perf intel-pt: Fix MTC timing after overflow Adrian Hunter
@ 2018-06-07  8:23   ` tip-bot for Adrian Hunter
  0 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Adrian Hunter @ 2018-06-07  8:23 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: hpa, linux-kernel, adrian.hunter, tglx, acme, mingo

Commit-ID:  dd27b87ab5fcf3ea1c060b5e3ab5d31cc78e9f4c
Gitweb:     https://git.kernel.org/tip/dd27b87ab5fcf3ea1c060b5e3ab5d31cc78e9f4c
Author:     Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 31 May 2018 13:23:44 +0300
Committer:  Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Wed, 6 Jun 2018 12:52:08 -0300

perf intel-pt: Fix MTC timing after overflow

On some platforms, overflows will clear before MTC wraparound, and there
is no following TSC/TMA packet. In that case the previous TMA is valid.
Since there will be a valid TMA either way, stop setting 'have_tma' to
false upon overflow.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-4-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index e5eb91777383..881d7c5e5e2a 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -1376,7 +1376,6 @@ static int intel_pt_overflow(struct intel_pt_decoder *decoder)
 {
 	intel_pt_log("ERROR: Buffer overflow\n");
 	intel_pt_clear_tx_flags(decoder);
-	decoder->have_tma = false;
 	decoder->cbr = 0;
 	decoder->timestamp_insn_cnt = 0;
 	decoder->pkt_state = INTEL_PT_STATE_ERR_RESYNC;

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [tip:perf/urgent] perf intel-pt: Fix "Unexpected indirect branch" error
  2018-05-31 10:23 ` [PATCH 4/4] perf intel-pt: Fix "Unexpected indirect branch" error Adrian Hunter
@ 2018-06-07  8:23   ` tip-bot for Adrian Hunter
  0 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Adrian Hunter @ 2018-06-07  8:23 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: linux-kernel, mingo, acme, tglx, hpa, adrian.hunter

Commit-ID:  9fb523363f6e3984457fee95bb7019395384ffa7
Gitweb:     https://git.kernel.org/tip/9fb523363f6e3984457fee95bb7019395384ffa7
Author:     Adrian Hunter <adrian.hunter@intel.com>
AuthorDate: Thu, 31 May 2018 13:23:45 +0300
Committer:  Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Wed, 6 Jun 2018 12:52:08 -0300

perf intel-pt: Fix "Unexpected indirect branch" error

Some Atom CPUs can produce FUP packets that contain NLIP (next linear
instruction pointer) instead of CLIP (current linear instruction
pointer).  That will result in "Unexpected indirect branch" errors. Fix
by comparing IP to NLIP in that case.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/1527762225-26024-5-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 17 +++++++++++++++--
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.h |  9 +++++++++
 tools/perf/util/intel-pt.c                          |  4 ++++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index 881d7c5e5e2a..d404bed7003a 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -113,6 +113,7 @@ struct intel_pt_decoder {
 	bool have_cyc;
 	bool fixup_last_mtc;
 	bool have_last_ip;
+	enum intel_pt_param_flags flags;
 	uint64_t pos;
 	uint64_t last_ip;
 	uint64_t ip;
@@ -226,6 +227,8 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params)
 	decoder->return_compression = params->return_compression;
 	decoder->branch_enable      = params->branch_enable;
 
+	decoder->flags              = params->flags;
+
 	decoder->period             = params->period;
 	decoder->period_type        = params->period_type;
 
@@ -1097,6 +1100,15 @@ static bool intel_pt_fup_event(struct intel_pt_decoder *decoder)
 	return ret;
 }
 
+static inline bool intel_pt_fup_with_nlip(struct intel_pt_decoder *decoder,
+					  struct intel_pt_insn *intel_pt_insn,
+					  uint64_t ip, int err)
+{
+	return decoder->flags & INTEL_PT_FUP_WITH_NLIP && !err &&
+	       intel_pt_insn->branch == INTEL_PT_BR_INDIRECT &&
+	       ip == decoder->ip + intel_pt_insn->length;
+}
+
 static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 {
 	struct intel_pt_insn intel_pt_insn;
@@ -1109,10 +1121,11 @@ static int intel_pt_walk_fup(struct intel_pt_decoder *decoder)
 		err = intel_pt_walk_insn(decoder, &intel_pt_insn, ip);
 		if (err == INTEL_PT_RETURN)
 			return 0;
-		if (err == -EAGAIN) {
+		if (err == -EAGAIN ||
+		    intel_pt_fup_with_nlip(decoder, &intel_pt_insn, ip, err)) {
 			if (intel_pt_fup_event(decoder))
 				return 0;
-			return err;
+			return -EAGAIN;
 		}
 		decoder->set_fup_tx_flags = false;
 		if (err)
diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
index fc1752d50019..51c18d67f4ca 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.h
@@ -60,6 +60,14 @@ enum {
 	INTEL_PT_ERR_MAX,
 };
 
+enum intel_pt_param_flags {
+	/*
+	 * FUP packet can contain next linear instruction pointer instead of
+	 * current linear instruction pointer.
+	 */
+	INTEL_PT_FUP_WITH_NLIP	= 1 << 0,
+};
+
 struct intel_pt_state {
 	enum intel_pt_sample_type type;
 	int err;
@@ -106,6 +114,7 @@ struct intel_pt_params {
 	unsigned int mtc_period;
 	uint32_t tsc_ctc_ratio_n;
 	uint32_t tsc_ctc_ratio_d;
+	enum intel_pt_param_flags flags;
 };
 
 struct intel_pt_decoder;
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
index 3db7f0ee52a8..aec68908d604 100644
--- a/tools/perf/util/intel-pt.c
+++ b/tools/perf/util/intel-pt.c
@@ -749,6 +749,7 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 						   unsigned int queue_nr)
 {
 	struct intel_pt_params params = { .get_trace = 0, };
+	struct perf_env *env = pt->machine->env;
 	struct intel_pt_queue *ptq;
 
 	ptq = zalloc(sizeof(struct intel_pt_queue));
@@ -830,6 +831,9 @@ static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
 		}
 	}
 
+	if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
+		params.flags |= INTEL_PT_FUP_WITH_NLIP;
+
 	ptq->decoder = intel_pt_decoder_new(&params);
 	if (!ptq->decoder)
 		goto out_free;

^ permalink raw reply related	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2018-06-07  8:23 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-31 10:23 [PATCH 0/4] perf intel-pt: Fixes Adrian Hunter
2018-05-31 10:23 ` [PATCH 1/4] perf intel-pt: Fix sync_switch INTEL_PT_SS_NOT_TRACING Adrian Hunter
2018-06-07  8:22   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
2018-05-31 10:23 ` [PATCH 2/4] perf intel-pt: Fix decoding to accept CBR between FUP and corresponding TIP Adrian Hunter
2018-06-07  8:22   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
2018-05-31 10:23 ` [PATCH 3/4] perf intel-pt: Fix MTC timing after overflow Adrian Hunter
2018-06-07  8:23   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
2018-05-31 10:23 ` [PATCH 4/4] perf intel-pt: Fix "Unexpected indirect branch" error Adrian Hunter
2018-06-07  8:23   ` [tip:perf/urgent] " tip-bot for Adrian Hunter
2018-06-05 15:32 ` [PATCH 0/4] perf intel-pt: Fixes Arnaldo Carvalho de Melo

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