From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Borislav Petkov <bp@alien8.de>
Cc: KVM <kvm@vger.kernel.org>, Joerg Roedel <joro@8bytes.org>,
Tom Lendacky <thomas.lendacky@amd.com>,
Tony Luck <tony.luck@intel.com>,
Yazen Ghannam <Yazen.Ghannam@amd.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] x86/kvm: Implement MSR_HWCR support
Date: Fri, 22 Jun 2018 20:52:38 +0200 [thread overview]
Message-ID: <20180622185237.GC5549@flask> (raw)
In-Reply-To: <20180622095101.32587-3-bp@alien8.de>
2018-06-22 11:51+0200, Borislav Petkov:
> From: Borislav Petkov <bp@suse.de>
>
> The hardware configuration register has some useful bits which can be
> used by guests. Implement McStatusWrEn which can be used by guests when
> injecting MCEs with the in-kernel mce-inject module.
>
> For that, we need to set bit 18 - McStatusWrEn - first, before writing
> the MCi_STATUS registers (otherwise we #GP).
>
> Add the required machinery to do so.
>
> Signed-off-by: Borislav Petkov <bp@suse.de>
> ---
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> @@ -2146,6 +2146,30 @@ static void kvmclock_sync_fn(struct work_struct *work)
> KVMCLOCK_SYNC_PERIOD);
> }
>
> +/*
> + * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
> + */
> +static bool __set_mci_status(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> +{
> + if (guest_cpuid_is_amd(vcpu)) {
> + struct msr_data tmp;
> +
> + tmp.index = MSR_K7_HWCR;
> +
> + if (kvm_x86_ops->get_msr(vcpu, &tmp))
> + return false;
> +
> + /* McStatusWrEn enabled? */
> + if (tmp.data & BIT_ULL(18))
> + return true;
> + }
> +
> + if (!msr_info->host_initiated && msr_info->data != 0)
> + return false;
msr_info->host_initiated is always going to return true, so it would be
better to put it outside of __set_mci_status.
Maybe we could just write the whole logic inline, otherwise I'd call it
something like mci_status_is_writeable.
> static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> {
> u64 mcg_cap = vcpu->arch.mcg_cap;
> @@ -2176,9 +2200,13 @@ static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> if ((offset & 0x3) == 0 &&
> data != 0 && (data | (1 << 10)) != ~(u64)0)
> return -1;
> - if (!msr_info->host_initiated &&
> - (offset & 0x3) == 1 && data != 0)
> - return -1;
> +
> + /* MCi_STATUS */
> + if ((offset & 0x3) == 1) {
> + if (!__set_mci_status(vcpu, msr_info))
> + return -1;
> + }
if (!msr_info->host_initiated &&
(offset & 0x3) == 1 && data != 0) {
struct msr_data tmp = {.index = MSR_K7_HWCR};
if (!guest_cpuid_is_amd(vcpu) ||
!kvm_x86_ops->get_msr(vcpu, &tmp) ||
!(tmp.data & BIT_ULL(18)))
return -1;
}
> +
> vcpu->arch.mce_banks[offset] = data;
> break;
> }
> --
> 2.17.0.582.gccdcbd54c
>
next prev parent reply other threads:[~2018-06-22 18:52 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 9:50 [PATCH 0/3] x86/kvm: Enable MCE injection in the guest Borislav Petkov
2018-06-22 9:50 ` [PATCH 1/3] kvm/x86: Move MSR_K7_HWCR to svm.c Borislav Petkov
2018-06-22 9:51 ` [PATCH 2/3] x86/kvm: Implement MSR_HWCR support Borislav Petkov
2018-06-22 18:52 ` Radim Krčmář [this message]
2018-06-22 19:09 ` Borislav Petkov
2018-06-22 19:22 ` Radim Krčmář
2018-06-22 9:51 ` [PATCH 3/3] x86/kvm: Handle all MCA banks Borislav Petkov
2018-06-22 18:16 ` Radim Krčmář
2018-06-22 18:24 ` Borislav Petkov
2018-06-22 18:47 ` Radim Krčmář
2018-06-22 19:02 ` Borislav Petkov
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