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From: Vinod <vkoul@kernel.org>
To: Andrea Merello <andrea.merello@gmail.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
	appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Subject: Re: [PATCH v3 1/5] dmaengine: xilinx_dma: in axidma slave_sg and dma_cylic mode align split descriptors
Date: Fri, 29 Jun 2018 13:49:39 +0530	[thread overview]
Message-ID: <20180629081939.GA22377@vkoul-mobl> (raw)
In-Reply-To: <CAN8YU5Owh2Sb+-mOR0nVFkdZpD=dRd2jCin5MCdnsNLPo5zwwg@mail.gmail.com>

On 29-06-18, 09:46, Andrea Merello wrote:
> On Fri, Jun 29, 2018 at 9:25 AM, Vinod <vkoul@kernel.org> wrote:

> >> +
> >> +                     if ((copy + sg_used < period_len) &&
> >> +                         chan->xdev->common.copy_align) {
> >> +                             /*
> >> +                              * If this is not the last descriptor, make sure
> >> +                              * the next one will be properly aligned
> >> +                              */
> >> +                             copy = rounddown(copy,
> >> +                                     (1 << chan->xdev->common.copy_align));
> >> +                     }
> >
> > same code pasted twice, can we have a routine for this... perhaps more
> > code can be made common too
> 
> Yes, I see.. Indeed there was duplicated code before this series and
> it is still there after it.
> 
> I can see if we can have a routine as you suggested at least for the
> code portions touched by this patch. Do you eventually want this extra
> change to be done in the same patch 1/5 or do you want a separate
> patch i.e. 2/6 or 6/6 ?

Each patch should do one thing, so would make sense to move first and
then add you on top of that. 1/6 commonize and 2/6 add this bit.


-- 
~Vinod

      reply	other threads:[~2018-06-29  8:20 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-25  9:27 [PATCH v3 1/5] dmaengine: xilinx_dma: in axidma slave_sg and dma_cylic mode align split descriptors Andrea Merello
2018-06-25  9:27 ` [PATCH v3 2/5] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Andrea Merello
2018-06-25 17:29   ` Rob Herring
2018-06-25  9:27 ` [PATCH v3 3/5] dmaengine: xilinx_dma: program hardware supported buffer length Andrea Merello
2018-06-25  9:27 ` [PATCH v3 4/5] dmaengine: xilinx_dma: autodetect whether the HW supports scatter-gather Andrea Merello
2018-06-29  7:37   ` Vinod
2018-06-29  7:53     ` Andrea Merello
2018-06-25  9:27 ` [PATCH v3 5/5] dt-bindings: dmaengine: xilinx_dma: drop has-sg property Andrea Merello
2018-06-25 17:30   ` Rob Herring
2018-06-29  7:25 ` [PATCH v3 1/5] dmaengine: xilinx_dma: in axidma slave_sg and dma_cylic mode align split descriptors Vinod
2018-06-29  7:46   ` Andrea Merello
2018-06-29  8:19     ` Vinod [this message]

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