From: Guo Ren <ren_guo@c-sky.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
tglx@linutronix.de, daniel.lezcano@linaro.org,
jason@lakedaemon.net, arnd@arndb.de,
c-sky_gcc_upstream@c-sky.com, gnu-csky@mentor.com,
thomas.petazzoni@bootlin.com, wbx@uclibc-ng.org,
green.hu@gmail.com, Will Deacon <will.deacon@arm.com>
Subject: Re: [PATCH V2 11/19] csky: Atomic operations
Date: Fri, 6 Jul 2018 19:01:31 +0800 [thread overview]
Message-ID: <20180706110129.GC8707@guoren> (raw)
In-Reply-To: <20180705175059.GE2530@hirez.programming.kicks-ass.net>
On Thu, Jul 05, 2018 at 07:50:59PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 02, 2018 at 01:30:14AM +0800, Guo Ren wrote:
>
> > +#include <asm/barrier.h>
> > +
> > +#define __xchg(new, ptr, size) \
> > +({ \
> > + __typeof__(ptr) __ptr = (ptr); \
> > + __typeof__(new) __new = (new); \
> > + __typeof__(*(ptr)) __ret; \
> > + unsigned long tmp; \
> > + switch (size) { \
> > + case 4: \
> > + asm volatile ( \
> > + "1: ldex.w %0, (%3) \n" \
> > + " mov %1, %2 \n" \
> > + " stex.w %1, (%3) \n" \
> > + " bez %1, 1b \n" \
> > + : "=&r" (__ret), "=&r" (tmp) \
> > + : "r" (__new), "r"(__ptr) \
> > + : "memory"); \
> > + smp_mb(); \
> > + break; \
> > + default: \
> > + BUILD_BUG(); \
> > + } \
> > + __ret; \
> > +})
> > +
> > +#define xchg(ptr, x) (__xchg((x), (ptr), sizeof(*(ptr))))
> > +
> > +#define __cmpxchg(ptr, old, new, size) \
> > +({ \
> > + __typeof__(ptr) __ptr = (ptr); \
> > + __typeof__(new) __new = (new); \
> > + __typeof__(new) __tmp; \
> > + __typeof__(old) __old = (old); \
> > + __typeof__(*(ptr)) __ret; \
> > + switch (size) { \
> > + case 4: \
> > + asm volatile ( \
> > + "1: ldex.w %0, (%3) \n" \
> > + " cmpne %0, %4 \n" \
> > + " bt 2f \n" \
> > + " mov %1, %2 \n" \
> > + " stex.w %1, (%3) \n" \
> > + " bez %1, 1b \n" \
> > + "2: \n" \
> > + : "=&r" (__ret), "=&r" (__tmp) \
> > + : "r" (__new), "r"(__ptr), "r"(__old) \
> > + : "memory"); \
> > + smp_mb(); \
> > + break; \
> > + default: \
> > + BUILD_BUG(); \
> > + } \
> > + __ret; \
> > +})
> > +
> > +#define cmpxchg(ptr, o, n) \
> > + (__cmpxchg((ptr), (o), (n), sizeof(*(ptr))))
>
> What's the memory ordering rules for your LDEX/STEX ?
Every CPU has a local exclusive monitor.
"Ldex rz, (rx, #off)" will add an entry into the local monitor, and the
entry is composed of a address tag and a exclusive flag (inited with 1).
Any stores (include other cores') will break the exclusive flag to 0 in
the entry which could be indexed by the address tag.
"Stex rz, (rx, #off)" has two condition:
1. Store Success: When the entry's exclusive flag is 1, it will store rz
to the [rx + off] address and the rz will be set to 1.
2. Store Failure: When the entry's exclusive flag is 0, just rz will be
set to 0.
> The mandated semantics for xchg() / cmpxchg() is an effective smp_mb()
> before _and_ after.
switch (size) { \
case 4: \
smp_mb(); \
asm volatile ( \
"1: ldex.w %0, (%3) \n" \
" mov %1, %2 \n" \
" stex.w %1, (%3) \n" \
" bez %1, 1b \n" \
: "=&r" (__ret), "=&r" (tmp) \
: "r" (__new), "r"(__ptr) \
: "memory"); \
smp_mb(); \
break; \
Hmm?
But I couldn't undertand what's wrong without the 1th smp_mb()?
1th smp_mb will make all ld/st finish before ldex.w. Is it necessary?
> The above implementation suggests LDEX implies a SYNC.IS, is this
> correct?
No, ldex doesn't imply a sync.is.
Guo Ren
next prev parent reply other threads:[~2018-07-06 11:01 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-01 17:30 [PATCH V2 00/19] C-SKY(csky) Linux Kernel Port Guo Ren
2018-07-01 17:30 ` [PATCH V2 01/19] csky: Build infrastructure Guo Ren
2018-07-01 21:01 ` Randy Dunlap
2018-07-02 1:13 ` Guo Ren
2018-07-03 3:33 ` Rob Herring
2018-07-03 9:14 ` Guo Ren
2018-07-03 16:03 ` Arnd Bergmann
2018-07-04 11:40 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 02/19] csky: defconfig Guo Ren
2018-07-03 3:16 ` Rob Herring
2018-07-03 8:31 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 03/19] csky: Kernel booting Guo Ren
2018-07-01 17:30 ` [PATCH V2 04/19] csky: Exception handling Guo Ren
2018-07-01 17:30 ` [PATCH V2 05/19] csky: System Call Guo Ren
2018-07-03 19:53 ` Arnd Bergmann
2018-07-04 11:49 ` Guo Ren
2018-07-04 21:04 ` Arnd Bergmann
2018-07-05 5:38 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 06/19] csky: Cache and TLB routines Guo Ren
2018-07-05 17:40 ` Peter Zijlstra
2018-07-07 11:51 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 07/19] csky: MMU and page table management Guo Ren
2018-07-02 13:29 ` Christoph Hellwig
2018-07-03 2:53 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 08/19] csky: Process management and Signal Guo Ren
2018-07-01 17:30 ` [PATCH V2 09/19] csky: VDSO and rt_sigreturn Guo Ren
2018-07-01 17:30 ` [PATCH V2 10/19] csky: IRQ handling Guo Ren
2018-07-01 17:30 ` [PATCH V2 11/19] csky: Atomic operations Guo Ren
2018-07-05 17:50 ` Peter Zijlstra
2018-07-06 11:01 ` Guo Ren [this message]
2018-07-06 11:56 ` Peter Zijlstra
2018-07-06 12:17 ` Peter Zijlstra
2018-07-07 8:08 ` Guo Ren
2018-07-07 20:10 ` Andrea Parri
2018-07-08 1:05 ` Guo Ren
2018-07-07 7:42 ` Guo Ren
2018-07-07 19:54 ` Andrea Parri
2018-07-08 0:39 ` Guo Ren
2018-07-05 17:59 ` Peter Zijlstra
2018-07-06 11:44 ` Guo Ren
2018-07-06 12:03 ` Peter Zijlstra
2018-07-06 13:01 ` Peter Zijlstra
2018-07-06 14:06 ` Guo Ren
2018-07-05 18:00 ` Peter Zijlstra
2018-07-06 11:48 ` Guo Ren
2018-07-06 12:05 ` Peter Zijlstra
2018-07-06 13:46 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 12/19] csky: ELF and module probe Guo Ren
2018-07-01 17:30 ` [PATCH V2 13/19] csky: Library functions Guo Ren
2018-07-03 20:04 ` Arnd Bergmann
2018-07-04 10:51 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 14/19] csky: User access Guo Ren
2018-07-01 17:30 ` [PATCH V2 15/19] csky: Debug and Ptrace GDB Guo Ren
2018-07-01 17:30 ` [PATCH V2 16/19] csky: SMP support Guo Ren
2018-07-05 18:05 ` Peter Zijlstra
2018-07-06 6:07 ` Guo Ren
2018-07-06 9:39 ` Peter Zijlstra
2018-07-06 13:22 ` Guo Ren
2018-07-06 5:24 ` Mark Rutland
2018-07-06 11:32 ` Guo Ren
2018-07-06 11:43 ` Mark Rutland
2018-07-06 12:26 ` Guo Ren
2018-07-06 16:21 ` Mark Rutland
2018-07-07 6:16 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 17/19] csky: Misc headers Guo Ren
2018-07-01 17:30 ` [PATCH V2 18/19] clocksource: add C-SKY clocksource drivers Guo Ren
2018-07-01 17:34 ` Guo Ren
2018-07-03 9:39 ` Thomas Gleixner
2018-07-04 10:49 ` Guo Ren
2018-07-04 14:35 ` Thomas Gleixner
2018-07-05 5:03 ` Guo Ren
2018-07-04 17:05 ` Daniel Lezcano
2018-07-05 3:30 ` Guo Ren
2018-07-05 9:23 ` Daniel Lezcano
2018-07-06 5:57 ` Guo Ren
2018-07-01 17:30 ` [PATCH V2 19/19] irqchip: add C-SKY irqchip drivers Guo Ren
2018-07-03 3:27 ` Rob Herring
2018-07-03 7:38 ` Guo Ren
2018-07-03 9:28 ` Thomas Gleixner
2018-07-04 5:08 ` Guo Ren
2018-07-04 6:43 ` Thomas Gleixner
2018-07-04 11:58 ` Guo Ren
2018-07-11 9:51 ` [PATCH V2 00/19] C-SKY(csky) Linux Kernel Port David Howells
2018-07-12 12:51 ` Guo Ren
2018-07-12 16:04 ` Sandra Loosemore
2018-07-13 1:30 ` Guo Ren
2018-07-13 10:23 ` David Howells
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