* [PATCH v7 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
@ 2018-07-26 15:45 ` Manivannan Sadhasivam
2018-07-26 15:45 ` [PATCH v7 2/6] arm64: dts: actions: Add pinctrl definition for S900 " Manivannan Sadhasivam
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:45 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Add devicetree binding for Actions Semiconductor Owl I2C controller
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/i2c/i2c-owl.txt | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.txt
diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.txt b/Documentation/devicetree/bindings/i2c/i2c-owl.txt
new file mode 100644
index 000000000000..b743fe444e9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-owl.txt
@@ -0,0 +1,27 @@
+Actions Semiconductor Owl I2C controller
+
+Required properties:
+
+- compatible : Should be "actions,s900-i2c".
+- reg : Offset and length of the register set for the device.
+- #address-cells : Should be 1.
+- #size-cells : Should be 0.
+- interrupts : A single interrupt specifier.
+- clocks : Phandle of the clock feeding the I2C controller.
+
+Optional properties:
+
+- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and
+ Fast modes are supported, possible values are 100000 and
+ 400000.
+Examples:
+
+ i2c0: i2c@e0170000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0170000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_I2C0>;
+ clock-frequency = <100000>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v7 2/6] arm64: dts: actions: Add pinctrl definition for S900 I2C controller
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
2018-07-26 15:45 ` [PATCH v7 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller Manivannan Sadhasivam
@ 2018-07-26 15:45 ` Manivannan Sadhasivam
2018-07-26 15:46 ` [PATCH v7 3/6] arm64: dts: actions: Add Actions Semiconductor S900 I2C controller nodes Manivannan Sadhasivam
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:45 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Add pinctrl definition for Actions Semiconductor S900 I2C controller.
Pinctrl definitions are only available for I2C0, I2C1, and I2C2.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
.../dts/actions/s900-bubblegum-96-pins.dtsi | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
new file mode 100644
index 000000000000..95e8b31071f9
--- /dev/null
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+&pinctrl {
+
+ i2c0_default: i2c0_default {
+ pinmux {
+ groups = "i2c0_mfp";
+ function = "i2c0";
+ };
+ pinconf {
+ pins = "i2c0_sclk", "i2c0_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c1_default: i2c1_default {
+ pinconf {
+ pins = "i2c1_sclk", "i2c1_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c2_default: i2c2_default {
+ pinconf {
+ pins = "i2c2_sclk", "i2c2_sdata";
+ bias-pull-up;
+ };
+ };
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v7 3/6] arm64: dts: actions: Add Actions Semiconductor S900 I2C controller nodes
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
2018-07-26 15:45 ` [PATCH v7 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller Manivannan Sadhasivam
2018-07-26 15:45 ` [PATCH v7 2/6] arm64: dts: actions: Add pinctrl definition for S900 " Manivannan Sadhasivam
@ 2018-07-26 15:46 ` Manivannan Sadhasivam
2018-07-26 15:46 ` [PATCH v7 4/6] arm64: dts: actions: Enable I2C1 and I2C2 in Bubblegum-96 board Manivannan Sadhasivam
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:46 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Add I2C controller nodes for Actions Semiconductor S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/actions/s900.dtsi | 60 +++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi
index 7ae8b931f000..6f7b89edbe4d 100644
--- a/arch/arm64/boot/dts/actions/s900.dtsi
+++ b/arch/arm64/boot/dts/actions/s900.dtsi
@@ -174,6 +174,66 @@
#clock-cells = <1>;
};
+ i2c0: i2c@e0170000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0170000 0 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_default>;
+ };
+
+ i2c1: i2c@e0172000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0172000 0 0x1000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_default>;
+ };
+
+ i2c2: i2c@e0174000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0174000 0 0x1000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_default>;
+ };
+
+ i2c3: i2c@e0176000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0176000 0 0x1000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@e0178000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe0178000 0 0x1000>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@e017a000 {
+ compatible = "actions,s900-i2c";
+ reg = <0 0xe017a000 0 0x1000>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl@e01b0000 {
compatible = "actions,s900-pinctrl";
reg = <0x0 0xe01b0000 0x0 0x1000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v7 4/6] arm64: dts: actions: Enable I2C1 and I2C2 in Bubblegum-96 board
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
` (2 preceding siblings ...)
2018-07-26 15:46 ` [PATCH v7 3/6] arm64: dts: actions: Add Actions Semiconductor S900 I2C controller nodes Manivannan Sadhasivam
@ 2018-07-26 15:46 ` Manivannan Sadhasivam
2018-07-26 15:46 ` [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver Manivannan Sadhasivam
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:46 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Enable I2C1 and I2C2 exposed on the low speed expansion connector in
Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
index d0ba35df9015..57ae374cfb5a 100644
--- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "s900.dtsi"
+#include "s900-bubblegum-96-pins.dtsi"
/ {
compatible = "ucrobotics,bubblegum-96", "actions,s900";
@@ -35,6 +36,16 @@
clocks = <&cmu CLK_UART5>;
};
+&i2c1 {
+ status = "okay";
+ clocks = <&cmu CLK_I2C1>;
+};
+
+&i2c2 {
+ status = "okay";
+ clocks = <&cmu CLK_I2C2>;
+};
+
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
` (3 preceding siblings ...)
2018-07-26 15:46 ` [PATCH v7 4/6] arm64: dts: actions: Enable I2C1 and I2C2 in Bubblegum-96 board Manivannan Sadhasivam
@ 2018-07-26 15:46 ` Manivannan Sadhasivam
2018-07-31 20:09 ` Wolfram Sang
2018-07-26 15:46 ` [PATCH v7 6/6] MAINTAINERS: Add entry for Actions Semiconductor Owl " Manivannan Sadhasivam
2018-07-30 17:07 ` [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
6 siblings, 1 reply; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:46 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Add Actions Semiconductor Owl family S900 I2C driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Peter Rosin <peda@axentia.se>
---
drivers/i2c/busses/Kconfig | 7 +
drivers/i2c/busses/Makefile | 1 +
drivers/i2c/busses/i2c-owl.c | 495 +++++++++++++++++++++++++++++++++++
3 files changed, 503 insertions(+)
create mode 100644 drivers/i2c/busses/i2c-owl.c
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 4f8df2ec87b1..8c8025f87ce4 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -762,6 +762,13 @@ config I2C_OMAP
Like OMAP1510/1610/1710/5912 and OMAP242x.
For details see http://www.ti.com/omap.
+config I2C_OWL
+ tristate "Actions Semiconductor Owl I2C Controller"
+ depends on ARCH_ACTIONS || COMPILE_TEST
+ help
+ Say Y here if you want to use the I2C bus controller on
+ the Actions Semiconductor Owl SoC's.
+
config I2C_PASEMI
tristate "PA Semi SMBus interface"
depends on PPC_PASEMI && PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 5a869144a0c5..b71618f77880 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
obj-$(CONFIG_I2C_OMAP) += i2c-omap.o
+obj-$(CONFIG_I2C_OWL) += i2c-owl.o
obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c
new file mode 100644
index 000000000000..a92a6c610478
--- /dev/null
+++ b/drivers/i2c/busses/i2c-owl.c
@@ -0,0 +1,495 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Actions Semiconductor Owl SoC's I2C driver
+ *
+ * Copyright (c) 2014 Actions Semi Inc.
+ * Author: David Liu <liuwei@actions-semi.com>
+ *
+ * Copyright (c) 2018 Linaro Ltd.
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+
+/* I2C registers */
+#define OWL_I2C_REG_CTL 0x0000
+#define OWL_I2C_REG_CLKDIV 0x0004
+#define OWL_I2C_REG_STAT 0x0008
+#define OWL_I2C_REG_ADDR 0x000C
+#define OWL_I2C_REG_TXDAT 0x0010
+#define OWL_I2C_REG_RXDAT 0x0014
+#define OWL_I2C_REG_CMD 0x0018
+#define OWL_I2C_REG_FIFOCTL 0x001C
+#define OWL_I2C_REG_FIFOSTAT 0x0020
+#define OWL_I2C_REG_DATCNT 0x0024
+#define OWL_I2C_REG_RCNT 0x0028
+
+/* I2Cx_CTL Bit Mask */
+#define OWL_I2C_CTL_RB BIT(1)
+#define OWL_I2C_CTL_GBCC(x) (((x) & 0x3) << 2)
+#define OWL_I2C_CTL_GBCC_NONE OWL_I2C_CTL_GBCC(0)
+#define OWL_I2C_CTL_GBCC_START OWL_I2C_CTL_GBCC(1)
+#define OWL_I2C_CTL_GBCC_STOP OWL_I2C_CTL_GBCC(2)
+#define OWL_I2C_CTL_GBCC_RSTART OWL_I2C_CTL_GBCC(3)
+#define OWL_I2C_CTL_IRQE BIT(5)
+#define OWL_I2C_CTL_EN BIT(7)
+#define OWL_I2C_CTL_AE BIT(8)
+#define OWL_I2C_CTL_SHSM BIT(10)
+
+#define OWL_I2C_DIV_FACTOR(x) ((x) & 0xff)
+
+/* I2Cx_STAT Bit Mask */
+#define OWL_I2C_STAT_RACK BIT(0)
+#define OWL_I2C_STAT_BEB BIT(1)
+#define OWL_I2C_STAT_IRQP BIT(2)
+#define OWL_I2C_STAT_LAB BIT(3)
+#define OWL_I2C_STAT_STPD BIT(4)
+#define OWL_I2C_STAT_STAD BIT(5)
+#define OWL_I2C_STAT_BBB BIT(6)
+#define OWL_I2C_STAT_TCB BIT(7)
+#define OWL_I2C_STAT_LBST BIT(8)
+#define OWL_I2C_STAT_SAMB BIT(9)
+#define OWL_I2C_STAT_SRGC BIT(10)
+
+/* I2Cx_CMD Bit Mask */
+#define OWL_I2C_CMD_SBE BIT(0)
+#define OWL_I2C_CMD_RBE BIT(4)
+#define OWL_I2C_CMD_DE BIT(8)
+#define OWL_I2C_CMD_NS BIT(9)
+#define OWL_I2C_CMD_SE BIT(10)
+#define OWL_I2C_CMD_MSS BIT(11)
+#define OWL_I2C_CMD_WRS BIT(12)
+#define OWL_I2C_CMD_SECL BIT(15)
+
+#define OWL_I2C_CMD_AS(x) (((x) & 0x7) << 1)
+#define OWL_I2C_CMD_SAS(x) (((x) & 0x7) << 5)
+
+/* I2Cx_FIFOCTL Bit Mask */
+#define OWL_I2C_FIFOCTL_NIB BIT(0)
+#define OWL_I2C_FIFOCTL_RFR BIT(1)
+#define OWL_I2C_FIFOCTL_TFR BIT(2)
+
+/* I2Cc_FIFOSTAT Bit Mask */
+#define OWL_I2C_FIFOSTAT_RNB BIT(1)
+#define OWL_I2C_FIFOSTAT_RFE BIT(2)
+#define OWL_I2C_FIFOSTAT_TFF BIT(5)
+#define OWL_I2C_FIFOSTAT_TFD GENMASK(23, 16)
+#define OWL_I2C_FIFOSTAT_RFD GENMASK(15, 8)
+
+/* I2C bus timeout */
+#define OWL_I2C_TIMEOUT msecs_to_jiffies(4 * 1000)
+
+#define OWL_I2C_MAX_RETRIES 50
+
+#define OWL_I2C_DEF_SPEED_HZ 100000
+#define OWL_I2C_MAX_SPEED_HZ 400000
+
+struct owl_i2c_dev {
+ struct i2c_adapter adap;
+ struct i2c_msg *msg;
+ struct completion msg_complete;
+ struct clk *clk;
+ spinlock_t lock;
+ void __iomem *base;
+ unsigned long clk_rate;
+ u32 bus_freq;
+ u32 msg_ptr;
+};
+
+static void owl_i2c_update_reg(void __iomem *reg, unsigned int val, bool state)
+{
+ unsigned int regval;
+
+ regval = readl(reg);
+
+ if (state)
+ regval |= val;
+ else
+ regval &= ~val;
+
+ writel(regval, reg);
+}
+
+static void owl_i2c_reset(struct owl_i2c_dev *i2c_dev)
+{
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
+ OWL_I2C_CTL_EN, false);
+ mdelay(1);
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
+ OWL_I2C_CTL_EN, true);
+
+ /* Clear status registers */
+ writel(0, i2c_dev->base + OWL_I2C_REG_STAT);
+}
+
+static int owl_i2c_reset_fifo(struct owl_i2c_dev *i2c_dev)
+{
+ unsigned int val, timeout = 0;
+
+ /* Reset FIFO */
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
+ OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR,
+ true);
+
+ /* Wait 50ms for FIFO reset complete */
+ do {
+ val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL);
+ if (!(val & (OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR)))
+ break;
+ usleep_range(500, 1000);
+ } while (timeout++ < OWL_I2C_MAX_RETRIES);
+
+ if (timeout > OWL_I2C_MAX_RETRIES) {
+ dev_err(&i2c_dev->adap.dev, "FIFO reset timeout\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static void owl_i2c_set_freq(struct owl_i2c_dev *i2c_dev)
+{
+ unsigned int val;
+
+ val = DIV_ROUND_UP(i2c_dev->clk_rate, i2c_dev->bus_freq * 16);
+
+ /* Set clock divider factor */
+ writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV);
+}
+
+static irqreturn_t owl_i2c_interrupt(int irq, void *_dev)
+{
+ struct owl_i2c_dev *i2c_dev = _dev;
+ struct i2c_msg *msg = i2c_dev->msg;
+ unsigned long flags;
+ unsigned int stat, fifostat;
+
+ spin_lock_irqsave(&i2c_dev->lock, flags);
+
+ fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
+ if (fifostat & OWL_I2C_FIFOSTAT_RNB) {
+ dev_dbg(&i2c_dev->adap.dev, "received NACK from device\n");
+ goto stop;
+ }
+
+ stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
+ if (stat & OWL_I2C_STAT_BEB) {
+ dev_dbg(&i2c_dev->adap.dev, "bus error\n");
+ goto stop;
+ }
+
+ /* Handle FIFO read */
+ if (msg->flags & I2C_M_RD) {
+ while ((readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
+ OWL_I2C_FIFOSTAT_RFE) && i2c_dev->msg_ptr < msg->len) {
+ msg->buf[i2c_dev->msg_ptr++] = readl(i2c_dev->base +
+ OWL_I2C_REG_RXDAT);
+ }
+ } else {
+ /* Handle the remaining bytes which were not sent */
+ while (!(readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
+ OWL_I2C_FIFOSTAT_TFF) && i2c_dev->msg_ptr < msg->len) {
+ writel(msg->buf[i2c_dev->msg_ptr++],
+ i2c_dev->base + OWL_I2C_REG_TXDAT);
+ }
+ }
+
+stop:
+ /* Clear pending interrupts */
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT,
+ OWL_I2C_STAT_IRQP, true);
+
+ complete_all(&i2c_dev->msg_complete);
+ spin_unlock_irqrestore(&i2c_dev->lock, flags);
+
+ return IRQ_HANDLED;
+}
+
+static u32 owl_i2c_func(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static int owl_i2c_check_bus_busy(struct i2c_adapter *adap)
+{
+ struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
+ unsigned long timeout;
+
+ /* Check for Bus busy */
+ timeout = jiffies + OWL_I2C_TIMEOUT;
+ while (readl(i2c_dev->base + OWL_I2C_REG_STAT) & OWL_I2C_STAT_BBB) {
+ if (time_after(jiffies, timeout)) {
+ dev_err(&adap->dev, "Bus busy timeout\n");
+ return -ETIMEDOUT;
+ }
+ }
+
+ return 0;
+}
+
+static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
+ int num)
+{
+ struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
+ struct i2c_msg *msg;
+ unsigned long time_left, flags;
+ unsigned int i2c_cmd, val;
+ unsigned int addr;
+ int ret, idx;
+
+ spin_lock_irqsave(&i2c_dev->lock, flags);
+
+ /* Reset I2C controller */
+ owl_i2c_reset(i2c_dev);
+
+ /* Set bus frequency */
+ owl_i2c_set_freq(i2c_dev);
+
+ /*
+ * Spinlock should be released before calling reset FIFO and
+ * bus busy check since those functions may sleep
+ */
+ spin_unlock_irqrestore(&i2c_dev->lock, flags);
+
+ /* Reset FIFO */
+ ret = owl_i2c_reset_fifo(i2c_dev);
+ if (ret)
+ goto unlocked_err_exit;
+
+ /* Check for bus busy */
+ ret = owl_i2c_check_bus_busy(adap);
+ if (ret)
+ goto unlocked_err_exit;
+
+ spin_lock_irqsave(&i2c_dev->lock, flags);
+
+ /* Check for Arbitration lost */
+ val = readl(i2c_dev->base + OWL_I2C_REG_STAT);
+ if (val & OWL_I2C_STAT_LAB) {
+ val &= ~OWL_I2C_STAT_LAB;
+ writel(val, i2c_dev->base + OWL_I2C_REG_STAT);
+ ret = -EAGAIN;
+ goto err_exit;
+ }
+
+ reinit_completion(&i2c_dev->msg_complete);
+
+ /* Enable I2C controller interrupt */
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
+ OWL_I2C_CTL_IRQE, true);
+
+ /*
+ * Select: FIFO enable, Master mode, Stop enable, Data count enable,
+ * Send start bit
+ */
+ i2c_cmd = OWL_I2C_CMD_SECL | OWL_I2C_CMD_MSS | OWL_I2C_CMD_SE |
+ OWL_I2C_CMD_NS | OWL_I2C_CMD_DE | OWL_I2C_CMD_SBE;
+
+ /* Handle repeated start condition */
+ if (num > 1) {
+ /* Set internal address length and enable repeated start */
+ i2c_cmd |= OWL_I2C_CMD_AS(msgs[0].len + 1) |
+ OWL_I2C_CMD_SAS(1) | OWL_I2C_CMD_RBE;
+
+ /* Write slave address */
+ addr = i2c_8bit_addr_from_msg(&msgs[0]);
+ writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
+
+ /* Write internal register address */
+ for (idx = 0; idx < msgs[0].len; idx++)
+ writel(msgs[0].buf[idx],
+ i2c_dev->base + OWL_I2C_REG_TXDAT);
+
+ msg = &msgs[1];
+ } else {
+ /* Set address length */
+ i2c_cmd |= OWL_I2C_CMD_AS(1);
+ msg = &msgs[0];
+ }
+
+ i2c_dev->msg = msg;
+ i2c_dev->msg_ptr = 0;
+
+ /* Set data count for the message */
+ writel(msg->len, i2c_dev->base + OWL_I2C_REG_DATCNT);
+
+ addr = i2c_8bit_addr_from_msg(msg);
+ writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT);
+
+ if (!(msg->flags & I2C_M_RD)) {
+ /* Write data to FIFO */
+ for (idx = 0; idx < msg->len; idx++) {
+ /* Check for FIFO full */
+ if (readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) &
+ OWL_I2C_FIFOSTAT_TFF)
+ break;
+
+ writel(msg->buf[idx],
+ i2c_dev->base + OWL_I2C_REG_TXDAT);
+ }
+
+ i2c_dev->msg_ptr = idx;
+ }
+
+ /* Ignore the NACK if needed */
+ if (msg->flags & I2C_M_IGNORE_NAK)
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
+ OWL_I2C_FIFOCTL_NIB, true);
+ else
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
+ OWL_I2C_FIFOCTL_NIB, false);
+
+ /* Start the transfer */
+ writel(i2c_cmd, i2c_dev->base + OWL_I2C_REG_CMD);
+
+ spin_unlock_irqrestore(&i2c_dev->lock, flags);
+
+ time_left = wait_for_completion_timeout(&i2c_dev->msg_complete,
+ adap->timeout);
+
+ spin_lock_irqsave(&i2c_dev->lock, flags);
+ if (time_left == 0) {
+ dev_err(&adap->dev, "Transaction timed out\n");
+ /* Send stop condition and release the bus */
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
+ OWL_I2C_CTL_GBCC_STOP | OWL_I2C_CTL_RB,
+ true);
+ ret = -ETIMEDOUT;
+ goto err_exit;
+ }
+
+ /*
+ * Here, -ENXIO will be returned if interrupt occurred but no
+ * read or write happened. Else if msg_ptr equals to message length,
+ * message count will be returned.
+ */
+ ret = i2c_dev->msg_ptr == msg->len ? num : -ENXIO;
+
+err_exit:
+ spin_unlock_irqrestore(&i2c_dev->lock, flags);
+
+unlocked_err_exit:
+ /* Disable I2C controller */
+ owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
+ OWL_I2C_CTL_EN, false);
+
+ return ret;
+}
+
+static const struct i2c_algorithm owl_i2c_algorithm = {
+ .master_xfer = owl_i2c_master_xfer,
+ .functionality = owl_i2c_func,
+};
+
+static const struct i2c_adapter_quirks owl_i2c_quirks = {
+ .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST,
+ .max_read_len = 240,
+ .max_write_len = 240,
+ .max_comb_1st_msg_len = 6,
+ .max_comb_2nd_msg_len = 240,
+};
+
+static int owl_i2c_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct owl_i2c_dev *i2c_dev;
+ struct resource *res;
+ int ret, irq;
+
+ i2c_dev = devm_kzalloc(dev, sizeof(*i2c_dev), GFP_KERNEL);
+ if (!i2c_dev)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ i2c_dev->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(i2c_dev->base))
+ return PTR_ERR(i2c_dev->base);
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(dev, "failed to get IRQ number\n");
+ return irq;
+ }
+
+ if (of_property_read_u32(dev->of_node, "clock-frequency",
+ &i2c_dev->bus_freq))
+ i2c_dev->bus_freq = OWL_I2C_DEF_SPEED_HZ;
+
+ /* We support only frequencies of 100k and 400k for now */
+ if (i2c_dev->bus_freq != OWL_I2C_DEF_SPEED_HZ &&
+ i2c_dev->bus_freq != OWL_I2C_MAX_SPEED_HZ) {
+ dev_err(dev, "invalid clock-frequency %d\n", i2c_dev->bus_freq);
+ return -EINVAL;
+ }
+
+ i2c_dev->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(i2c_dev->clk)) {
+ dev_err(dev, "failed to get clock\n");
+ return PTR_ERR(i2c_dev->clk);
+ }
+
+ ret = clk_prepare_enable(i2c_dev->clk);
+ if (ret)
+ return ret;
+
+ i2c_dev->clk_rate = clk_get_rate(i2c_dev->clk);
+ if (!i2c_dev->clk_rate) {
+ dev_err(dev, "input clock rate should not be zero\n");
+ ret = -EINVAL;
+ goto disable_clk;
+ }
+
+ init_completion(&i2c_dev->msg_complete);
+ spin_lock_init(&i2c_dev->lock);
+ i2c_dev->adap.owner = THIS_MODULE;
+ i2c_dev->adap.algo = &owl_i2c_algorithm;
+ i2c_dev->adap.timeout = OWL_I2C_TIMEOUT;
+ i2c_dev->adap.quirks = &owl_i2c_quirks;
+ i2c_dev->adap.dev.parent = dev;
+ i2c_dev->adap.dev.of_node = dev->of_node;
+ snprintf(i2c_dev->adap.name, sizeof(i2c_dev->adap.name),
+ "%s", "OWL I2C adapter");
+ i2c_set_adapdata(&i2c_dev->adap, i2c_dev);
+
+ platform_set_drvdata(pdev, i2c_dev);
+
+ ret = devm_request_irq(dev, irq, owl_i2c_interrupt, 0, pdev->name,
+ i2c_dev);
+ if (ret) {
+ dev_err(dev, "failed to request irq %d\n", irq);
+ goto disable_clk;
+ }
+
+ return i2c_add_adapter(&i2c_dev->adap);
+
+disable_clk:
+ clk_disable_unprepare(i2c_dev->clk);
+
+ return ret;
+}
+
+static const struct of_device_id owl_i2c_of_match[] = {
+ { .compatible = "actions,s900-i2c" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, owl_i2c_of_match);
+
+static struct platform_driver owl_i2c_driver = {
+ .probe = owl_i2c_probe,
+ .driver = {
+ .name = "owl-i2c",
+ .of_match_table = of_match_ptr(owl_i2c_of_match),
+ },
+};
+module_platform_driver(owl_i2c_driver);
+
+MODULE_AUTHOR("David Liu <liuwei@actions-semi.com>");
+MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
+MODULE_DESCRIPTION("Actions Semiconductor Owl SoC's I2C driver");
+MODULE_LICENSE("GPL");
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver
2018-07-26 15:46 ` [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver Manivannan Sadhasivam
@ 2018-07-31 20:09 ` Wolfram Sang
2018-08-01 4:56 ` Manivannan Sadhasivam
0 siblings, 1 reply; 10+ messages in thread
From: Wolfram Sang @ 2018-07-31 20:09 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: robh+dt, afaerber, linus.walleij, linux-i2c, liuwei, mp-cs,
96boards, devicetree, andy.shevchenko, daniel.thompson,
amit.kucheria, linux-arm-kernel, linux-gpio, linux-kernel,
hzhang, bdong, manivannanece23, thomas.liau, jeff.chen
[-- Attachment #1: Type: text/plain, Size: 1967 bytes --]
Hi Manivannan,
On Thu, Jul 26, 2018 at 09:16:02PM +0530, Manivannan Sadhasivam wrote:
> Add Actions Semiconductor Owl family S900 I2C driver.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Acked-by: Peter Rosin <peda@axentia.se>
Looks mostly good already. Thanks Peter for the initial review!
> +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev)
> +{
> + struct owl_i2c_dev *i2c_dev = _dev;
> + struct i2c_msg *msg = i2c_dev->msg;
> + unsigned long flags;
> + unsigned int stat, fifostat;
> +
> + spin_lock_irqsave(&i2c_dev->lock, flags);
> +
> + fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
> + if (fifostat & OWL_I2C_FIFOSTAT_RNB) {
> + dev_dbg(&i2c_dev->adap.dev, "received NACK from device\n");
> + goto stop;
> + }
> +
> + stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
> + if (stat & OWL_I2C_STAT_BEB) {
> + dev_dbg(&i2c_dev->adap.dev, "bus error\n");
> + goto stop;
> + }
I wonder if you can't pass back the different errors to the upper
layers? Like -ENXIO for NACK and -EIO for bus error? We have a
convention for that and it seems your HW can support it. The different
error codes would then maybe also make the debug outputs obsolete.
> + /*
> + * Here, -ENXIO will be returned if interrupt occurred but no
> + * read or write happened. Else if msg_ptr equals to message length,
> + * message count will be returned.
> + */
> + ret = i2c_dev->msg_ptr == msg->len ? num : -ENXIO;
I'd think this kinda unusual construct could go then as well by just
returning the error code derived from the interrupt handler above.
> +static const struct i2c_adapter_quirks owl_i2c_quirks = {
> + .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST,
> + .max_read_len = 240,
> + .max_write_len = 240,
> + .max_comb_1st_msg_len = 6,
> + .max_comb_2nd_msg_len = 240,
> +};
Yay! Good use of the i2c_adapter_quirks struct :)
Regards,
Wolfram
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver
2018-07-31 20:09 ` Wolfram Sang
@ 2018-08-01 4:56 ` Manivannan Sadhasivam
0 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-08-01 4:56 UTC (permalink / raw)
To: Wolfram Sang
Cc: robh+dt, afaerber, linus.walleij, linux-i2c, liuwei, mp-cs,
96boards, devicetree, andy.shevchenko, daniel.thompson,
amit.kucheria, linux-arm-kernel, linux-gpio, linux-kernel,
hzhang, bdong, manivannanece23, thomas.liau, jeff.chen
Hi Wolfram,
On Tue, Jul 31, 2018 at 10:09:32PM +0200, Wolfram Sang wrote:
> Hi Manivannan,
>
> On Thu, Jul 26, 2018 at 09:16:02PM +0530, Manivannan Sadhasivam wrote:
> > Add Actions Semiconductor Owl family S900 I2C driver.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > Acked-by: Peter Rosin <peda@axentia.se>
>
> Looks mostly good already. Thanks Peter for the initial review!
>
Thanks to Andy also :)
> > +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev)
> > +{
> > + struct owl_i2c_dev *i2c_dev = _dev;
> > + struct i2c_msg *msg = i2c_dev->msg;
> > + unsigned long flags;
> > + unsigned int stat, fifostat;
> > +
> > + spin_lock_irqsave(&i2c_dev->lock, flags);
> > +
> > + fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT);
> > + if (fifostat & OWL_I2C_FIFOSTAT_RNB) {
> > + dev_dbg(&i2c_dev->adap.dev, "received NACK from device\n");
> > + goto stop;
> > + }
> > +
> > + stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
> > + if (stat & OWL_I2C_STAT_BEB) {
> > + dev_dbg(&i2c_dev->adap.dev, "bus error\n");
> > + goto stop;
> > + }
>
> I wonder if you can't pass back the different errors to the upper
> layers? Like -ENXIO for NACK and -EIO for bus error? We have a
> convention for that and it seems your HW can support it. The different
> error codes would then maybe also make the debug outputs obsolete.
>
>
Sure, will catch the errors using an i2c_dev member and pass it to upper
layers in owl_i2c_master_xfer.
> > + /*
> > + * Here, -ENXIO will be returned if interrupt occurred but no
> > + * read or write happened. Else if msg_ptr equals to message length,
> > + * message count will be returned.
> > + */
> > + ret = i2c_dev->msg_ptr == msg->len ? num : -ENXIO;
>
> I'd think this kinda unusual construct could go then as well by just
> returning the error code derived from the interrupt handler above.
>
Makes sense! It will become:
ret = i2c_dev->err < 0 ? i2c_dev->err : num;
Thanks,
Mani
> > +static const struct i2c_adapter_quirks owl_i2c_quirks = {
> > + .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST,
> > + .max_read_len = 240,
> > + .max_write_len = 240,
> > + .max_comb_1st_msg_len = 6,
> > + .max_comb_2nd_msg_len = 240,
> > +};
>
> Yay! Good use of the i2c_adapter_quirks struct :)
>
> Regards,
>
> Wolfram
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v7 6/6] MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
` (4 preceding siblings ...)
2018-07-26 15:46 ` [PATCH v7 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver Manivannan Sadhasivam
@ 2018-07-26 15:46 ` Manivannan Sadhasivam
2018-07-30 17:07 ` [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-26 15:46 UTC (permalink / raw)
To: wsa, robh+dt, afaerber
Cc: linus.walleij, linux-i2c, liuwei, mp-cs, 96boards, devicetree,
andy.shevchenko, daniel.thompson, amit.kucheria,
linux-arm-kernel, linux-gpio, linux-kernel, hzhang, bdong,
manivannanece23, thomas.liau, jeff.chen, Manivannan Sadhasivam
Add entry for Actions Semiconductor Owl I2C driver under ARM/ACTIONS
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 09b54e9ebc6f..5084c62712fa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1145,12 +1145,14 @@ F: arch/arm/boot/dts/owl-*
F: arch/arm64/boot/dts/actions/
F: drivers/clk/actions/
F: drivers/clocksource/owl-*
+F: drivers/i2c/busses/i2c-owl.c
F: drivers/pinctrl/actions/*
F: drivers/soc/actions/
F: include/dt-bindings/power/owl-*
F: include/linux/soc/actions/
F: Documentation/devicetree/bindings/arm/actions.txt
F: Documentation/devicetree/bindings/clock/actions,s900-cmu.txt
+F: Documentation/devicetree/bindings/i2c/i2c-owl.txt
F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
--
2.17.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support
2018-07-26 15:45 [PATCH v7 0/6] Add Actions Semiconductor Owl S900 I2C support Manivannan Sadhasivam
` (5 preceding siblings ...)
2018-07-26 15:46 ` [PATCH v7 6/6] MAINTAINERS: Add entry for Actions Semiconductor Owl " Manivannan Sadhasivam
@ 2018-07-30 17:07 ` Manivannan Sadhasivam
6 siblings, 0 replies; 10+ messages in thread
From: Manivannan Sadhasivam @ 2018-07-30 17:07 UTC (permalink / raw)
To: wsa
Cc: robh+dt, afaerber, linus.walleij, linux-i2c, liuwei, mp-cs,
96boards, devicetree, andy.shevchenko, daniel.thompson,
amit.kucheria, linux-arm-kernel, linux-gpio, linux-kernel,
hzhang, bdong, manivannanece23, thomas.liau, jeff.chen
On Thu, Jul 26, 2018 at 09:15:57PM +0530, Manivannan Sadhasivam wrote:
> This patchset adds I2C controller support for Actions Semiconductor S900 SoC.
> This driver has been structured in a way such that there will be only
> one controller driver for the whole Owl family series (S500, S700 and
> S900 SoCs).
>
> There are 6 I2C controllers with separate memory mapped register space.
> The I2C controller can handle atmost two messages concatenated by a
> repeated start via its internal address feature. Hence the driver
> uses this feature for messages of length greater than 1. In those cases,
> the first message of the combined message should be a `write` with maximum
> message length 6 and the second message's maximum length should be 240 bytes.
>
> As far as the bus speed is concerned, this driver only supports
> Standard (100KHz) and High speed (400KHz) for now.
>
> The pinctrl definitions are only available for I2C0, I2C1 and I2C2.
> With the mux option available only for I2C0.
>
> For Bubblegum-96 board utilizing the S900 SoC, only I2C1 and I2C2 which
> are exposed on the Low speed expansion connector are enabled.
>
> This series depends on the pinctrl patch [1] is still not merged by the
> platform maintainer Andreas but it has been reviewed by the pinctrl maintainer
> Linus Walleij. For the reference, I have queued up all reviewed dts patches
> in my tree [2] from which Andreas is picking them for 4.19.
>
> For this series, since the dts patches will go through the ARM SoC tree,
> Andreas will pick it up once it is reviewed.
>
> Thanks,
> Mani
>
Hi Wolfram,
Is there any update on this series?
Thanks,
Mani
> [1] https://patchwork.kernel.org/patch/10322937/
> [2] https://git.linaro.org/people/manivannan.sadhasivam/linux.git/log/?h=s900-for-next
>
> Changes in v7:
>
> * Fixed a multi line misalignment spotted by Peter
>
> Changes in v6:
>
> As per Peter's review:
>
> * Added missing newlines for error and debug outputs
> * Fixed further multi-line misalignments
>
> Changes in v5:
>
> * Cleaned up the multi-line codes and reordered the error paths
> as per Peter's review
> * Added Acked-by tag from Peter for driver patch
> * Added Reviewed-by tag from Rob for bindings patch
>
> Changes in v4:
>
> As per Andy and Peter review:
>
> * Used spinlock for accessing most of the register access (only parts
> involved sleep/long-busy-wait has been excluded)
> * Removed returning 0 and added -ENXIO if the msg_ptr not equals to
> message length
> * Added DIV_ROUND_UP for setting clock frequency
> * Changed one non-atomic mdelay instance to usleep_range
> * Moved pinctrl definition patch before dts patch
> * Fixed the driver to support only 100KHz and 400KHz frequencies
>
> Changes in v3:
>
> As per Peter, Andy and Andreas review:
>
> * Removed owl_i2c_reset function from interrupt handler since it
> involves the use of delays.
> * Fixed the return path in owl_i2c_master_xfer and added a note
> * Changed "base" parameter to "reg" in owl_i2c_update_reg for better
> understandability
> * Ordered the includes in alphabetical order
> * Small changes to defines and added comma at the end of struct members
> * Removed rendundant 0 assignment in owl_i2c_master_xfer
> * Changed all OWL naming convention to Owl and also changed Actions Semi
> naming to Actions Semiconductor
>
> Changes in v2:
>
> As per Andy's review:
> * Modified infinite loops to fixed number of retries
> * Used i2c_8bit_addr_from_msg for constructing the slave address
> * Removed unnecessary parenthesis around defines
> * Modified certain dev_warn to dev_dbg
> * Modified the error handling to more generic pattern
> * Fixed the return value in owl_i2c_master_xfer
> * Added MAINTAINERS patch for I2C driver and its binding
>
> Manivannan Sadhasivam (6):
> dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C
> controller
> arm64: dts: actions: Add pinctrl definition for S900 I2C controller
> arm64: dts: actions: Add Actions Semiconductor S900 I2C controller
> nodes
> arm64: dts: actions: Enable I2C1 and I2C2 in Bubblegum-96 board
> i2c: Add Actions Semiconductor Owl family S900 I2C driver
> MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
>
> .../devicetree/bindings/i2c/i2c-owl.txt | 27 +
> MAINTAINERS | 2 +
> .../dts/actions/s900-bubblegum-96-pins.dtsi | 29 +
> .../boot/dts/actions/s900-bubblegum-96.dts | 11 +
> arch/arm64/boot/dts/actions/s900.dtsi | 60 +++
> drivers/i2c/busses/Kconfig | 7 +
> drivers/i2c/busses/Makefile | 1 +
> drivers/i2c/busses/i2c-owl.c | 495 ++++++++++++++++++
> 8 files changed, 632 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.txt
> create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi
> create mode 100644 drivers/i2c/busses/i2c-owl.c
>
> --
> 2.17.1
>
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