From: Peter Zijlstra <peterz@infradead.org>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Benjamin Herrenschmidt <benh@au1.ibm.com>,
Andrew Lutomirski <luto@kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
Borislav Petkov <bp@alien8.de>, Rik van Riel <riel@surriel.com>,
Jann Horn <jannh@google.com>,
Adin Scannell <ascannell@google.com>,
Dave Hansen <dave.hansen@intel.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-mm <linux-mm@kvack.org>, David Miller <davem@davemloft.net>,
Martin Schwidefsky <schwidefsky@de.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
jejb@parisc-linux.org, vgupta@synopsys.com
Subject: Re: [PATCH 3/4] mm/tlb, x86/mm: Support invalidating TLB caches for RCU_TABLE_FREE
Date: Mon, 27 Aug 2018 13:00:17 +0200 [thread overview]
Message-ID: <20180827110017.GO24142@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <20180827074701.GW24124@hirez.programming.kicks-ass.net>
On Mon, Aug 27, 2018 at 09:47:01AM +0200, Peter Zijlstra wrote:
> And there's only like 4 architectures that still have a custom
> mmu_gather:
>
> - sh
> - arm
> - ia64
> - s390
>
> sh is trivial, arm seems doable, with a bit of luck we can do 'rm -rf
> arch/ia64' leaving us with s390.
The one obvious thing SH and ARM want is a sensible default for
tlb_start_vma(). (also: https://lkml.org/lkml/2004/1/15/6 )
The below make tlb_start_vma() default to flush_cache_range(), which
should be right and sufficient. The only exceptions that I found where
(oddly):
- m68k-mmu
- sparc64
- unicore
Those architectures appear to have a non-NOP flush_cache_range(), but
their current tlb_start_vma() does not call it.
Furthermore, I think tlb_flush() is broken on arc and parisc; in
particular they don't appear to have any TLB invalidate for the
shift_arg_pages() case, where we do not call tlb_*_vma() and fullmm=0.
Possibly shift_arg_pages() should be fixed instead.
Some archs (nds32,sparc32) avoid this by having an unconditional
flush_tlb_mm() in tlb_flush(), which seems somewhat suboptimal if you
have flush_tlb_range(). TLB_FLUSH_VMA() might be an option, however
hideous it is.
---
diff --git a/arch/arc/include/asm/tlb.h b/arch/arc/include/asm/tlb.h
index a9db5f62aaf3..7af2b373ebe7 100644
--- a/arch/arc/include/asm/tlb.h
+++ b/arch/arc/include/asm/tlb.h
@@ -23,15 +23,6 @@ do { \
*
* Note, read http://lkml.org/lkml/2004/1/15/6
*/
-#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
-#define tlb_start_vma(tlb, vma)
-#else
-#define tlb_start_vma(tlb, vma) \
-do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
-} while(0)
-#endif
#define tlb_end_vma(tlb, vma) \
do { \
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h
index b6823b9e94da..9d04b4649692 100644
--- a/arch/mips/include/asm/tlb.h
+++ b/arch/mips/include/asm/tlb.h
@@ -5,16 +5,6 @@
#include <asm/cpu-features.h>
#include <asm/mipsregs.h>
-/*
- * MIPS doesn't need any special per-pte or per-vma handling, except
- * we need to flush cache for area to be unmapped.
- */
-#define tlb_start_vma(tlb, vma) \
- do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
- } while (0)
-#define tlb_end_vma(tlb, vma) do { } while (0)
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
/*
diff --git a/arch/nds32/include/asm/tlb.h b/arch/nds32/include/asm/tlb.h
index b35ae5eae3ab..0bf7c9482381 100644
--- a/arch/nds32/include/asm/tlb.h
+++ b/arch/nds32/include/asm/tlb.h
@@ -4,12 +4,6 @@
#ifndef __ASMNDS32_TLB_H
#define __ASMNDS32_TLB_H
-#define tlb_start_vma(tlb,vma) \
- do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
- } while (0)
-
#define tlb_end_vma(tlb,vma) \
do { \
if(!tlb->fullmm) \
diff --git a/arch/nios2/include/asm/tlb.h b/arch/nios2/include/asm/tlb.h
index d3bc648e08b5..9b518c6d0f62 100644
--- a/arch/nios2/include/asm/tlb.h
+++ b/arch/nios2/include/asm/tlb.h
@@ -15,16 +15,6 @@
extern void set_mmu_pid(unsigned long pid);
-/*
- * NiosII doesn't need any special per-pte or per-vma handling, except
- * we need to flush cache for the area to be unmapped.
- */
-#define tlb_start_vma(tlb, vma) \
- do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
- } while (0)
-
#define tlb_end_vma(tlb, vma) do { } while (0)
#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
diff --git a/arch/parisc/include/asm/tlb.h b/arch/parisc/include/asm/tlb.h
index 0c881e74d8a6..b1984f9cd3af 100644
--- a/arch/parisc/include/asm/tlb.h
+++ b/arch/parisc/include/asm/tlb.h
@@ -7,11 +7,6 @@ do { if ((tlb)->fullmm) \
flush_tlb_mm((tlb)->mm);\
} while (0)
-#define tlb_start_vma(tlb, vma) \
-do { if (!(tlb)->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
-} while (0)
-
#define tlb_end_vma(tlb, vma) \
do { if (!(tlb)->fullmm) \
flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
diff --git a/arch/sparc/include/asm/tlb_32.h b/arch/sparc/include/asm/tlb_32.h
index 343cea19e573..68d817273de8 100644
--- a/arch/sparc/include/asm/tlb_32.h
+++ b/arch/sparc/include/asm/tlb_32.h
@@ -2,11 +2,6 @@
#ifndef _SPARC_TLB_H
#define _SPARC_TLB_H
-#define tlb_start_vma(tlb, vma) \
-do { \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
-} while (0)
-
#define tlb_end_vma(tlb, vma) \
do { \
flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
diff --git a/arch/xtensa/include/asm/tlb.h b/arch/xtensa/include/asm/tlb.h
index 0d766f9c1083..1a93e350382e 100644
--- a/arch/xtensa/include/asm/tlb.h
+++ b/arch/xtensa/include/asm/tlb.h
@@ -16,19 +16,10 @@
#if (DCACHE_WAY_SIZE <= PAGE_SIZE)
-/* Note, read http://lkml.org/lkml/2004/1/15/6 */
-
-# define tlb_start_vma(tlb,vma) do { } while (0)
# define tlb_end_vma(tlb,vma) do { } while (0)
#else
-# define tlb_start_vma(tlb, vma) \
- do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
- } while(0)
-
# define tlb_end_vma(tlb, vma) \
do { \
if (!tlb->fullmm) \
diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
index e811ef7b8350..1d037fd5bb7a 100644
--- a/include/asm-generic/tlb.h
+++ b/include/asm-generic/tlb.h
@@ -181,19 +181,21 @@ static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
* the vmas are adjusted to only cover the region to be torn down.
*/
#ifndef tlb_start_vma
-#define tlb_start_vma(tlb, vma) do { } while (0)
+#define tlb_start_vma(tlb, vma) \
+do { \
+ if (!tlb->fullmm) \
+ flush_cache_range(vma, vma->vm_start, vma->vm_end); \
+} while (0)
#endif
-#define __tlb_end_vma(tlb, vma) \
- do { \
- if (!tlb->fullmm && tlb->end) { \
- tlb_flush(tlb); \
- __tlb_reset_range(tlb); \
- } \
- } while (0)
-
#ifndef tlb_end_vma
-#define tlb_end_vma __tlb_end_vma
+#define tlb_end_vma(tlb, vma) \
+ do { \
+ if (!tlb->fullmm && tlb->end) { \
+ tlb_flush(tlb); \
+ __tlb_reset_range(tlb); \
+ } \
+ } while (0)
#endif
#ifndef __tlb_remove_tlb_entry
next prev parent reply other threads:[~2018-08-27 11:01 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-22 15:30 [PATCH 0/4] x86: TLB invalidate fixes Peter Zijlstra
2018-08-22 15:30 ` [PATCH 1/4] x86/mm/tlb: Revert the recent lazy TLB patches Peter Zijlstra
2018-08-22 21:37 ` Linus Torvalds
2018-08-22 22:11 ` Rik van Riel
2018-08-22 15:30 ` [PATCH 2/4] mm/tlb: Remove tlb_remove_table() non-concurrent condition Peter Zijlstra
2018-08-23 3:31 ` Nicholas Piggin
2018-08-23 3:35 ` Linus Torvalds
2018-08-23 3:44 ` Linus Torvalds
2018-08-23 4:16 ` Nicholas Piggin
2018-08-23 4:54 ` Linus Torvalds
2018-08-23 5:15 ` Nicholas Piggin
2018-08-24 8:42 ` Peter Zijlstra
2018-08-23 13:40 ` Will Deacon
2018-08-22 15:30 ` [PATCH 3/4] mm/tlb, x86/mm: Support invalidating TLB caches for RCU_TABLE_FREE Peter Zijlstra
2018-08-22 15:55 ` Peter Zijlstra
2018-08-23 3:45 ` Nicholas Piggin
2018-08-23 3:59 ` Linus Torvalds
2018-08-23 4:33 ` Nicholas Piggin
2018-08-23 5:03 ` Linus Torvalds
2018-08-23 5:58 ` Nicholas Piggin
2018-08-23 4:54 ` Benjamin Herrenschmidt
2018-08-23 5:11 ` Linus Torvalds
2018-08-23 5:20 ` Linus Torvalds
2018-08-23 6:48 ` Martin Schwidefsky
2018-08-23 5:21 ` Benjamin Herrenschmidt
2018-08-23 6:15 ` Nicholas Piggin
2018-08-23 13:39 ` Will Deacon
2018-08-24 8:47 ` Peter Zijlstra
2018-08-24 11:32 ` Peter Zijlstra
2018-08-24 11:39 ` Peter Zijlstra
2018-08-27 5:00 ` Nicholas Piggin
2018-08-27 7:47 ` Peter Zijlstra
2018-08-27 8:04 ` Nicholas Piggin
2018-08-27 8:09 ` Benjamin Herrenschmidt
2018-08-27 8:20 ` Peter Zijlstra
2018-08-27 8:54 ` Nicholas Piggin
2018-08-27 9:02 ` Nicholas Piggin
2018-08-27 22:13 ` Benjamin Herrenschmidt
2018-08-27 13:36 ` Rik van Riel
2018-08-27 14:29 ` Nicholas Piggin
2018-08-27 8:57 ` removig ia64, was: " Christoph Hellwig
2018-08-27 11:28 ` Peter Zijlstra
2018-08-27 11:45 ` Jason Duerstock
2018-08-27 11:00 ` Peter Zijlstra [this message]
2018-08-30 0:13 ` Vineet Gupta
2018-08-30 10:23 ` Peter Zijlstra
2018-08-24 17:26 ` Nadav Amit
2018-08-24 18:04 ` Peter Zijlstra
2018-08-24 18:35 ` TLB flushes on fixmap changes Nadav Amit
2018-08-24 19:31 ` Linus Torvalds
2018-08-24 20:24 ` Nadav Amit
2018-08-25 0:58 ` Linus Torvalds
2018-08-25 2:29 ` nadav.amit
2018-08-25 4:23 ` Andy Lutomirski
2018-08-26 2:23 ` Masami Hiramatsu
2018-08-26 4:21 ` Andy Lutomirski
2018-08-26 4:43 ` Kees Cook
2018-08-26 5:53 ` Nadav Amit
2018-08-26 14:20 ` Andy Lutomirski
2018-08-26 16:47 ` Kees Cook
2018-08-26 17:25 ` Andy Lutomirski
2018-08-26 20:15 ` Thomas Gleixner
2018-08-26 22:03 ` Kees Cook
2018-08-26 22:15 ` Matthew Wilcox
2018-08-26 22:29 ` Jann Horn
2018-08-26 9:09 ` Peter Zijlstra
2018-08-27 3:03 ` Masami Hiramatsu
2018-08-27 3:26 ` Nadav Amit
2018-08-27 8:05 ` Masami Hiramatsu
2018-08-27 17:34 ` Nadav Amit
2018-08-27 18:45 ` Andy Lutomirski
2018-08-27 18:54 ` Nadav Amit
2018-08-27 18:58 ` Andy Lutomirski
2018-08-27 19:10 ` Nadav Amit
2018-08-27 19:43 ` Nadav Amit
2018-08-27 19:58 ` Andy Lutomirski
2018-08-27 20:16 ` Nadav Amit
2018-08-27 21:55 ` Nadav Amit
2018-08-27 22:32 ` Andy Lutomirski
2018-08-27 22:54 ` Nadav Amit
2018-08-27 23:01 ` Andy Lutomirski
2018-08-28 8:49 ` Masami Hiramatsu
2018-08-28 17:33 ` Nadav Amit
2018-08-27 8:13 ` Peter Zijlstra
2018-08-27 9:39 ` Masami Hiramatsu
2018-08-27 9:55 ` Jann Horn
2018-08-26 22:48 ` Jann Horn
2018-08-24 8:35 ` [PATCH 3/4] mm/tlb, x86/mm: Support invalidating TLB caches for RCU_TABLE_FREE Peter Zijlstra
2018-08-24 13:13 ` Peter Zijlstra
2018-08-24 13:14 ` Peter Zijlstra
2018-08-24 15:49 ` Will Deacon
2018-08-23 23:31 ` Will Deacon
2018-08-22 21:34 ` Linus Torvalds
2018-08-23 8:46 ` Nicholas Piggin
2018-08-22 15:30 ` [PATCH 4/4] x86/mm: Only use tlb_remove_table() for paravirt Peter Zijlstra
2018-08-22 22:12 ` Eduardo Valentin
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