From: Palmer Dabbelt <palmer@sifive.com>
To: linux-riscv@lists.infradead.org
Cc: Palmer Dabbelt <palmer@sifive.com>,
aou@eecs.berkeley.edu, daniel.lezcano@linaro.org,
tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com,
atish.patra@wdc.com, dmitriy@oss-tech.org,
catalin.marinas@arm.com, ard.biesheuvel@linaro.org,
Greg KH <gregkh@linuxfoundation.org>,
jeremy.linton@arm.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 6/8] RISC-V: Use mmgrab()
Date: Mon, 27 Aug 2018 11:42:41 -0700 [thread overview]
Message-ID: <20180827184243.25344-7-palmer@sifive.com> (raw)
In-Reply-To: <20180827184243.25344-1-palmer@sifive.com>
f1f1007644ff ("mm: add new mmgrab() helper") added a helper that we
missed out on.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
arch/riscv/kernel/smpboot.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index e1f6a5ad0416..5437a04babcd 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -30,6 +30,7 @@
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/sched/task_stack.h>
+#include <linux/sched/mm.h>
#include <asm/irq.h>
#include <asm/mmu_context.h>
#include <asm/tlbflush.h>
@@ -79,8 +80,8 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
* the spinning harts that they can continue the boot process.
*/
smp_mb();
- __cpu_up_stack_pointer[cpu] = task_stack_page(tidle) + THREAD_SIZE;
- __cpu_up_task_pointer[cpu] = tidle;
+ WRITE_ONCE(__cpu_up_stack_pointer[cpu], task_stack_page(tidle) + THREAD_SIZE);
+ WRITE_ONCE(__cpu_up_task_pointer[cpu], tidle);
while (!cpu_online(cpu))
cpu_relax();
@@ -100,7 +101,7 @@ asmlinkage void __init smp_callin(void)
struct mm_struct *mm = &init_mm;
/* All kernel threads share the same mm context. */
- atomic_inc(&mm->mm_count);
+ mmgrab(mm);
current->active_mm = mm;
trap_init();
--
2.16.4
next prev parent reply other threads:[~2018-08-27 18:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-27 18:42 [PATCH 0/8] RISC-V: Assorted Cleanups Palmer Dabbelt
2018-08-27 18:42 ` [PATCH 1/8] RISC-V: Provide a cleaner raw_smp_processor_id() Palmer Dabbelt
2018-08-30 14:37 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Palmer Dabbelt
2018-08-30 14:38 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Christoph Hellwig
2018-08-30 19:50 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Jeremy Linton
2018-08-27 18:42 ` [PATCH 3/8] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Palmer Dabbelt
2018-08-28 18:50 ` Atish Patra
2018-08-30 14:40 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 4/8] RISC-V: Filter ISA and MMU values in cpuinfo Palmer Dabbelt
2018-08-27 18:42 ` [PATCH 5/8] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Palmer Dabbelt
2018-08-30 14:41 ` Christoph Hellwig
2018-08-30 16:11 ` Atish Patra
2018-08-31 5:54 ` Christoph Hellwig
2018-08-31 21:18 ` Atish Patra
2018-09-06 9:45 ` Palmer Dabbelt
2018-09-06 9:45 ` Palmer Dabbelt
2018-08-27 18:42 ` Palmer Dabbelt [this message]
2018-08-30 14:41 ` [PATCH 6/8] RISC-V: Use mmgrab() Christoph Hellwig
2018-08-27 18:42 ` [PATCH 7/8] RISC-V: Comment on the TLB flush in smp_callin() Palmer Dabbelt
2018-08-30 14:42 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 8/8] RISC-V: Disable preemption before enabling interrupts when booting secondary harts Palmer Dabbelt
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