From: Palmer Dabbelt <palmer@sifive.com>
To: atish.patra@wdc.com
Cc: Christoph Hellwig <hch@infradead.org>,
linux-riscv@lists.infradead.org, daniel.lezcano@linaro.org,
jason@lakedaemon.net, ard.biesheuvel@linaro.org,
marc.zyngier@arm.com, catalin.marinas@arm.com,
dmitriy@oss-tech.org, jeremy.linton@arm.com,
linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu,
Greg KH <gregkh@linuxfoundation.org>,
tglx@linutronix.de
Subject: Re: [PATCH 5/8] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu
Date: Thu, 06 Sep 2018 02:45:06 -0700 (PDT) [thread overview]
Message-ID: <mhng-aa617456-63d1-4275-8032-126a6b21305c@palmer-si-x1c4> (raw)
In-Reply-To: <30229ef5-ce4e-e78b-32f9-7c563f63827b@wdc.com>
On Thu, 30 Aug 2018 09:11:11 PDT (-0700), atish.patra@wdc.com wrote:
> On 8/30/18 7:41 AM, Christoph Hellwig wrote:
>>> struct device_node *dn = NULL;
>>> - int hart, im_okay_therefore_i_am = 0;
>>> + int hart, found_boot_cpu = 0;
>>
>> If you rename this anyway please switch to use a bool.
>>
>
> I can address the comment on this patch and fold it in my series to
> avoid unnecessary conflict.
>
> @Palmer: You can drop this patch.
Thanks!
next prev parent reply other threads:[~2018-09-06 9:45 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-27 18:42 [PATCH 0/8] RISC-V: Assorted Cleanups Palmer Dabbelt
2018-08-27 18:42 ` [PATCH 1/8] RISC-V: Provide a cleaner raw_smp_processor_id() Palmer Dabbelt
2018-08-30 14:37 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Palmer Dabbelt
2018-08-30 14:38 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition, attributes} Christoph Hellwig
2018-08-30 19:50 ` [PATCH 2/8] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes} Jeremy Linton
2018-08-27 18:42 ` [PATCH 3/8] RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid Palmer Dabbelt
2018-08-28 18:50 ` Atish Patra
2018-08-30 14:40 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 4/8] RISC-V: Filter ISA and MMU values in cpuinfo Palmer Dabbelt
2018-08-27 18:42 ` [PATCH 5/8] RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Palmer Dabbelt
2018-08-30 14:41 ` Christoph Hellwig
2018-08-30 16:11 ` Atish Patra
2018-08-31 5:54 ` Christoph Hellwig
2018-08-31 21:18 ` Atish Patra
2018-09-06 9:45 ` Palmer Dabbelt
2018-09-06 9:45 ` Palmer Dabbelt [this message]
2018-08-27 18:42 ` [PATCH 6/8] RISC-V: Use mmgrab() Palmer Dabbelt
2018-08-30 14:41 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 7/8] RISC-V: Comment on the TLB flush in smp_callin() Palmer Dabbelt
2018-08-30 14:42 ` Christoph Hellwig
2018-08-27 18:42 ` [PATCH 8/8] RISC-V: Disable preemption before enabling interrupts when booting secondary harts Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=mhng-aa617456-63d1-4275-8032-126a6b21305c@palmer-si-x1c4 \
--to=palmer@sifive.com \
--cc=aou@eecs.berkeley.edu \
--cc=ard.biesheuvel@linaro.org \
--cc=atish.patra@wdc.com \
--cc=catalin.marinas@arm.com \
--cc=daniel.lezcano@linaro.org \
--cc=dmitriy@oss-tech.org \
--cc=gregkh@linuxfoundation.org \
--cc=hch@infradead.org \
--cc=jason@lakedaemon.net \
--cc=jeremy.linton@arm.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=marc.zyngier@arm.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).