* [PATCH 01/31] ARM: tegra: colibri_t20: move aliases from module to carrier board
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 02/31] ARM: tegra: colibri_t20: iris: integrate i2c real time clock support Marcel Ziswiler
` (29 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Move RTC aliases from module to carrier board to be more in-line with
all our other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 5 -----
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 57f16c0e9917..496b96e229d2 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -8,6 +8,8 @@
compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
aliases {
+ rtc0 = "/i2c@7000d000/tps6586x@34";
+ rtc1 = "/rtc@7000e000";
serial0 = &uarta;
serial1 = &uartd;
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index fa1af2dc276c..e34ab4a76158 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -5,11 +5,6 @@
model = "Toradex Colibri T20 256/512 MB";
compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
- aliases {
- rtc0 = "/i2c@7000d000/tps6586x@34";
- rtc1 = "/rtc@7000e000";
- };
-
memory@0 {
/*
* Set memory to 256 MB to be safe as this could be used on
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 02/31] ARM: tegra: colibri_t20: iris: integrate i2c real time clock support
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 01/31] ARM: tegra: colibri_t20: move aliases from module to carrier board Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 03/31] ARM: tegra: colibri_t20: iris: annotate i2c busses Marcel Ziswiler
` (28 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Integrate support for GEN1_I2C aka I2C_SDA/SCL on SODIMM pin 194/196 and
the M41T0M6 real time clock on the carrier board.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 496b96e229d2..b6d05da8c93c 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -56,6 +56,21 @@
status = "okay";
};
+ /*
+ * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
+ * board)
+ */
+ i2c@7000c000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+ };
+
i2c_ddc: i2c@7000c400 {
status = "okay";
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 03/31] ARM: tegra: colibri_t20: iris: annotate i2c busses
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 01/31] ARM: tegra: colibri_t20: move aliases from module to carrier board Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 02/31] ARM: tegra: colibri_t20: iris: integrate i2c real time clock support Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 04/31] ARM: tegra: colibri_t20: iris: add missing aliases Marcel Ziswiler
` (27 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate I2C busses: GEN2_I2C and CAM_I2C (I2C3) being unused and
DDC_CLOCK/DATA on X3 pin 15/16 e.g. used for display EDID.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index b6d05da8c93c..cbf1f4d76813 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -8,10 +8,12 @@
compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
aliases {
- rtc0 = "/i2c@7000d000/tps6586x@34";
- rtc1 = "/rtc@7000e000";
+ rtc0 = "/i2c@7000c000/rtc@68";
+ rtc1 = "/i2c@7000d000/tps6586x@34";
+ rtc2 = "/rtc@7000e000";
serial0 = &uarta;
serial1 = &uartd;
+ serial2 = &uartb;
};
chosen {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 04/31] ARM: tegra: colibri_t20: iris: add missing aliases
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (2 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 03/31] ARM: tegra: colibri_t20: iris: annotate i2c busses Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 05/31] ARM: tegra: colibri_t20: add local-mac-address property Marcel Ziswiler
` (26 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add rtc0 being the ultra low-power I2C one as found on the carrier board
and the 3rd UART being NVIDIA's UARTB.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index cbf1f4d76813..cc9e372a3b58 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -73,6 +73,11 @@
};
};
+ /* GEN2_I2C: unused */
+
+ /* CAM_I2C (I2C3): unused */
+
+ /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
i2c_ddc: i2c@7000c400 {
status = "okay";
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 05/31] ARM: tegra: colibri_t20: add local-mac-address property
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (3 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 04/31] ARM: tegra: colibri_t20: iris: add missing aliases Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 06/31] ARM: tegra: colibri_t20: reorder host1x/hdmi properties Marcel Ziswiler
` (25 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add empty local-mac-address property to be filled in by boot loader
(e.g. U-Boot).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index e34ab4a76158..ad816fa827f7 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -482,6 +482,13 @@
status = "okay";
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ asix@1 {
+ reg = <1>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
};
usb-phy@c5004000 {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 06/31] ARM: tegra: colibri_t20: reorder host1x/hdmi properties
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (4 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 05/31] ARM: tegra: colibri_t20: add local-mac-address property Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 07/31] ARM: tegra: colibri_t20: iris: use no-1-8-v Marcel Ziswiler
` (24 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reorder Host1x/HDMI properties.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index ad816fa827f7..c060b58cb490 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -16,12 +16,11 @@
host1x@50000000 {
hdmi@54280000 {
- vdd-supply = <&hdmi_vdd_reg>;
- pll-supply = <&hdmi_pll_reg>;
-
nvidia,ddc-i2c-bus = <&i2c_ddc>;
- nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
- GPIO_ACTIVE_HIGH>;
+ nvidia,hpd-gpio =
+ <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+ pll-supply = <&hdmi_pll_reg>;
+ vdd-supply = <&hdmi_vdd_reg>;
};
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 07/31] ARM: tegra: colibri_t20: iris: use no-1-8-v
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (5 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 06/31] ARM: tegra: colibri_t20: reorder host1x/hdmi properties Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 08/31] ARM: tegra: colibri_t20: regulator clean-up Marcel Ziswiler
` (23 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Use no-1-8-v property rather than vmmc/vqmmc supplies and drop now
obsolete and anyway non-existent vcc_sd.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index cc9e372a3b58..3d430fa93e8c 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -101,8 +101,7 @@
sdhci@c8000600 {
status = "okay";
bus-width = <4>;
- vmmc-supply = <&vcc_sd_reg>;
- vqmmc-supply = <&vcc_sd_reg>;
+ no-1-8-v;
};
regulators {
@@ -116,15 +115,5 @@
regulator-always-on;
gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
};
-
- vcc_sd_reg: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "vcc_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
};
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 08/31] ARM: tegra: colibri_t20: regulator clean-up
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (6 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 07/31] ARM: tegra: colibri_t20: iris: use no-1-8-v Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 09/31] ARM: tegra: colibri_t20: add missing regulators Marcel Ziswiler
` (22 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Just cosmetic regulator clean-up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 20 ++--
arch/arm/boot/dts/tegra20-colibri.dtsi | 147 +++++++++++------------------
2 files changed, 66 insertions(+), 101 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 3d430fa93e8c..6f89a417b0f2 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -104,16 +104,14 @@
no-1-8-v;
};
- regulators {
- regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "usb_host_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-boot-on;
- regulator-always-on;
- gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
- };
+ /* USBH_PEN resp. USB_P_EN */
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_USB1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index c060b58cb490..1cf64f197c08 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -19,8 +19,8 @@
nvidia,ddc-i2c-bus = <&i2c_ddc>;
nvidia,hpd-gpio =
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
- pll-supply = <&hdmi_pll_reg>;
- vdd-supply = <&hdmi_vdd_reg>;
+ pll-supply = <®_1v8_avdd_hdmi_pll>;
+ vdd-supply = <®_3v3_avdd_hdmi>;
};
};
@@ -260,49 +260,38 @@
#gpio-cells = <2>;
gpio-controller;
- sys-supply = <&vdd_3v3_reg>;
- vin-sm0-supply = <&sys_reg>;
- vin-sm1-supply = <&sys_reg>;
- vin-sm2-supply = <&sys_reg>;
- vinldo01-supply = <&sm2_reg>;
- vinldo23-supply = <&vdd_3v3_reg>;
- vinldo4-supply = <&vdd_3v3_reg>;
- vinldo678-supply = <&vdd_3v3_reg>;
- vinldo9-supply = <&vdd_3v3_reg>;
+ sys-supply = <®_module_3v3>;
+ vin-sm0-supply = <®_3v3_vsys>;
+ vin-sm1-supply = <®_3v3_vsys>;
+ vin-sm2-supply = <®_3v3_vsys>;
+ vinldo01-supply = <®_1v8_vdd_ddr2>;
+ vinldo23-supply = <®_module_3v3>;
+ vinldo4-supply = <®_module_3v3>;
+ vinldo678-supply = <®_module_3v3>;
+ vinldo9-supply = <®_module_3v3>;
regulators {
- #address-cells = <1>;
- #size-cells = <0>;
-
- sys_reg: regulator@0 {
- reg = <0>;
- regulator-compatible = "sys";
- regulator-name = "vdd_sys";
+ reg_3v3_vsys: sys {
+ regulator-name = "VSYS_3.3V";
regulator-always-on;
};
- regulator@1 {
- reg = <1>;
- regulator-compatible = "sm0";
- regulator-name = "vdd_sm0,vdd_core";
+ sm0 {
+ regulator-name = "VDD_CORE_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
- regulator@2 {
- reg = <2>;
- regulator-compatible = "sm1";
- regulator-name = "vdd_sm1,vdd_cpu";
+ sm1 {
+ regulator-name = "VDD_CPU_1.0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
- sm2_reg: regulator@3 {
- reg = <3>;
- regulator-compatible = "sm2";
- regulator-name = "vdd_sm2,vin_ldo*";
+ reg_1v8_vdd_ddr2: sm2 {
+ regulator-name = "VDD_DDR2_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
@@ -310,80 +299,68 @@
/* LDO0 is not connected to anything */
- regulator@5 {
- reg = <5>;
- regulator-compatible = "ldo1";
- regulator-name = "vdd_ldo1,avdd_pll*";
+ /*
+ * +3.3V_ENABLE_N switching via FET:
+ * AVDD_AUDIO_S and +3.3V
+ * see also +3.3V fixed supply
+ */
+ ldo1 {
+ regulator-name = "AVDD_PLL_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
- regulator@6 {
- reg = <6>;
- regulator-compatible = "ldo2";
- regulator-name = "vdd_ldo2,vdd_rtc";
+ ldo2 {
+ regulator-name = "VDD_RTC_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
/* LDO3 is not connected to anything */
- regulator@8 {
- reg = <8>;
- regulator-compatible = "ldo4";
- regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
+ ldo4 {
+ regulator-name = "VDDIO_SYS_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
- ldo5_reg: regulator@9 {
- reg = <9>;
- regulator-compatible = "ldo5";
- regulator-name = "vdd_ldo5,vdd_fuse";
+ /* Switched via FET from regular +3.3V */
+ ldo5 {
+ regulator-name = "+3.3V_USB";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
- regulator@10 {
- reg = <10>;
- regulator-compatible = "ldo6";
- regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
+ ldo6 {
+ regulator-name = "AVDD_VDAC_2.85V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
- hdmi_vdd_reg: regulator@11 {
- reg = <11>;
- regulator-compatible = "ldo7";
- regulator-name = "vdd_ldo7,avdd_hdmi";
+ reg_3v3_avdd_hdmi: ldo7 {
+ regulator-name = "AVDD_HDMI_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
- hdmi_pll_reg: regulator@12 {
- reg = <12>;
- regulator-compatible = "ldo8";
- regulator-name = "vdd_ldo8,avdd_hdmi_pll";
+ reg_1v8_avdd_hdmi_pll: ldo8 {
+ regulator-name = "AVDD_HDMI_PLL_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
- regulator@13 {
- reg = <13>;
- regulator-compatible = "ldo9";
- regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
+ ldo9 {
+ regulator-name = "VDDIO_RX_DDR_2.85V";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
- regulator@14 {
- reg = <14>;
- regulator-compatible = "ldo_rtc";
- regulator-name = "vdd_rtc_out,vdd_cell";
+ ldo_rtc {
+ regulator-name = "VCC_BATT";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
@@ -513,31 +490,21 @@
};
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd_3v3_reg: regulator@100 {
- compatible = "regulator-fixed";
- reg = <100>;
- regulator-name = "vdd_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+ reg_lan_v_bus: regulator-lan-v-bus {
+ compatible = "regulator-fixed";
+ regulator-name = "LAN_V_BUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
+ };
- regulator@101 {
- compatible = "regulator-fixed";
- reg = <101>;
- regulator-name = "internal_usb";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-boot-on;
- regulator-always-on;
- gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
- };
+ reg_module_3v3: regulator-module-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "+V3.3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
};
sound {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 09/31] ARM: tegra: colibri_t20: add missing regulators
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (7 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 08/31] ARM: tegra: colibri_t20: regulator clean-up Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 10/31] ARM: tegra: colibri_t20: annotate usb ehci instances Marcel Ziswiler
` (21 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add missing regulators:
- reg_lan_v_bus being USB Ethernet chip vbus supply
- carrier board reg_3v3 to be used as backlight and panel power supply
- carrier board HDMI supply being reg_5v0
- reg_usbc_vbus being the USB vbus supply of the EHCI instance 0
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 28 ++++++++++++++++++++++++++--
arch/arm/boot/dts/tegra20-colibri.dtsi | 1 +
2 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 6f89a417b0f2..9f0a819c68f2 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -23,6 +23,7 @@
host1x@50000000 {
hdmi@54280000 {
status = "okay";
+ hdmi-supply = <®_5v0>;
};
};
@@ -88,6 +89,7 @@
usb-phy@c5000000 {
status = "okay";
+ vbus-supply = <®_usbc_vbus>;
};
usb@c5008000 {
@@ -96,6 +98,7 @@
usb-phy@c5008000 {
status = "okay";
+ vbus-supply = <®_usbh_vbus>;
};
sdhci@c8000600 {
@@ -104,14 +107,35 @@
no-1-8-v;
};
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_usbc_vbus: regulator-usbc-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_USB2";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_5v0>;
+ };
+
/* USBH_PEN resp. USB_P_EN */
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
regulator-name = "VCC_USB1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- regulator-boot-on;
- regulator-always-on;
gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ vin-supply = <®_5v0>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 1cf64f197c08..5e98f225322b 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -471,6 +471,7 @@
status = "okay";
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
+ vbus-supply = <®_lan_v_bus>;
};
sdhci@c8000600 {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 10/31] ARM: tegra: colibri_t20: annotate usb ehci instances
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (8 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 09/31] ARM: tegra: colibri_t20: add missing regulators Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 11/31] ARM: tegra: colibri_t20: remove phy-reset-gpio from controller node Marcel Ziswiler
` (20 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate USB EHCI instances.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 9f0a819c68f2..194f40646a83 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -83,6 +83,7 @@
status = "okay";
};
+ /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@c5000000 {
status = "okay";
};
@@ -92,6 +93,7 @@
vbus-supply = <®_usbc_vbus>;
};
+ /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
usb@c5008000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 5e98f225322b..77e99caf5606 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -454,6 +454,7 @@
};
};
+ /* EHCI instance 1: ULPI PHY -> AX88772B (On-module) */
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 11/31] ARM: tegra: colibri_t20: remove phy-reset-gpio from controller node
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (9 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 10/31] ARM: tegra: colibri_t20: annotate usb ehci instances Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 12/31] ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-up Marcel Ziswiler
` (19 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Remove the phy-reset-gpio from the USB controller node as it is already
specified in the PHY node.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 77e99caf5606..06d0be29c0b4 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -457,8 +457,6 @@
/* EHCI instance 1: ULPI PHY -> AX88772B (On-module) */
usb@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
- GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 12/31] ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-up
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (10 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 11/31] ARM: tegra: colibri_t20: remove phy-reset-gpio from controller node Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 13/31] ARM: tegra: colibri_t20: update sound nvidia,model Marcel Ziswiler
` (18 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cleaning up indentation, line-feed and white-space.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 06d0be29c0b4..5559008efc5f 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -206,10 +206,10 @@
ac97: ac97@70002000 {
status = "okay";
- nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
- GPIO_ACTIVE_HIGH>;
- nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
- GPIO_ACTIVE_HIGH>;
+ nvidia,codec-reset-gpio =
+ <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
+ nvidia,codec-sync-gpio =
+ <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
};
nand-controller@70008000 {
@@ -254,12 +254,9 @@
compatible = "ti,tps6586x";
reg = <0x34>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-
ti,system-power-controller;
-
#gpio-cells = <2>;
gpio-controller;
-
sys-supply = <®_module_3v3>;
vin-sm0-supply = <®_3v3_vsys>;
vin-sm1-supply = <®_3v3_vsys>;
@@ -468,8 +465,8 @@
usb-phy@c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
- GPIO_ACTIVE_LOW>;
+ nvidia,phy-reset-gpio =
+ <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
vbus-supply = <®_lan_v_bus>;
};
@@ -511,16 +508,13 @@
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
"nvidia,tegra-audio-wm9712";
nvidia,model = "Colibri T20 AC97 Audio";
-
nvidia,audio-routing =
"Headphone", "HPOUTL",
"Headphone", "HPOUTR",
"LineIn", "LINEINL",
"LineIn", "LINEINR",
"Mic", "MIC1";
-
nvidia,ac97-controller = <&ac97>;
-
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA20_CLK_CDEV1>;
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 13/31] ARM: tegra: colibri_t20: update sound nvidia,model
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (11 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 12/31] ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-up Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 14/31] ARM: tegra: colibri_t20: pinmux clean-up Marcel Ziswiler
` (17 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Update sound nvidia,model to be more in-line with our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 5559008efc5f..ba84184e09b8 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -507,7 +507,7 @@
sound {
compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
"nvidia,tegra-audio-wm9712";
- nvidia,model = "Colibri T20 AC97 Audio";
+ nvidia,model = "Toradex Colibri T20";
nvidia,audio-routing =
"Headphone", "HPOUTL",
"Headphone", "HPOUTR",
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 14/31] ARM: tegra: colibri_t20: pinmux clean-up
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (12 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 13/31] ARM: tegra: colibri_t20: update sound nvidia,model Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 15/31] ARM: tegra: colibri_t20: add missing pinmux Marcel Ziswiler
` (16 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Just cosmetic pinmux clean-up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 10 +-
arch/arm/boot/dts/tegra20-colibri.dtsi | 283 ++++++++++++++++++++---------
2 files changed, 200 insertions(+), 93 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 194f40646a83..f2f01b0d9336 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -29,23 +29,23 @@
pinmux@70000014 {
state_default: pinmux {
- hdint {
+ ddc {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- i2cddc {
+ hotplug_detect {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- sdio4 {
+ mmc {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- uarta {
+ uart_a {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- uartd {
+ uart_b {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index ba84184e09b8..2e6ecc3040f7 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -29,175 +29,282 @@
pinctrl-0 = <&state_default>;
state_default: pinmux {
+ /* Analogue Audio AC97 to WM9712 (On-module) */
audio_refclk {
nvidia,pins = "cdev1";
nvidia,function = "plla_out";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- crt {
- nvidia,pins = "crtp";
- nvidia,function = "crt";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
- };
dap3 {
nvidia,pins = "dap3";
nvidia,function = "dap3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- displaya {
- nvidia,pins = "ld0", "ld1", "ld2", "ld3",
- "ld4", "ld5", "ld6", "ld7", "ld8",
- "ld9", "ld10", "ld11", "ld12", "ld13",
- "ld14", "ld15", "ld16", "ld17",
- "lhs", "lpw0", "lpw2", "lsc0",
- "lsc1", "lsck", "lsda", "lspi", "lvs";
- nvidia,function = "displaya";
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
- };
- gpio_dte {
- nvidia,pins = "dte";
- nvidia,function = "rsvd1";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- };
- gpio_gmi {
- nvidia,pins = "ata", "atc", "atd", "ate",
- "dap1", "dap2", "dap4", "gpu", "irrx",
- "irtx", "spia", "spib", "spic";
- nvidia,function = "gmi";
+
+ /*
+ * AC97_RESET, ULPI_RESET, AC97_INT aka WM9712 GENIRQ
+ * (All on-module), SODIMM Pin 45 Wakeup
+ */
+ gpio_uac {
+ nvidia,pins = "uac";
+ nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+
+ /*
+ * Buffer Enables for nPWE and RDnWR (On-module,
+ * see GPIO hogging further down below)
+ */
gpio_pta {
nvidia,pins = "pta";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- gpio_uac {
- nvidia,pins = "uac";
- nvidia,function = "rsvd2";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+
+ /*
+ * CLK_32K_OUT, CORE_PWR_REQ, CPU_PWR_REQ, PWR_INT_N,
+ * SYS_CLK_REQ (All on-module)
+ */
+ pmc {
+ nvidia,pins = "pmc";
+ nvidia,function = "pwr_on";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- hdint {
- nvidia,pins = "hdint";
- nvidia,function = "hdmi";
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+
+ /* Colibri Address/Data Bus (GMI) */
+ gpio_gmi {
+ nvidia,pins = "ata", "atc", "atd", "ate",
+ "dap1", "dap2", "dap4", "gpu", "irrx",
+ "irtx", "spia", "spib", "spic";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- i2c1 {
- nvidia,pins = "rm";
- nvidia,function = "i2c1";
+
+ /* Colibri BL_ON */
+ bl_on {
+ nvidia,pins = "dta";
+ nvidia,function = "vi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- i2c3 {
- nvidia,pins = "dtf";
- nvidia,function = "i2c3";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+
+ /* Colibri Backlight PWM<A>, PWM<B> */
+ pwm_a_b {
+ nvidia,pins = "sdc";
+ nvidia,function = "pwm";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- i2cddc {
+
+ /* Colibri DDC */
+ ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- i2cp {
- nvidia,pins = "i2cp";
- nvidia,function = "i2cp";
+
+ /*
+ * Colibri EXT_IO*
+ * Note: dtf optionally used for I2C3
+ */
+ ext_io {
+ nvidia,pins = "dtf";
+ nvidia,function = "i2c3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- irda {
- nvidia,pins = "uad";
- nvidia,function = "irda";
+
+ /*
+ * Colibri Ethernet (On-module)
+ * ULPI EHCI instance 1 USB2_DP/N -> AX88772B
+ */
+ ulpi {
+ nvidia,pins = "uaa", "uab", "uda";
+ nvidia,function = "ulpi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- nand {
- nvidia,pins = "kbca", "kbcc", "kbcd",
- "kbce", "kbcf";
- nvidia,function = "nand";
+ ulpi_refclk {
+ nvidia,pins = "cdev2";
+ nvidia,function = "pllp_out4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- owc {
- nvidia,pins = "owc";
- nvidia,function = "owr";
+
+ /* Colibri HOTPLUG_DETECT (HDMI) */
+ hotplug_detect {
+ nvidia,pins = "hdint";
+ nvidia,function = "hdmi";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri I2C */
+ i2c {
+ nvidia,pins = "rm";
+ nvidia,function = "i2c1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- pmc {
- nvidia,pins = "pmc";
- nvidia,function = "pwr_on";
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+
+ /* Colibri LCD (L_* resp. LDD<*>) */
+ lcd {
+ nvidia,pins = "ld0", "ld1", "ld2", "ld3",
+ "ld4", "ld5", "ld6", "ld7",
+ "ld8", "ld9", "ld10", "ld11",
+ "ld12", "ld13", "ld14", "ld15",
+ "ld16", "ld17", "lhs", "lpw0",
+ "lpw2", "lsc0", "lsc1", "lsck",
+ "lsda", "lspi", "lvs";
+ nvidia,function = "displaya";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- pwm {
- nvidia,pins = "sdb", "sdc", "sdd";
- nvidia,function = "pwm";
+
+ /* Colibri MMC */
+ mmc {
+ nvidia,pins = "atb", "gma";
+ nvidia,function = "sdio4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- sdio4 {
- nvidia,pins = "atb", "gma", "gme";
+
+ /* Colibri MMC (Optional 8-bit) */
+ mmc_8bit {
+ nvidia,pins = "gme";
nvidia,function = "sdio4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- spi1 {
- nvidia,pins = "spid", "spie", "spif";
- nvidia,function = "spi1";
+
+ /*
+ * Colibri Parallel Camera (Optional)
+ * pins multiplexed with others and therefore disabled
+ * Note: dta used for BL_ON by default
+ */
+ cif_mclk {
+ nvidia,pins = "csus";
+ nvidia,function = "vi_sensor_clk";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- spi4 {
+ cif {
+ nvidia,pins = "dtb", "dtc", "dtd";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri PWM<C>, PWM<D> */
+ pwm_c_d {
+ nvidia,pins = "sdb", "sdd";
+ nvidia,function = "pwm";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Colibri SSP */
+ ssp {
nvidia,pins = "slxa", "slxc", "slxd", "slxk";
nvidia,function = "spi4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- uarta {
+
+ /* Colibri UART-A */
+ uart_a {
nvidia,pins = "sdio1";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- uartd {
+
+ /* Colibri UART-B */
+ uart_b {
nvidia,pins = "gmc";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- ulpi {
- nvidia,pins = "uaa", "uab", "uda";
- nvidia,function = "ulpi";
+
+ /* Colibri UART-C */
+ uart_c {
+ nvidia,pins = "uad";
+ nvidia,function = "irda";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- ulpi_refclk {
- nvidia,pins = "cdev2";
- nvidia,function = "pllp_out4";
+
+ /* Colibri USBH_OC */
+ usbh_oc {
+ nvidia,pins = "spih";
+ nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- usb_gpio {
- nvidia,pins = "spig", "spih";
+
+ /* Colibri USBH_PEN */
+ usbh_pen {
+ nvidia,pins = "spig";
nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- vi {
- nvidia,pins = "dta", "dtb", "dtc", "dtd";
- nvidia,function = "vi";
+
+ /* Colibri VGA not supported */
+ vga {
+ nvidia,pins = "crtp";
+ nvidia,function = "crt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
- vi_sc {
- nvidia,pins = "csus";
- nvidia,function = "vi_sensor_clk";
+
+ /*
+ * LAN_V_BUS, VDD_FAULT, BATT_FAULT, WM9712 PENDOWN
+ * (All On-module); Colibri CAN_INT
+ */
+ gpio_dte {
+ nvidia,pins = "dte";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* NAND (On-module) */
+ nand {
+ nvidia,pins = "kbca", "kbcc", "kbcd",
+ "kbce", "kbcf";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Onewire (Optional) */
+ owr {
+ nvidia,pins = "owc";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Power I2C (On-module) */
+ i2cp {
+ nvidia,pins = "i2cp";
+ nvidia,function = "i2cp";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ /*
+ * SPI1 (Optional)
+ * Note: spid and spie used for Colibri Address/Data
+ * Bus (GMI)
+ */
+ spi1 {
+ nvidia,pins = "spid", "spie", "spif";
+ nvidia,function = "spi1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 15/31] ARM: tegra: colibri_t20: add missing pinmux
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (13 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 14/31] ARM: tegra: colibri_t20: pinmux clean-up Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 16/31] ARM: tegra: colibri_t20: iris: display controller rgb panel support Marcel Ziswiler
` (15 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Explicitly add pinmux' for all T20 SoC ball groups now:
- Colibri Address/Data Bus (GMI) further pins used as GPIOs
- Colibri BL_ON
- Colibri EXT_IO*
- Colibri L_BIAS, LCD_M1 is muxed with LCD_DE today's display need DE,
disable LCD_M1
- more Colibri LCD pins (L_* resp. LDD<*>)
- Colibri LCD (Optional 24 BPP Support)
- Colibri MMCCD
- uart_a_dsr and uart_a_dcd as GPIOs
- Colibri USB_CDET
- I2C3 (Optional)
- JTAG_RTCK
- LAN_RESET, LAN_EXT_WAKEUP and LAN_PME (All On-module)
- more NAND pins
- RESET_OUT
- THERMD_ALERT# (On-module), unlatched I2C address pin of LM95245
temperature sensor therefore requires disabling for now
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 40 +++++++++
arch/arm/boot/dts/tegra20-colibri.dtsi | 134 +++++++++++++++++++++++++----
2 files changed, 159 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index f2f01b0d9336..be531d4c2ae8 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -29,6 +29,10 @@
pinmux@70000014 {
state_default: pinmux {
+ bl_on {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
ddc {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@@ -37,10 +41,38 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ i2c {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ lcd {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ lm1 {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
mmc {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ mmccd {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ pwm_a_b {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ pwm_c_d {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ ssp {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
uart_a {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
@@ -48,6 +80,14 @@
uart_b {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+
+ uart_c {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ usbh_pen {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
};
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 2e6ecc3040f7..a7403ce9ee99 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -75,20 +75,36 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
- /* Colibri Address/Data Bus (GMI) */
- gpio_gmi {
- nvidia,pins = "ata", "atc", "atd", "ate",
- "dap1", "dap2", "dap4", "gpu", "irrx",
- "irtx", "spia", "spib", "spic";
+ /*
+ * Colibri Address/Data Bus (GMI)
+ * Note: spid and spie optionally used for SPI1
+ */
+ gmi {
+ nvidia,pins = "atc", "atd", "ate", "dap1",
+ "dap2", "dap4", "gmd", "gpu",
+ "irrx", "irtx", "spia", "spib",
+ "spic", "spid", "spie", "uca",
+ "ucb";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ /* Further pins may be used as GPIOs */
+ gmi_gpio1 {
+ nvidia,pins = "lpw0", "lsc1", "lsck", "lsda";
+ nvidia,function = "hdmi";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_gpio2 {
+ nvidia,pins = "lcsn", "ldc", "lm0", "lsdi";
+ nvidia,function = "rsvd4";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri BL_ON */
bl_on {
nvidia,pins = "dta";
- nvidia,function = "vi";
+ nvidia,function = "rsvd1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
@@ -113,8 +129,8 @@
* Note: dtf optionally used for I2C3
*/
ext_io {
- nvidia,pins = "dtf";
- nvidia,function = "i2c3";
+ nvidia,pins = "dtf", "spdi";
+ nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
@@ -151,15 +167,31 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+ /*
+ * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
+ * today's display need DE, disable LCD_M1
+ */
+ lm1 {
+ nvidia,pins = "lm1";
+ nvidia,function = "rsvd3";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
/* Colibri LCD (L_* resp. LDD<*>) */
lcd {
nvidia,pins = "ld0", "ld1", "ld2", "ld3",
"ld4", "ld5", "ld6", "ld7",
"ld8", "ld9", "ld10", "ld11",
"ld12", "ld13", "ld14", "ld15",
- "ld16", "ld17", "lhs", "lpw0",
- "lpw2", "lsc0", "lsc1", "lsck",
- "lsda", "lspi", "lvs";
+ "ld16", "ld17", "lhs", "lsc0",
+ "lspi", "lvs";
+ nvidia,function = "displaya";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ /* Colibri LCD (Optional 24 BPP Support) */
+ lcd_24 {
+ nvidia,pins = "ldi", "lhp0", "lhp1", "lhp2",
+ "lpp", "lvp1";
nvidia,function = "displaya";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
@@ -172,6 +204,14 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+ /* Colibri MMCCD */
+ mmccd {
+ nvidia,pins = "gmb";
+ nvidia,function = "gmi_int";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
/* Colibri MMC (Optional 8-bit) */
mmc_8bit {
nvidia,pins = "gme";
@@ -220,6 +260,16 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+ uart_a_dsr {
+ nvidia,pins = "lpw1";
+ nvidia,function = "rsvd3";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+ uart_a_dcd {
+ nvidia,pins = "lpw2";
+ nvidia,function = "hdmi";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
/* Colibri UART-B */
uart_b {
@@ -237,12 +287,20 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+ /* Colibri USB_CDET */
+ usb_cdet {
+ nvidia,pins = "spdo";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
/* Colibri USBH_OC */
usbh_oc {
nvidia,pins = "spih";
nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri USBH_PEN */
@@ -250,7 +308,7 @@
nvidia,pins = "spig";
nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
/* Colibri VGA not supported */
@@ -261,6 +319,33 @@
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+ /* I2C3 (Optional) */
+ i2c3 {
+ nvidia,pins = "dtf";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* JTAG_RTCK */
+ jtag_rtck {
+ nvidia,pins = "gpu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
+
+ /*
+ * LAN_RESET, LAN_EXT_WAKEUP and LAN_PME
+ * (All On-module)
+ */
+ gpio_gpv {
+ nvidia,pins = "gpv";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
/*
* LAN_V_BUS, VDD_FAULT, BATT_FAULT, WM9712 PENDOWN
* (All On-module); Colibri CAN_INT
@@ -274,7 +359,7 @@
/* NAND (On-module) */
nand {
- nvidia,pins = "kbca", "kbcc", "kbcd",
+ nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
"kbce", "kbcf";
nvidia,function = "nand";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
@@ -297,6 +382,14 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
+ /* RESET_OUT */
+ reset_out {
+ nvidia,pins = "ata";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
/*
* SPI1 (Optional)
* Note: spid and spie used for Colibri Address/Data
@@ -308,6 +401,17 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
+
+ /*
+ * THERMD_ALERT# (On-module), unlatched I2C address pin
+ * of LM95245 temperature sensor therefore requires
+ * disabling for now
+ */
+ lvp0 {
+ nvidia,pins = "lvp0";
+ nvidia,function = "rsvd3";
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ };
};
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 16/31] ARM: tegra: colibri_t20: iris: display controller rgb panel support
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (14 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 15/31] ARM: tegra: colibri_t20: add missing pinmux Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 17/31] ARM: tegra: colibri_t20: iris: annotate uarts Marcel Ziswiler
` (14 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add display controller parallel RGB panel support incl. backlight PWM.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 31 ++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index be531d4c2ae8..e5e26a6c2861 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -21,6 +21,13 @@
};
host1x@50000000 {
+ dc@54200000 {
+ rgb {
+ status = "okay";
+ nvidia,panel = <&panel>;
+ };
+ };
+
hdmi@54280000 {
status = "okay";
hdmi-supply = <®_5v0>;
@@ -99,6 +106,10 @@
status = "okay";
};
+ pwm@7000a000 {
+ status = "okay";
+ };
+
/*
* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
* board)
@@ -149,6 +160,26 @@
no-1-8-v;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ brightness-levels = <255 128 64 32 16 8 4 0>;
+ default-brightness-level = <6>;
+ /* BL_ON */
+ enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
+ power-supply = <®_3v3>;
+ pwms = <&pwm 0 5000000>; /* PWM<A> */
+ };
+
+ panel: panel {
+ /*
+ * edt,et057090dhu: EDT 5.7" LCD TFT
+ * edt,et070080dh6: EDT 7.0" LCD TFT
+ */
+ compatible = "edt,et057090dhu", "simple-panel";
+ backlight = <&backlight>;
+ power-supply = <®_3v3>;
+ };
+
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 17/31] ARM: tegra: colibri_t20: iris: annotate uarts
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (15 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 16/31] ARM: tegra: colibri_t20: iris: display controller rgb panel support Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 18/31] ARM: tegra: colibri_t20: iris: add uart-c Marcel Ziswiler
` (13 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate UART-A and UART-B.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index e5e26a6c2861..96d633622f94 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -98,10 +98,12 @@
};
};
+ /* Colibri UART-A */
serial@70006000 {
status = "okay";
};
+ /* Colibri UART-B */
serial@70006300 {
status = "okay";
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 18/31] ARM: tegra: colibri_t20: iris: add uart-c
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (16 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 17/31] ARM: tegra: colibri_t20: iris: annotate uarts Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 19/31] ARM: tegra: colibri_t20: use high speed uart driver Marcel Ziswiler
` (12 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add UART-C.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 96d633622f94..a2364e39c131 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -103,6 +103,11 @@
status = "okay";
};
+ /* Colibri UART-C */
+ serial@70006040 {
+ status = "okay";
+ };
+
/* Colibri UART-B */
serial@70006300 {
status = "okay";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 19/31] ARM: tegra: colibri_t20: use high speed uart driver
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (17 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 18/31] ARM: tegra: colibri_t20: iris: add uart-c Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 20/31] ARM: tegra: colibri_t20: iris: add gpio wakeup key Marcel Ziswiler
` (11 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Use high speed UART driver compatible nvidia,tegra20-hsuart.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index a7403ce9ee99..3d61175e2a9c 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -423,6 +423,14 @@
<&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
};
+ serial@70006040 {
+ compatible = "nvidia,tegra20-hsuart";
+ };
+
+ serial@70006300 {
+ compatible = "nvidia,tegra20-hsuart";
+ };
+
nand-controller@70008000 {
status = "okay";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 20/31] ARM: tegra: colibri_t20: iris: add gpio wakeup key
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (18 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 19/31] ARM: tegra: colibri_t20: use high speed uart driver Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 21/31] ARM: tegra: colibri_t20: iris: add dr_mode property Marcel Ziswiler
` (10 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add SODIMM pin 45 as GPIO wakeup key.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index a2364e39c131..f615e3b9490f 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
+#include <dt-bindings/input/input.h>
#include "tegra20-colibri.dtsi"
/ {
@@ -177,6 +178,18 @@
pwms = <&pwm 0 5000000>; /* PWM<A> */
};
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ wakeup {
+ label = "SODIMM pin 45 wakeup";
+ gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ wakeup-source;
+ };
+ };
+
panel: panel {
/*
* edt,et057090dhu: EDT 5.7" LCD TFT
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 21/31] ARM: tegra: colibri_t20: iris: add dr_mode property
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (19 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 20/31] ARM: tegra: colibri_t20: iris: add gpio wakeup key Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 22/31] ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor Marcel Ziswiler
` (9 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add dr_mode property to the USB controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index f615e3b9490f..91b3404e1b3d 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -145,6 +145,7 @@
/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
usb@c5000000 {
status = "okay";
+ dr_mode = "otg";
};
usb-phy@c5000000 {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 22/31] ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (20 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 21/31] ARM: tegra: colibri_t20: iris: add dr_mode property Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:13 ` [PATCH 23/31] ARM: tegra: colibri_t20: add i2c-thermtrip Marcel Ziswiler
` (8 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rename and annotate LM95245 temperature sensor more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 3d61175e2a9c..d03b2a290303 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -584,7 +584,8 @@
};
};
- temperature-sensor@4c {
+ /* LM95245 temperature sensor */
+ temp-sensor@4c {
compatible = "national,lm95245";
reg = <0x4c>;
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 23/31] ARM: tegra: colibri_t20: add i2c-thermtrip
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (21 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 22/31] ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensor Marcel Ziswiler
@ 2018-08-29 8:13 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 24/31] ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip Marcel Ziswiler
` (7 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:13 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE
register of the TPS658643 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index d03b2a290303..470ef1f09167 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -598,6 +598,14 @@
nvidia,core-pwr-good-time = <3845 3845>;
nvidia,core-pwr-off-time = <3875>;
nvidia,sys-clock-req-active-high;
+
+ /* Set SLEEP MODE bit in SUPPLYENE register of TPS658643 PMIC */
+ i2c-thermtrip {
+ nvidia,i2c-controller-id = <3>;
+ nvidia,bus-addr = <0x34>;
+ nvidia,reg-addr = <0x14>;
+ nvidia,reg-data = <0x8>;
+ };
};
memory-controller@7000f400 {
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 24/31] ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (22 preceding siblings ...)
2018-08-29 8:13 ` [PATCH 23/31] ARM: tegra: colibri_t20: add i2c-thermtrip Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 25/31] ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers Marcel Ziswiler
` (6 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add GPIO hog to unreset ASIX AX88772B USB Ethernet chip.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 470ef1f09167..339316dd57e9 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -749,3 +749,12 @@
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};
+
+&gpio {
+ lan_reset_n {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LAN_RESET#";
+ };
+};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 25/31] ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (23 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 24/31] ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chip Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 26/31] ARM: tegra: colibri_t20: annotate/move sd card detect Marcel Ziswiler
` (5 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add GPIO hogs for GMI_WR_N buffers:
- tri-stating GMI_WR_N on SODIMM pin 99 nPWE
- not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 339316dd57e9..35eec7ade70d 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -757,4 +757,20 @@
output-high;
line-name = "LAN_RESET#";
};
+
+ /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
+ npwe {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "Tri-state nPWE";
+ };
+
+ /* Not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
+ rdnwr {
+ gpio-hog;
+ gpios = <TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "Not tri-state RDnWR";
+ };
};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 26/31] ARM: tegra: colibri_t20: annotate/move sd card detect
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (24 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 25/31] ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffers Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 27/31] ARM: tegra: colibri_t20: add compatibility comment Marcel Ziswiler
` (4 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Annotate the SD card, its detect pin and move the SD card detect GPIO
definition from the module to the carrier board more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 2 ++
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ----
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 91b3404e1b3d..955d1e1ad8e0 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -163,9 +163,11 @@
vbus-supply = <®_usbh_vbus>;
};
+ /* SD/MMC */
sdhci@c8000600 {
status = "okay";
bus-width = <4>;
+ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
no-1-8-v;
};
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 35eec7ade70d..057147565b1e 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -698,10 +698,6 @@
vbus-supply = <®_lan_v_bus>;
};
- sdhci@c8000600 {
- cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
- };
-
clocks {
compatible = "simple-bus";
#address-cells = <1>;
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 27/31] ARM: tegra: colibri_t20: add compatibility comment
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (25 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 26/31] ARM: tegra: colibri_t20: annotate/move sd card detect Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 28/31] ARM: tegra: colibri_t20: simplify model and compatible properties Marcel Ziswiler
` (3 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add compatibility comment.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 057147565b1e..1204aa9e1d57 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -1,6 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
#include "tegra20.dtsi"
+/*
+ * Toradex Colibri T20 Module Device Tree
+ * Compatible for Revisions Colibri T20 256MB V1.1B, V1.2A;
+ * Colibri T20 256MB IT V1.2A; Colibri T20 512MB V1.1C, V1.2A;
+ * Colibri T20 512MB IT V1.2A
+ */
/ {
model = "Toradex Colibri T20 256/512 MB";
compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 28/31] ARM: tegra: colibri_t20: simplify model and compatible properties
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (26 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 27/31] ARM: tegra: colibri_t20: add compatibility comment Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 29/31] ARM: tegra: colibri_t20: iris: " Marcel Ziswiler
` (2 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Simplify model and compatible by dropping the 256/512 MB from the model
and -512 from the compatible properties to be more in-line with all our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 1204aa9e1d57..d870414e2cb6 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -8,8 +8,8 @@
* Colibri T20 512MB IT V1.2A
*/
/ {
- model = "Toradex Colibri T20 256/512 MB";
- compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
+ model = "Toradex Colibri T20";
+ compatible = "toradex,colibri_t20", "nvidia,tegra20";
memory@0 {
/*
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 29/31] ARM: tegra: colibri_t20: iris: simplify model and compatible properties
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (27 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 28/31] ARM: tegra: colibri_t20: simplify model and compatible properties Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 30/31] ARM: tegra: colibri_t20: iris: add colibri ssp support Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 31/31] ARM: tegra: colibri_t20: add eval board device tree Marcel Ziswiler
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Simplify model and compatible by dropping the 256/512 MB from the model,
-512 from the compatible and rename that property from toradex,iris to
toradex,colibri_t20-iris to be more in-line with all our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 955d1e1ad8e0..3bcbb74edf2a 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -5,8 +5,9 @@
#include "tegra20-colibri.dtsi"
/ {
- model = "Toradex Colibri T20 256/512 MB on Iris";
- compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
+ model = "Toradex Colibri T20 on Iris";
+ compatible = "toradex,colibri_t20-iris", "toradex,colibri_t20",
+ "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000c000/rtc@68";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 30/31] ARM: tegra: colibri_t20: iris: add colibri ssp support
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (28 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 29/31] ARM: tegra: colibri_t20: iris: " Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
2018-08-29 8:14 ` [PATCH 31/31] ARM: tegra: colibri_t20: add eval board device tree Marcel Ziswiler
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add Colibri SSP aka SPI support using the SPI4 instance.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/tegra20-colibri-iris.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20-colibri-iris.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
index 3bcbb74edf2a..ee4b956b0325 100644
--- a/arch/arm/boot/dts/tegra20-colibri-iris.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -164,6 +164,12 @@
vbus-supply = <®_usbh_vbus>;
};
+ /* SPI4: Colibri SSP */
+ spi@7000da00 {
+ status = "okay";
+ spi-max-frequency = <25000000>;
+ };
+
/* SD/MMC */
sdhci@c8000600 {
status = "okay";
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread* [PATCH 31/31] ARM: tegra: colibri_t20: add eval board device tree
2018-08-29 8:13 [PATCH 00/31] ARM: dts: tegra: colibri_t20: major revamp incl. eval board support Marcel Ziswiler
` (29 preceding siblings ...)
2018-08-29 8:14 ` [PATCH 30/31] ARM: tegra: colibri_t20: iris: add colibri ssp support Marcel Ziswiler
@ 2018-08-29 8:14 ` Marcel Ziswiler
30 siblings, 0 replies; 32+ messages in thread
From: Marcel Ziswiler @ 2018-08-29 8:14 UTC (permalink / raw)
To: devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Thierry Reding, Jonathan Hunter, Rob Herring,
Mark Rutland
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Add an evaluation board device tree more in-line with all our other
device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/tegra20-colibri-eval-v3.dts | 266 ++++++++++++++++++++++++++
2 files changed, 267 insertions(+)
create mode 100644 arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f67a87c66e9e..34f5b0135efd 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1062,6 +1062,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \
tango4-vantage-1172.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-harmony.dtb \
+ tegra20-colibri-eval-v3.dtb \
tegra20-colibri-iris.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
new file mode 100644
index 000000000000..36c956cda9f0
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-colibri-eval-v3.dts
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "tegra20-colibri.dtsi"
+
+/ {
+ model = "Toradex Colibri T20 on Colibri Evaluation Board";
+ compatible = "toradex,colibri_t20-eval-v3", "toradex,colibri_t20",
+ "nvidia,tegra20";
+
+ aliases {
+ rtc0 = "/i2c@7000c000/rtc@68";
+ rtc1 = "/i2c@7000d000/tps6586x@34";
+ rtc2 = "/rtc@7000e000";
+ serial0 = &uarta;
+ serial1 = &uartd;
+ serial2 = &uartb;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ host1x@50000000 {
+ dc@54200000 {
+ rgb {
+ status = "okay";
+ nvidia,panel = <&panel>;
+ };
+ };
+
+ hdmi@54280000 {
+ status = "okay";
+ hdmi-supply = <®_5v0>;
+ };
+ };
+
+ pinmux@70000014 {
+ state_default: pinmux {
+ bl_on {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ ddc {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ hotplug_detect {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ i2c {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ lcd {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ lm1 {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ mmc {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ mmccd {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ pwm_a_b {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ pwm_c_d {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ ssp {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ uart_a {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ uart_b {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ uart_c {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ usbh_pen {
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
+
+ /* Colibri UART-A */
+ serial@70006000 {
+ status = "okay";
+ };
+
+ /* Colibri UART-C */
+ serial@70006040 {
+ status = "okay";
+ };
+
+ /* Colibri UART-B */
+ serial@70006300 {
+ status = "okay";
+ };
+
+ pwm@7000a000 {
+ status = "okay";
+ };
+
+ /*
+ * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
+ * board)
+ */
+ i2c@7000c000 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ /* M41T0M6 real time clock on carrier board */
+ rtc@68 {
+ compatible = "st,m41t0";
+ reg = <0x68>;
+ };
+ };
+
+ /* GEN2_I2C: unused */
+
+ /* CAM_I2C (I2C3): unused */
+
+ /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
+ i2c_ddc: i2c@7000c400 {
+ status = "okay";
+ };
+
+ /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
+ usb@c5000000 {
+ status = "okay";
+ dr_mode = "otg";
+ };
+
+ usb-phy@c5000000 {
+ status = "okay";
+ vbus-supply = <®_usbc_vbus>;
+ };
+
+ /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
+ usb@c5008000 {
+ status = "okay";
+ };
+
+ usb-phy@c5008000 {
+ status = "okay";
+ vbus-supply = <®_usbh_vbus>;
+ };
+
+ /* SPI4: Colibri SSP */
+ spi@7000da00 {
+ status = "okay";
+ spi-max-frequency = <25000000>;
+
+ mcp2515: can@0 {
+ compatible = "microchip,mcp2515";
+ reg = <0>;
+ clocks = <&clk16m>;
+ interrupt-parent = <&gpio>;
+ /* CAN_INT */
+ interrupts = <TEGRA_GPIO(A, 0) IRQ_TYPE_EDGE_FALLING>;
+ spi-max-frequency = <10000000>;
+ vdd-supply = <®_3v3>;
+ xceiver-supply = <®_5v0>;
+ };
+ };
+
+ /* SD/MMC */
+ sdhci@c8000600 {
+ status = "okay";
+ bus-width = <4>;
+ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
+ no-1-8-v;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ brightness-levels = <255 128 64 32 16 8 4 0>;
+ default-brightness-level = <6>;
+ /* BL_ON */
+ enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
+ power-supply = <®_3v3>;
+ pwms = <&pwm 0 5000000>; /* PWM<A> */
+ };
+
+ clocks {
+ clk16m: clock@1 {
+ compatible = "fixed-clock";
+ reg = <1>;
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ clock-output-names = "clk16m";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ wakeup {
+ label = "SODIMM pin 45 wakeup";
+ gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ wakeup-source;
+ };
+ };
+
+ panel: panel {
+ /*
+ * edt,et057090dhu: EDT 5.7" LCD TFT
+ * edt,et070080dh6: EDT 7.0" LCD TFT
+ */
+ compatible = "edt,et057090dhu", "simple-panel";
+ backlight = <&backlight>;
+ power-supply = <®_3v3>;
+ };
+
+ reg_3v3: regulator-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3.3V_SW";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "5V_SW";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_usbc_vbus: regulator-usbc-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_USB5";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_5v0>;
+ };
+
+ /* USBH_PEN resp. USB_P_EN */
+ reg_usbh_vbus: regulator-usbh-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_USB[1-4]";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ vin-supply = <®_5v0>;
+ };
+};
--
2.14.4
^ permalink raw reply related [flat|nested] 32+ messages in thread