* [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander
@ 2018-09-27 11:39 Amelie Delaunay
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:39 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.
STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16 GPIOs + 8 extra if the other features are not enabled),
- resistive touchscreen controller,
- IDD measurement.
I2C stuff and chip initialization is based on an MFD parent driver, which
registers a pinctrl MFD child.
---
Changes in v3:
- fix MFD interrupt bindings
- fix drivers/mfd/stmfx.c:103:8: warning: 'mask' may be used uninitialized
in this function
Changes in v2:
- move to MFD parent driver for i2c stuff and chip initialization
- improve regmap configuration
- take advantage of the use of gpio-ranges
Amelie Delaunay (7):
dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
mfd: Add ST Multi-Function eXpander (STMFX) core driver
dt-bindings: pinctrl: document the STMFX pinctrl bindings
pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
ARM: dts: stm32: add STMFX support on stm32746g-eval
ARM: dts: stm32: add joystick support on stm32746g-eval
ARM: dts: stm32: add orange and blue leds on stm32746g-eval
Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +
.../devicetree/bindings/pinctrl/pinctrl-stmfx.txt | 116 +++
arch/arm/boot/dts/stm32746g-eval.dts | 66 ++
drivers/mfd/Kconfig | 14 +
drivers/mfd/Makefile | 2 +-
drivers/mfd/stmfx.c | 626 ++++++++++++++++
drivers/pinctrl/Kconfig | 12 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-stmfx.c | 821 +++++++++++++++++++++
include/linux/mfd/stmfx.h | 27 +
10 files changed, 1712 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
create mode 100644 drivers/mfd/stmfx.c
create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
create mode 100644 include/linux/mfd/stmfx.h
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
@ 2018-09-27 11:39 ` Amelie Delaunay
2018-10-09 9:56 ` Lee Jones
2018-10-12 14:39 ` Rob Herring
2018-09-27 11:39 ` [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver Amelie Delaunay
` (5 subsequent siblings)
6 siblings, 2 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:39 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +++++++++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
diff --git a/Documentation/devicetree/bindings/mfd/stmfx.txt b/Documentation/devicetree/bindings/mfd/stmfx.txt
new file mode 100644
index 0000000..f0c2f7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stmfx.txt
@@ -0,0 +1,28 @@
+STMicroelectonics Multi-Function eXpander (STMFX) Core bindings
+
+ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
+communication with the main MCU. Its main features are GPIO expansion, main
+MCU IDD measurement (IDD is the amount of current that flows through VDD) and
+resistive touchscreen controller.
+
+Required properties:
+- compatible: should be "st,stmfx-0300".
+- reg: I2C slave address of the device.
+- interrupts: interrupt specifier triggered by MFX_IRQ_OUT signal.
+ Please refer to ../interrupt-controller/interrupt.txt
+
+Optional properties:
+- drive-open-drain: configure MFX_IRQ_OUT as open drain.
+- vdd-supply: phandle of the regulator supplying STMFX.
+
+Example:
+
+ stmfx: stmfx@42 {
+ compatible = "st,stmfx-0300";
+ reg = <0x42>;
+ interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+ interrupt-parent = <&gpioi>;
+ vdd-supply = <&v3v3>;
+ };
+
+Please refer to ../pinctrl/pinctrl-stmfx.txt for STMFX GPIO expander function bindings.
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
@ 2018-09-27 11:39 ` Amelie Delaunay
2018-10-09 9:55 ` Lee Jones
2018-09-27 11:40 ` [PATCH v3 3/7] dt-bindings: pinctrl: document the STMFX pinctrl bindings Amelie Delaunay
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:39 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
using I2C for communication with the main MCU. Main features are:
- 16 fast GPIOs individually configurable in input/output
- 8 alternate GPIOs individually configurable in input/output when other
STMFX functions are not used
- Main MCU IDD measurement
- Resistive touchscreen controller
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/mfd/Kconfig | 14 ++
drivers/mfd/Makefile | 2 +-
drivers/mfd/stmfx.c | 626 ++++++++++++++++++++++++++++++++++++++++++++++
include/linux/mfd/stmfx.h | 27 ++
4 files changed, 668 insertions(+), 1 deletion(-)
create mode 100644 drivers/mfd/stmfx.c
create mode 100644 include/linux/mfd/stmfx.h
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index f3a5f8d..8c41342 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1862,6 +1862,20 @@ config MFD_STM32_TIMERS
for PWM and IIO Timer. This driver allow to share the
registers between the others drivers.
+config MFD_STMFX
+ tristate "Support for STMicroelectronics Multi-Function eXpander (STMFX)"
+ depends on I2C
+ depends on OF || COMPILE_TEST
+ select MFD_CORE
+ select REGMAP_I2C
+ help
+ Support for the STMicroelectronics Multi-Function eXpander.
+
+ This driver provides common support for accessing the device,
+ additional drivers must be enabled in order to use the functionality
+ of the device.
+
+
menu "Multimedia Capabilities Port drivers"
depends on ARCH_SA1100
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5856a94..282323b 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
-
+obj-$(CONFIG_MFD_STMFX) += stmfx.o
diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
new file mode 100644
index 0000000..cfd4fca
--- /dev/null
+++ b/drivers/mfd/stmfx.c
@@ -0,0 +1,626 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
+ */
+#include <linux/bitfield.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/stmfx.h>
+#include <linux/module.h>
+#include <linux/regulator/consumer.h>
+
+/* General */
+#define STMFX_REG_CHIP_ID 0x00 /* R */
+#define STMFX_REG_FW_VERSION_MSB 0x01 /* R */
+#define STMFX_REG_FW_VERSION_LSB 0x02 /* R */
+#define STMFX_REG_SYS_CTRL 0x40 /* RW */
+/* IRQ output management */
+#define STMFX_REG_IRQ_OUT_PIN 0x41 /* RW */
+#define STMFX_REG_IRQ_SRC_EN 0x42 /* RW */
+#define STMFX_REG_IRQ_PENDING 0x08 /* R */
+#define STMFX_REG_IRQ_ACK 0x44 /* RW */
+/* GPIO management */
+#define STMFX_REG_IRQ_GPI_PENDING1 0x0C /* R */
+#define STMFX_REG_IRQ_GPI_PENDING2 0x0D /* R */
+#define STMFX_REG_IRQ_GPI_PENDING3 0x0E /* R */
+#define STMFX_REG_GPIO_STATE1 0x10 /* R */
+#define STMFX_REG_GPIO_STATE2 0x11 /* R */
+#define STMFX_REG_GPIO_STATE3 0x12 /* R */
+#define STMFX_REG_IRQ_GPI_SRC1 0x48 /* RW */
+#define STMFX_REG_IRQ_GPI_SRC2 0x49 /* RW */
+#define STMFX_REG_IRQ_GPI_SRC3 0x4A /* RW */
+#define STMFX_REG_GPO_SET1 0x6C /* RW */
+#define STMFX_REG_GPO_SET2 0x6D /* RW */
+#define STMFX_REG_GPO_SET3 0x6E /* RW */
+#define STMFX_REG_GPO_CLR1 0x70 /* RW */
+#define STMFX_REG_GPO_CLR2 0x71 /* RW */
+#define STMFX_REG_GPO_CLR3 0x72 /* RW */
+
+#define STMFX_REG_MAX 0xB0
+
+/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
+#define STMFX_BOOT_TIME_MS 10
+
+/* STMFX_REG_CHIP_ID bitfields */
+#define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
+
+/* STMFX_REG_SYS_CTRL bitfields */
+#define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
+#define STMFX_REG_SYS_CTRL_TS_EN BIT(1)
+#define STMFX_REG_SYS_CTRL_IDD_EN BIT(2)
+#define STMFX_REG_SYS_CTRL_ALTGPIO_EN BIT(3)
+#define STMFX_REG_SYS_CTRL_SWRST BIT(7)
+
+/* STMFX_REG_IRQ_OUT_PIN bitfields */
+#define STMFX_REG_IRQ_OUT_PIN_TYPE BIT(0) /* 0-OD 1-PP */
+#define STMFX_REG_IRQ_OUT_PIN_POL BIT(1) /* 0-active LOW 1-active HIGH */
+
+/* STMFX_REG_IRQ_(SRC_EN/PENDING/ACK) bit shift */
+enum stmfx_irqs {
+ STMFX_REG_IRQ_SRC_EN_GPIO = 0,
+ STMFX_REG_IRQ_SRC_EN_IDD,
+ STMFX_REG_IRQ_SRC_EN_ERROR,
+ STMFX_REG_IRQ_SRC_EN_TS_DET,
+ STMFX_REG_IRQ_SRC_EN_TS_NE,
+ STMFX_REG_IRQ_SRC_EN_TS_TH,
+ STMFX_REG_IRQ_SRC_EN_TS_FULL,
+ STMFX_REG_IRQ_SRC_EN_TS_OVF,
+ STMFX_REG_IRQ_SRC_MAX,
+};
+
+/**
+ * struct stmfx_ddata - STMFX MFD private structure
+ * @stmfx: state holder with device for logs and register map
+ * @vdd: STMFX power supply
+ * @irq_domain: IRQ domain
+ * @lock: IRQ bus lock
+ * @irq_src: cache of IRQ_SRC_EN register for bus_lock
+ * @bkp_sysctrl: backup of SYS_CTRL register for suspend/resume
+ * @bkp_irqoutpin: backup of IRQ_OUT_PIN register for suspend/resume
+ */
+struct stmfx_ddata {
+ struct stmfx *stmfx;
+ struct regulator *vdd;
+ struct irq_domain *irq_domain;
+ struct mutex lock; /* IRQ bus lock */
+ u8 irq_src;
+#ifdef CONFIG_PM
+ u8 bkp_sysctrl;
+ u8 bkp_irqoutpin;
+#endif
+};
+
+static u8 stmfx_func_to_mask(u32 func)
+{
+ u8 mask = 0;
+
+ if (func & STMFX_FUNC_GPIO)
+ mask |= STMFX_REG_SYS_CTRL_GPIO_EN;
+
+ if ((func & STMFX_FUNC_ALTGPIO_LOW) || (func & STMFX_FUNC_ALTGPIO_HIGH))
+ mask |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
+
+ if (func & STMFX_FUNC_TS)
+ mask |= STMFX_REG_SYS_CTRL_TS_EN;
+
+ if (func & STMFX_FUNC_IDD)
+ mask |= STMFX_REG_SYS_CTRL_IDD_EN;
+
+ return mask;
+}
+
+int stmfx_function_enable(struct stmfx *stmfx, u32 func)
+{
+ u32 sys_ctrl;
+ u8 mask;
+ int ret;
+
+ ret = regmap_read(stmfx->map, STMFX_REG_SYS_CTRL, &sys_ctrl);
+ if (ret)
+ return ret;
+
+ /*
+ * IDD and TS have priority in STMFX FW, so if IDD and TS are enabled,
+ * ALTGPIO function is disabled by STMFX FW. If IDD or TS is enabled,
+ * the number of aGPIO available decreases. To avoid GPIO management
+ * disturbance, abort IDD or TS function enable in this case.
+ */
+ if (((func & STMFX_FUNC_IDD) || (func & STMFX_FUNC_TS)) &&
+ (sys_ctrl & STMFX_REG_SYS_CTRL_ALTGPIO_EN)) {
+ dev_err(stmfx->dev, "ALTGPIO function already enabled\n");
+ return -EBUSY;
+ }
+
+ /* If TS is enabled, aGPIO[3:0] cannot be used */
+ if ((func & STMFX_FUNC_ALTGPIO_LOW) &&
+ (sys_ctrl & STMFX_REG_SYS_CTRL_TS_EN)) {
+ dev_err(stmfx->dev, "TS in use, aGPIO[3:0] unavailable\n");
+ return -EBUSY;
+ }
+
+ /* If IDD is enabled, aGPIO[7:4] cannot be used */
+ if ((func & STMFX_FUNC_ALTGPIO_HIGH) &&
+ (sys_ctrl & STMFX_REG_SYS_CTRL_IDD_EN)) {
+ dev_err(stmfx->dev, "IDD in use, aGPIO[7:4] unavailable\n");
+ return -EBUSY;
+ }
+
+ mask = stmfx_func_to_mask(func);
+
+ return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, mask);
+}
+EXPORT_SYMBOL_GPL(stmfx_function_enable);
+
+int stmfx_function_disable(struct stmfx *stmfx, u32 func)
+{
+ u8 mask = stmfx_func_to_mask(func);
+
+ return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, 0);
+}
+EXPORT_SYMBOL_GPL(stmfx_function_disable);
+
+static void stmfx_irq_bus_lock(struct irq_data *data)
+{
+ struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
+
+ mutex_lock(&ddata->lock);
+}
+
+static void stmfx_irq_bus_sync_unlock(struct irq_data *data)
+{
+ struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
+
+ regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, ddata->irq_src);
+
+ mutex_unlock(&ddata->lock);
+}
+
+static void stmfx_irq_mask(struct irq_data *data)
+{
+ struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
+
+ ddata->irq_src &= ~BIT(data->hwirq % 8);
+}
+
+static void stmfx_irq_unmask(struct irq_data *data)
+{
+ struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
+
+ ddata->irq_src |= BIT(data->hwirq % 8);
+}
+
+static struct irq_chip stmfx_irq_chip = {
+ .name = "stmfx-core",
+ .irq_bus_lock = stmfx_irq_bus_lock,
+ .irq_bus_sync_unlock = stmfx_irq_bus_sync_unlock,
+ .irq_mask = stmfx_irq_mask,
+ .irq_unmask = stmfx_irq_unmask,
+};
+
+static irqreturn_t stmfx_irq_handler(int irq, void *data)
+{
+ struct stmfx_ddata *ddata = data;
+ unsigned long n, pending;
+ u32 ack;
+ int ret;
+
+ ret = regmap_read(ddata->stmfx->map, STMFX_REG_IRQ_PENDING,
+ (u32 *)&pending);
+ if (ret)
+ return IRQ_NONE;
+
+ /*
+ * There is no ACK for GPIO, MFX_REG_IRQ_PENDING_GPIO is a logical OR
+ * of MFX_REG_IRQ_GPI _PENDING1/_PENDING2/_PENDING3
+ */
+ ack = pending & ~BIT(STMFX_REG_IRQ_SRC_EN_GPIO);
+ if (ack) {
+ ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_ACK, ack);
+ if (ret)
+ return IRQ_NONE;
+ }
+
+ for_each_set_bit(n, &pending, STMFX_REG_IRQ_SRC_MAX)
+ handle_nested_irq(irq_find_mapping(ddata->irq_domain, n));
+
+ return IRQ_HANDLED;
+}
+
+static int stmfx_irq_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hwirq)
+{
+ irq_set_chip_data(virq, d->host_data);
+ irq_set_chip_and_handler(virq, &stmfx_irq_chip, handle_simple_irq);
+ irq_set_nested_thread(virq, 1);
+ irq_set_noprobe(virq);
+
+ return 0;
+}
+
+static void stmfx_irq_unmap(struct irq_domain *d, unsigned int virq)
+{
+ irq_set_chip_and_handler(virq, NULL, NULL);
+ irq_set_chip_data(virq, NULL);
+}
+
+static const struct irq_domain_ops stmfx_irq_ops = {
+ .map = stmfx_irq_map,
+ .unmap = stmfx_irq_unmap,
+};
+
+static void stmfx_irq_exit(struct stmfx_ddata *ddata)
+{
+ int hwirq;
+
+ for (hwirq = 0; hwirq < STMFX_REG_IRQ_SRC_MAX; hwirq++)
+ irq_dispose_mapping(irq_find_mapping(ddata->irq_domain, hwirq));
+ irq_domain_remove(ddata->irq_domain);
+}
+
+static int stmfx_irq_init(struct stmfx_ddata *ddata, int irq)
+{
+ struct device *dev = ddata->stmfx->dev;
+ u32 irqoutpin = 0, irqtrigger;
+ int ret;
+
+ ddata->irq_domain = irq_domain_add_simple(dev->of_node,
+ STMFX_REG_IRQ_SRC_MAX, 0,
+ &stmfx_irq_ops, ddata);
+ if (!ddata->irq_domain) {
+ dev_err(dev, "failed to create irq domain\n");
+ return -EINVAL;
+ }
+
+ if (!of_property_read_bool(dev->of_node, "drive-open-drain"))
+ irqoutpin |= STMFX_REG_IRQ_OUT_PIN_TYPE;
+
+ irqtrigger = irq_get_trigger_type(irq);
+ if ((irqtrigger & IRQ_TYPE_EDGE_RISING) ||
+ (irqtrigger & IRQ_TYPE_LEVEL_HIGH))
+ irqoutpin |= STMFX_REG_IRQ_OUT_PIN_POL;
+
+ ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN, irqoutpin);
+ if (ret)
+ return ret;
+
+ ret = devm_request_threaded_irq(dev, irq, NULL, stmfx_irq_handler,
+ irqtrigger | IRQF_ONESHOT,
+ "stmfx", ddata);
+ if (ret)
+ stmfx_irq_exit(ddata);
+
+ return ret;
+}
+
+static int stmfx_chip_reset(struct stmfx_ddata *ddata)
+{
+ int ret;
+
+ ret = regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
+ STMFX_REG_SYS_CTRL_SWRST);
+ if (ret)
+ return ret;
+
+ msleep(STMFX_BOOT_TIME_MS);
+
+ return ret;
+}
+
+static int stmfx_chip_init(struct stmfx_ddata *ddata, struct i2c_client *client)
+{
+ u32 id;
+ u8 version[2];
+ int ret;
+
+ ddata->vdd = devm_regulator_get_optional(&client->dev, "vdd");
+ if (IS_ERR(ddata->vdd)) {
+ ret = PTR_ERR(ddata->vdd);
+ if (ret != -ENODEV) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(&client->dev,
+ "no vdd regulator found:%d\n", ret);
+ return ret;
+ }
+ }
+
+ if (!IS_ERR(ddata->vdd)) {
+ ret = regulator_enable(ddata->vdd);
+ if (ret) {
+ dev_err(&client->dev, "vdd enable failed: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = regmap_read(ddata->stmfx->map, STMFX_REG_CHIP_ID, &id);
+ if (ret) {
+ dev_err(&client->dev, "error reading chip id: %d\n", ret);
+ goto err;
+ }
+
+ /*
+ * Check that ID is the complement of the I2C address:
+ * STMFX I2C address follows the 7-bit format (MSB), that's why
+ * client->addr is shifted.
+ *
+ * STMFX_I2C_ADDR| STMFX | Linux
+ * input pin | I2C device address | I2C device address
+ *---------------------------------------------------------
+ * 0 | b: 1000 010x h:0x84 | 0x42
+ * 1 | b: 1000 011x h:0x86 | 0x43
+ */
+ if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (client->addr << 1)) {
+ dev_err(&client->dev, "unknown chip id: %#x\n", id);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = regmap_bulk_read(ddata->stmfx->map, STMFX_REG_FW_VERSION_MSB,
+ version, ARRAY_SIZE(version));
+ if (ret) {
+ dev_err(&client->dev, "error reading fw version: %d\n", ret);
+ goto err;
+ }
+
+ dev_info(&client->dev, "STMFX id: %#x, fw version: %x.%02x\n",
+ id, version[0], version[1]);
+
+ return stmfx_chip_reset(ddata);
+
+err:
+ if (!IS_ERR(ddata->vdd))
+ return regulator_disable(ddata->vdd);
+
+ return ret;
+}
+
+static int stmfx_chip_exit(struct stmfx_ddata *ddata)
+{
+ regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, 0);
+ regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL, 0);
+
+ if (!IS_ERR(ddata->vdd))
+ return regulator_disable(ddata->vdd);
+
+ return 0;
+}
+
+static const struct resource stmfx_pinctrl_resources[] = {
+ DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_GPIO),
+};
+
+static struct mfd_cell stmfx_cells[] = {
+ {
+ .of_compatible = "st,stmfx-0300-pinctrl",
+ .name = "stmfx-pinctrl",
+ .resources = stmfx_pinctrl_resources,
+ .num_resources = ARRAY_SIZE(stmfx_pinctrl_resources),
+ }
+};
+
+static bool stmfx_reg_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case STMFX_REG_SYS_CTRL:
+ case STMFX_REG_IRQ_SRC_EN:
+ case STMFX_REG_IRQ_PENDING:
+ case STMFX_REG_IRQ_GPI_PENDING1:
+ case STMFX_REG_IRQ_GPI_PENDING2:
+ case STMFX_REG_IRQ_GPI_PENDING3:
+ case STMFX_REG_GPIO_STATE1:
+ case STMFX_REG_GPIO_STATE2:
+ case STMFX_REG_GPIO_STATE3:
+ case STMFX_REG_IRQ_GPI_SRC1:
+ case STMFX_REG_IRQ_GPI_SRC2:
+ case STMFX_REG_IRQ_GPI_SRC3:
+ case STMFX_REG_GPO_SET1:
+ case STMFX_REG_GPO_SET2:
+ case STMFX_REG_GPO_SET3:
+ case STMFX_REG_GPO_CLR1:
+ case STMFX_REG_GPO_CLR2:
+ case STMFX_REG_GPO_CLR3:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static bool stmfx_reg_writeable(struct device *dev, unsigned int reg)
+{
+ return (reg >= STMFX_REG_SYS_CTRL);
+}
+
+static const struct regmap_config stmfx_regmap_config = {
+ .reg_bits = 8,
+ .reg_stride = 1,
+ .val_bits = 8,
+ .max_register = STMFX_REG_MAX,
+ .volatile_reg = stmfx_reg_volatile,
+ .writeable_reg = stmfx_reg_writeable,
+ .cache_type = REGCACHE_RBTREE,
+};
+
+static int stmfx_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct stmfx_ddata *ddata;
+ int i, ret;
+
+ ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
+ if (!ddata)
+ return -ENOMEM;
+ /* State holder */
+ ddata->stmfx = devm_kzalloc(dev, sizeof(*ddata->stmfx), GFP_KERNEL);
+ if (!ddata->stmfx)
+ return -ENOMEM;
+
+ i2c_set_clientdata(client, ddata);
+
+ ddata->stmfx->dev = dev;
+
+ ddata->stmfx->map = devm_regmap_init_i2c(client, &stmfx_regmap_config);
+ if (IS_ERR(ddata->stmfx->map)) {
+ ret = PTR_ERR(ddata->stmfx->map);
+ dev_err(dev, "failed to allocate register map: %d\n", ret);
+ return ret;
+ }
+
+ mutex_init(&ddata->lock);
+
+ ret = stmfx_chip_init(ddata, client);
+ if (ret) {
+ if (ret == -ETIMEDOUT)
+ return -EPROBE_DEFER;
+ return ret;
+ }
+
+ if (client->irq < 0) {
+ dev_err(dev, "failed to get irq: %d\n", client->irq);
+ ret = client->irq;
+ goto err_chip_exit;
+ }
+
+ ret = stmfx_irq_init(ddata, client->irq);
+ if (ret)
+ goto err_chip_exit;
+
+ for (i = 0; i < ARRAY_SIZE(stmfx_cells); i++) {
+ stmfx_cells[i].platform_data = ddata->stmfx;
+ stmfx_cells[i].pdata_size = sizeof(struct stmfx);
+ }
+
+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
+ stmfx_cells, ARRAY_SIZE(stmfx_cells), NULL,
+ 0, ddata->irq_domain);
+ if (ret)
+ goto err_irq_exit;
+
+ return 0;
+
+err_irq_exit:
+ stmfx_irq_exit(ddata);
+err_chip_exit:
+ stmfx_chip_exit(ddata);
+
+ return ret;
+}
+
+static int stmfx_remove(struct i2c_client *client)
+{
+ struct stmfx_ddata *ddata = i2c_get_clientdata(client);
+
+ stmfx_irq_exit(ddata);
+
+ return stmfx_chip_exit(ddata);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int stmfx_backup_regs(struct stmfx_ddata *ddata)
+{
+ int ret;
+
+ ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
+ &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
+ if (ret)
+ return ret;
+ ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
+ &ddata->bkp_irqoutpin,
+ sizeof(ddata->bkp_irqoutpin));
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int stmfx_restore_regs(struct stmfx_ddata *ddata)
+{
+ int ret;
+
+ ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
+ &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
+ if (ret)
+ return ret;
+ ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
+ &ddata->bkp_irqoutpin,
+ sizeof(ddata->bkp_irqoutpin));
+ if (ret)
+ return ret;
+ ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN,
+ &ddata->irq_src, sizeof(ddata->irq_src));
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int stmfx_suspend(struct device *dev)
+{
+ struct stmfx_ddata *ddata = dev_get_drvdata(dev);
+ int ret;
+
+ ret = stmfx_backup_regs(ddata);
+ if (ret) {
+ dev_err(ddata->stmfx->dev, "registers backup failure\n");
+ return ret;
+ }
+
+ if (!IS_ERR(ddata->vdd)) {
+ ret = regulator_disable(ddata->vdd);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int stmfx_resume(struct device *dev)
+{
+ struct stmfx_ddata *ddata = dev_get_drvdata(dev);
+ int ret;
+
+ if (!IS_ERR(ddata->vdd)) {
+ ret = regulator_enable(ddata->vdd);
+ if (ret) {
+ dev_err(ddata->stmfx->dev,
+ "vdd enable failed: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = stmfx_restore_regs(ddata);
+ if (ret) {
+ dev_err(ddata->stmfx->dev, "registers restoration failure\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(stmfx_dev_pm_ops, stmfx_suspend, stmfx_resume);
+
+static const struct of_device_id stmfx_of_match[] = {
+ { .compatible = "st,stmfx-0300", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, stmfx_of_match);
+
+static struct i2c_driver stmfx_driver = {
+ .driver = {
+ .name = "stmfx-core",
+ .of_match_table = of_match_ptr(stmfx_of_match),
+ .pm = &stmfx_dev_pm_ops,
+ },
+ .probe = stmfx_probe,
+ .remove = stmfx_remove,
+};
+module_i2c_driver(stmfx_driver);
+
+MODULE_DESCRIPTION("STMFX core driver");
+MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/mfd/stmfx.h b/include/linux/mfd/stmfx.h
new file mode 100644
index 0000000..35c3d42
--- /dev/null
+++ b/include/linux/mfd/stmfx.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
+ */
+
+#ifndef MFD_STMFX_H
+#define MFX_STMFX_H
+
+#include <linux/regmap.h>
+
+enum stmfx_functions {
+ STMFX_FUNC_GPIO = BIT(0), /* GPIO[15:0] */
+ STMFX_FUNC_ALTGPIO_LOW = BIT(1), /* aGPIO[3:0] */
+ STMFX_FUNC_ALTGPIO_HIGH = BIT(2), /* aGPIO[7:4] */
+ STMFX_FUNC_TS = BIT(3),
+ STMFX_FUNC_IDD = BIT(4),
+};
+
+struct stmfx {
+ struct device *dev;
+ struct regmap *map;
+};
+
+int stmfx_function_enable(struct stmfx *stmfx, u32 func);
+int stmfx_function_disable(struct stmfx *stmfx, u32 func);
+#endif
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 3/7] dt-bindings: pinctrl: document the STMFX pinctrl bindings
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
2018-09-27 11:39 ` [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver Amelie Delaunay
@ 2018-09-27 11:40 ` Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 4/7] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver Amelie Delaunay
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:40 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/pinctrl/pinctrl-stmfx.txt | 116 +++++++++++++++++++++
1 file changed, 116 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
new file mode 100644
index 0000000..c1b4c18
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-stmfx.txt
@@ -0,0 +1,116 @@
+STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
+
+ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
+Please refer to ../mfd/stmfx.txt for STMFX Core bindings.
+
+Required properties:
+- compatible: should be "st,stmfx-0300-pinctrl".
+- #gpio-cells: should be <2>, the first cell is the GPIO number and the second
+ cell is the gpio flags in accordance with <dt-bindings/gpio/gpio.h>.
+- gpio-controller: marks the device as a GPIO controller.
+- #interrupt-cells: should be <2>, the first cell is the GPIO number and the
+ second cell is the interrupt flags in accordance with
+ <dt-bindings/interrupt-controller/irq.h>.
+- interrupt-controller: marks the device as an interrupt controller.
+- gpio-ranges: specifies the mapping between gpio controller and pin
+ controller pins. Check "Concerning gpio-ranges property" below.
+Please refer to ../gpio/gpio.txt.
+
+Please refer to pinctrl-bindings.txt for pin configuration.
+
+Required properties for pin configuration sub-nodes:
+- pins: list of pins to which the configuration applies.
+
+Optional properties for pin configuration sub-nodes (pinconf-generic ones):
+- bias-disable: disable any bias on the pin.
+- bias-pull-up: the pin will be pulled up.
+- bias-pull-pin-default: use the pin-default pull state.
+- bias-pull-down: the pin will be pulled down.
+- drive-open-drain: the pin will be driven with open drain.
+- drive-push-pull: the pin will be driven actively high and low.
+- output-high: the pin will be configured as an output driving high level.
+- output-low: the pin will be configured as an output driving low level.
+
+Note that STMFX pins[15:0] are called "gpio[15:0]", and STMFX pins[23:16] are
+called "agpio[7:0]". Example, to refer to pin 18 of STMFX, use "agpio2".
+
+Concerning gpio-ranges property:
+- if all STMFX pins[24:0] are available (no other STMFX function in use), you
+ should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+- if agpio[3:0] are not available (STMFX Touchscreen function in use), you
+ should use gpio-ranges = <&stmfx_pinctrl 0 0 16>, <&stmfx_pinctrl 20 20 4>;
+- if agpio[7:4] are not available (STMFX IDD function in use), you
+ should use gpio-ranges = <&stmfx_pinctrl 0 0 20>;
+
+
+Example:
+
+ stmfx: stmfx@42 {
+ ...
+
+ stmfx_pinctrl: stmfx-pin-controller {
+ compatible = "st,stmfx-0300-pinctrl";
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+ joystick_pins: joystick {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+ };
+
+Example of STMFX GPIO consumers:
+
+ joystick {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&joystick_pins>;
+ pinctrl-names = "default";
+ button-0 {
+ label = "JoySel";
+ linux,code = <KEY_ENTER>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+ };
+ button-1 {
+ label = "JoyDown";
+ linux,code = <KEY_DOWN>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <1 IRQ_TYPE_EDGE_RISING>;
+ };
+ button-2 {
+ label = "JoyLeft";
+ linux,code = <KEY_LEFT>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <2 IRQ_TYPE_EDGE_RISING>;
+ };
+ button-3 {
+ label = "JoyRight";
+ linux,code = <KEY_RIGHT>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+ };
+ button-4 {
+ label = "JoyUp";
+ linux,code = <KEY_UP>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <4 IRQ_TYPE_EDGE_RISING>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ orange {
+ gpios = <&stmfx_pinctrl 17 1>;
+ };
+
+ blue {
+ gpios = <&stmfx_pinctrl 19 1>;
+ };
+ }
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 4/7] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
` (2 preceding siblings ...)
2018-09-27 11:40 ` [PATCH v3 3/7] dt-bindings: pinctrl: document the STMFX pinctrl bindings Amelie Delaunay
@ 2018-09-27 11:40 ` Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 5/7] ARM: dts: stm32: add STMFX support on stm32746g-eval Amelie Delaunay
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:40 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on generic pin config interface to configure the GPIOs.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/Kconfig | 12 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-stmfx.c | 821 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 834 insertions(+)
create mode 100644 drivers/pinctrl/pinctrl-stmfx.c
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index e86752b..bbd3908 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -244,6 +244,18 @@ config PINCTRL_ST
select PINCONF
select GPIOLIB_IRQCHIP
+config PINCTRL_STMFX
+ tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
+ select GENERIC_PINCONF
+ select GPIOLIB_IRQCHIP
+ select MFD_STMFX
+ help
+ Driver for STMicroelectronics Multi-Function eXpander (STMFX)
+ GPIO expander.
+ This provides a GPIO interface supporting inputs and outputs,
+ and configuring push-pull, open-drain, and can also be used as
+ interrupt-controller.
+
config PINCTRL_U300
bool "U300 pin controller driver"
depends on ARCH_U300
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 46ef9bd..9abcaa59 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
obj-$(CONFIG_PINCTRL_LPC18XX) += pinctrl-lpc18xx.o
obj-$(CONFIG_PINCTRL_TB10X) += pinctrl-tb10x.o
obj-$(CONFIG_PINCTRL_ST) += pinctrl-st.o
+obj-$(CONFIG_PINCTRL_STMFX) += pinctrl-stmfx.o
obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
obj-$(CONFIG_PINCTRL_RK805) += pinctrl-rk805.o
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
new file mode 100644
index 0000000..e253ed1
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -0,0 +1,821 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
+ *
+ * Copyright (C) 2018 STMicroelectronics
+ * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
+ */
+#include <linux/gpio/driver.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/stmfx.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinmux.h>
+
+#include "core.h"
+#include "pinctrl-utils.h"
+
+/* GPIOs expander */
+/* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
+#define STMFX_REG_GPIO_STATE 0x10 /* R */
+/* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
+#define STMFX_REG_GPIO_DIR 0x60 /* RW */
+/* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
+#define STMFX_REG_GPIO_TYPE 0x64 /* RW */
+/* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
+#define STMFX_REG_GPIO_PUPD 0x68 /* RW */
+/* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
+#define STMFX_REG_GPO_SET 0x6C /* RW */
+/* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
+#define STMFX_REG_GPO_CLR 0x70 /* RW */
+/* IRQ_GPI_SRC1 0x48, IRQ_GPI_SRC2 0x49, IRQ_GPI_SRC3 0x4A */
+#define STMFX_REG_IRQ_GPI_SRC 0x48 /* RW */
+/* IRQ_GPI_EVT1 0x4C, IRQ_GPI_EVT2 0x4D, IRQ_GPI_EVT3 0x4E */
+#define STMFX_REG_IRQ_GPI_EVT 0x4C /* RW */
+/* IRQ_GPI_TYPE1 0x50, IRQ_GPI_TYPE2 0x51, IRQ_GPI_TYPE3 0x52 */
+#define STMFX_REG_IRQ_GPI_TYPE 0x50 /* RW */
+/* IRQ_GPI_PENDING1 0x0C, IRQ_GPI_PENDING2 0x0D, IRQ_GPI_PENDING3 0x0E*/
+#define STMFX_REG_IRQ_GPI_PENDING 0x0C /* R */
+/* IRQ_GPI_ACK1 0x54, IRQ_GPI_ACK2 0x55, IRQ_GPI_ACK3 0x56 */
+#define STMFX_REG_IRQ_GPI_ACK 0x54 /* RW */
+
+/* STMFX_REG_IRQ_PENDING bitfields */
+#define STMFX_REG_IRQ_PENDING_GPIO BIT(0)
+
+#define NR_GPIO_REGS 3
+#define NR_GPIOS_PER_REG 8
+#define get_reg(offset) ((offset) / NR_GPIOS_PER_REG)
+#define get_shift(offset) ((offset) % NR_GPIOS_PER_REG)
+#define get_mask(offset) (BIT(get_shift(offset)))
+
+/*
+ * STMFX pinctrl can have up to 24 pins if STMFX other functions are not used.
+ * Pins availability is managed thanks to gpio-ranges property.
+ */
+static const struct pinctrl_pin_desc stmfx_pins[] = {
+ PINCTRL_PIN(0, "gpio0"),
+ PINCTRL_PIN(1, "gpio1"),
+ PINCTRL_PIN(2, "gpio2"),
+ PINCTRL_PIN(3, "gpio3"),
+ PINCTRL_PIN(4, "gpio4"),
+ PINCTRL_PIN(5, "gpio5"),
+ PINCTRL_PIN(6, "gpio6"),
+ PINCTRL_PIN(7, "gpio7"),
+ PINCTRL_PIN(8, "gpio8"),
+ PINCTRL_PIN(9, "gpio9"),
+ PINCTRL_PIN(10, "gpio10"),
+ PINCTRL_PIN(11, "gpio11"),
+ PINCTRL_PIN(12, "gpio12"),
+ PINCTRL_PIN(13, "gpio13"),
+ PINCTRL_PIN(14, "gpio14"),
+ PINCTRL_PIN(15, "gpio15"),
+ PINCTRL_PIN(16, "agpio0"),
+ PINCTRL_PIN(17, "agpio1"),
+ PINCTRL_PIN(18, "agpio2"),
+ PINCTRL_PIN(19, "agpio3"),
+ PINCTRL_PIN(20, "agpio4"),
+ PINCTRL_PIN(21, "agpio5"),
+ PINCTRL_PIN(22, "agpio6"),
+ PINCTRL_PIN(23, "agpio7"),
+};
+
+struct stmfx_pinctrl {
+ struct device *dev;
+ struct stmfx *stmfx;
+ struct pinctrl_dev *pctl_dev;
+ struct pinctrl_desc pctl_desc;
+ struct gpio_chip gpio_chip;
+ struct irq_chip irq_chip;
+ struct mutex lock; /* IRQ bus lock */
+ unsigned long gpio_valid_mask;
+ /* Cache of IRQ_GPI_* registers for bus_lock */
+ u8 irq_gpi_src[NR_GPIO_REGS];
+ u8 irq_gpi_type[NR_GPIO_REGS];
+ u8 irq_gpi_evt[NR_GPIO_REGS];
+ u8 irq_toggle_edge[NR_GPIO_REGS];
+#ifdef CONFIG_PM
+ /* Backup of GPIO_* registers for suspend/resume */
+ u8 bkp_gpio_state[NR_GPIO_REGS];
+ u8 bkp_gpio_dir[NR_GPIO_REGS];
+ u8 bkp_gpio_type[NR_GPIO_REGS];
+ u8 bkp_gpio_pupd[NR_GPIO_REGS];
+#endif
+};
+
+static int stmfx_gpio_get(struct gpio_chip *gc, unsigned int offset)
+{
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
+ u32 reg = STMFX_REG_GPIO_STATE + get_reg(offset);
+ u32 mask = get_mask(offset);
+ u32 value;
+ int ret;
+
+ ret = regmap_read(pctl->stmfx->map, reg, &value);
+
+ return ret ? ret : !!(value & mask);
+}
+
+static void stmfx_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
+{
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
+ u32 reg = value ? STMFX_REG_GPO_SET : STMFX_REG_GPO_CLR;
+ u32 mask = get_mask(offset);
+
+ regmap_write_bits(pctl->stmfx->map, reg + get_reg(offset),
+ mask, mask);
+}
+
+static int stmfx_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
+{
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
+ u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);
+ u32 mask = get_mask(offset);
+ u32 val;
+ int ret;
+
+ ret = regmap_read(pctl->stmfx->map, reg, &val);
+ /*
+ * On stmfx, gpio pins direction is (0)input, (1)output.
+ * .get_direction returns 0=out, 1=in
+ */
+
+ return ret ? ret : !(val & mask);
+}
+
+static int stmfx_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
+{
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
+ u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);
+ u32 mask = get_mask(offset);
+
+ return regmap_write_bits(pctl->stmfx->map, reg, mask, 0);
+}
+
+static int stmfx_gpio_direction_output(struct gpio_chip *gc,
+ unsigned int offset, int value)
+{
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gc);
+ u32 reg = STMFX_REG_GPIO_DIR + get_reg(offset);
+ u32 mask = get_mask(offset);
+
+ stmfx_gpio_set(gc, offset, value);
+
+ return regmap_write_bits(pctl->stmfx->map, reg, mask, mask);
+}
+
+static int stmfx_pinconf_get_pupd(struct stmfx_pinctrl *pctl,
+ unsigned int offset)
+{
+ u32 reg = STMFX_REG_GPIO_PUPD + get_reg(offset);
+ u32 pupd, mask = get_mask(offset);
+ int ret;
+
+ ret = regmap_read(pctl->stmfx->map, reg, &pupd);
+ if (ret)
+ return ret;
+
+ return !!(pupd & mask);
+}
+
+static int stmfx_pinconf_set_pupd(struct stmfx_pinctrl *pctl,
+ unsigned int offset, u32 pupd)
+{
+ u32 reg = STMFX_REG_GPIO_PUPD + get_reg(offset);
+ u32 mask = get_mask(offset);
+
+ return regmap_write_bits(pctl->stmfx->map, reg, mask, pupd ? mask : 0);
+}
+
+static int stmfx_pinconf_get_type(struct stmfx_pinctrl *pctl,
+ unsigned int offset)
+{
+ u32 reg = STMFX_REG_GPIO_TYPE + get_reg(offset);
+ u32 type, mask = get_mask(offset);
+ int ret;
+
+ ret = regmap_read(pctl->stmfx->map, reg, &type);
+ if (ret)
+ return ret;
+
+ return !!(type & mask);
+}
+
+static int stmfx_pinconf_set_type(struct stmfx_pinctrl *pctl,
+ unsigned int offset, u32 type)
+{
+ u32 reg = STMFX_REG_GPIO_TYPE + get_reg(offset);
+ u32 mask = get_mask(offset);
+
+ return regmap_write_bits(pctl->stmfx->map, reg, mask, type ? mask : 0);
+}
+
+static int stmfx_pinconf_get(struct pinctrl_dev *pctldev,
+ unsigned int pin, unsigned long *config)
+{
+ struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ u32 param = pinconf_to_config_param(*config);
+ struct pinctrl_gpio_range *range;
+ u32 dir, type, pupd;
+ u32 arg = 0;
+ int ret;
+
+ range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
+ if (!range)
+ return -EINVAL;
+
+ dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin);
+ if (dir < 0)
+ return dir;
+ type = stmfx_pinconf_get_type(pctl, pin);
+ if (type < 0)
+ return type;
+ pupd = stmfx_pinconf_get_pupd(pctl, pin);
+ if (pupd < 0)
+ return pupd;
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ if ((!dir && (!type || !pupd)) || (dir && !type))
+ arg = 1;
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ if (dir && type && !pupd)
+ arg = 1;
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ if (type && pupd)
+ arg = 1;
+ break;
+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+ if ((!dir && type) || (dir && !type))
+ arg = 1;
+ break;
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
+ if ((!dir && !type) || (dir && type))
+ arg = 1;
+ break;
+ case PIN_CONFIG_OUTPUT:
+ if (dir)
+ return -EINVAL;
+
+ ret = stmfx_gpio_get(&pctl->gpio_chip, pin);
+ if (ret < 0)
+ return ret;
+
+ arg = ret;
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+
+ *config = pinconf_to_config_packed(param, arg);
+
+ return 0;
+}
+
+static int stmfx_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
+ unsigned long *configs, unsigned int num_configs)
+{
+ struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ struct pinctrl_gpio_range *range;
+ enum pin_config_param param;
+ u32 arg;
+ int dir, i, ret;
+
+ range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
+ if (!range) {
+ dev_err(pctldev->dev, "pin %d is not available\n", pin);
+ return -EINVAL;
+ }
+
+ dir = stmfx_gpio_get_direction(&pctl->gpio_chip, pin);
+ if (dir < 0)
+ return dir;
+
+ for (i = 0; i < num_configs; i++) {
+ param = pinconf_to_config_param(configs[i]);
+ arg = pinconf_to_config_argument(configs[i]);
+
+ switch (param) {
+ case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ ret = stmfx_pinconf_set_pupd(pctl, pin, 0);
+ if (ret)
+ return ret;
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ ret = stmfx_pinconf_set_pupd(pctl, pin, 1);
+ if (ret)
+ return ret;
+ break;
+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+ if (!dir)
+ ret = stmfx_pinconf_set_type(pctl, pin, 1);
+ else
+ ret = stmfx_pinconf_set_type(pctl, pin, 0);
+ if (ret)
+ return ret;
+ break;
+ case PIN_CONFIG_DRIVE_PUSH_PULL:
+ if (!dir)
+ ret = stmfx_pinconf_set_type(pctl, pin, 0);
+ else
+ ret = stmfx_pinconf_set_type(pctl, pin, 1);
+ if (ret)
+ return ret;
+ break;
+ case PIN_CONFIG_OUTPUT:
+ ret = stmfx_gpio_direction_output(&pctl->gpio_chip,
+ pin, arg);
+ if (ret)
+ return ret;
+ break;
+ default:
+ return -ENOTSUPP;
+ }
+ }
+
+ return 0;
+}
+
+static void stmfx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
+ struct seq_file *s, unsigned int offset)
+{
+ struct stmfx_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
+ struct pinctrl_gpio_range *range;
+ int dir, type, pupd, val;
+
+ range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, offset);
+ if (!range)
+ return;
+
+ dir = stmfx_gpio_get_direction(&pctl->gpio_chip, offset);
+ if (dir < 0)
+ return;
+ type = stmfx_pinconf_get_type(pctl, offset);
+ if (type < 0)
+ return;
+ pupd = stmfx_pinconf_get_pupd(pctl, offset);
+ if (pupd < 0)
+ return;
+ val = stmfx_gpio_get(&pctl->gpio_chip, offset);
+ if (val < 0)
+ return;
+
+ if (!dir) {
+ seq_printf(s, "output %s ", val ? "high" : "low");
+ if (type)
+ seq_printf(s, "open drain %s internal pull-up ",
+ pupd ? "with" : "without");
+ else
+ seq_puts(s, "push pull no pull ");
+ } else {
+ seq_printf(s, "input %s ", val ? "high" : "low");
+ if (type)
+ seq_printf(s, "with internal pull-%s ",
+ pupd ? "up" : "down");
+ else
+ seq_printf(s, "%s ", pupd ? "floating" : "analog");
+ }
+}
+
+static const struct pinconf_ops stmfx_pinconf_ops = {
+ .pin_config_get = stmfx_pinconf_get,
+ .pin_config_set = stmfx_pinconf_set,
+ .pin_config_dbg_show = stmfx_pinconf_dbg_show,
+};
+
+static int stmfx_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ return 0;
+}
+
+static const char *stmfx_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned int selector)
+{
+ return NULL;
+}
+
+static int stmfx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned int selector,
+ const unsigned int **pins,
+ unsigned int *num_pins)
+{
+ return -ENOTSUPP;
+}
+
+static const struct pinctrl_ops stmfx_pinctrl_ops = {
+ .get_groups_count = stmfx_pinctrl_get_groups_count,
+ .get_group_name = stmfx_pinctrl_get_group_name,
+ .get_group_pins = stmfx_pinctrl_get_group_pins,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
+ .dt_free_map = pinctrl_utils_free_map,
+};
+
+static void stmfx_pinctrl_irq_mask(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+ u32 reg = get_reg(data->hwirq);
+ u32 mask = get_mask(data->hwirq);
+
+ pctl->irq_gpi_src[reg] &= ~mask;
+}
+
+static void stmfx_pinctrl_irq_unmask(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+ u32 reg = get_reg(data->hwirq);
+ u32 mask = get_mask(data->hwirq);
+
+ pctl->irq_gpi_src[reg] |= mask;
+}
+
+static int stmfx_pinctrl_irq_set_type(struct irq_data *data, unsigned int type)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+ u32 reg = get_reg(data->hwirq);
+ u32 mask = get_mask(data->hwirq);
+
+ if (type & IRQ_TYPE_NONE)
+ return -EINVAL;
+
+ if (type & IRQ_TYPE_EDGE_BOTH) {
+ pctl->irq_gpi_evt[reg] |= mask;
+ irq_set_handler_locked(data, handle_edge_irq);
+ } else {
+ pctl->irq_gpi_evt[reg] &= ~mask;
+ irq_set_handler_locked(data, handle_level_irq);
+ }
+
+ if ((type & IRQ_TYPE_EDGE_RISING) || (type & IRQ_TYPE_LEVEL_HIGH))
+ pctl->irq_gpi_type[reg] |= mask;
+ else
+ pctl->irq_gpi_type[reg] &= ~mask;
+
+ /*
+ * In case of (type & IRQ_TYPE_EDGE_BOTH), we need to know current
+ * GPIO value to set the right edge trigger. But in atomic context
+ * here we can't access registers over I2C. That's why (type &
+ * IRQ_TYPE_EDGE_BOTH) will be managed in .irq_sync_unlock.
+ */
+
+ if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
+ pctl->irq_toggle_edge[reg] |= mask;
+ else
+ pctl->irq_toggle_edge[reg] &= mask;
+
+ return 0;
+}
+
+static void stmfx_pinctrl_irq_bus_lock(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+
+ mutex_lock(&pctl->lock);
+}
+
+static void stmfx_pinctrl_irq_bus_sync_unlock(struct irq_data *data)
+{
+ struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);
+ struct stmfx_pinctrl *pctl = gpiochip_get_data(gpio_chip);
+ u32 reg = get_reg(data->hwirq);
+ u32 mask = get_mask(data->hwirq);
+
+ /*
+ * In case of IRQ_TYPE_EDGE_BOTH), read the current GPIO value
+ * (this couldn't be done in .irq_set_type because of atomic context)
+ * to set the right irq trigger type.
+ */
+ if (pctl->irq_toggle_edge[reg] & mask) {
+ if (stmfx_gpio_get(gpio_chip, data->hwirq))
+ pctl->irq_gpi_type[reg] &= ~mask;
+ else
+ pctl->irq_gpi_type[reg] |= mask;
+ }
+
+ regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT,
+ pctl->irq_gpi_evt, NR_GPIO_REGS);
+ regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE,
+ pctl->irq_gpi_type, NR_GPIO_REGS);
+ regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
+ pctl->irq_gpi_src, NR_GPIO_REGS);
+
+ mutex_unlock(&pctl->lock);
+}
+
+static void stmfx_pinctrl_irq_toggle_trigger(struct stmfx_pinctrl *pctl,
+ unsigned int offset)
+{
+ u32 reg = get_reg(offset);
+ u32 mask = get_mask(offset);
+ int val;
+
+ if (!(pctl->irq_toggle_edge[reg] & mask))
+ return;
+
+ val = stmfx_gpio_get(&pctl->gpio_chip, offset);
+ if (val < 0)
+ return;
+
+ if (val) {
+ pctl->irq_gpi_type[reg] &= mask;
+ regmap_write_bits(pctl->stmfx->map,
+ STMFX_REG_IRQ_GPI_TYPE + reg,
+ mask, 0);
+
+ } else {
+ pctl->irq_gpi_type[reg] |= mask;
+ regmap_write_bits(pctl->stmfx->map,
+ STMFX_REG_IRQ_GPI_TYPE + reg,
+ mask, mask);
+ }
+}
+
+static irqreturn_t stmfx_pinctrl_irq_thread_fn(int irq, void *dev_id)
+{
+ struct stmfx_pinctrl *pctl = (struct stmfx_pinctrl *)dev_id;
+ struct gpio_chip *gc = &pctl->gpio_chip;
+ u8 pending[NR_GPIO_REGS];
+ unsigned long n, status;
+ int ret;
+
+ ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_IRQ_GPI_PENDING,
+ &pending, NR_GPIO_REGS);
+ if (ret)
+ return IRQ_NONE;
+
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_ACK,
+ pending, NR_GPIO_REGS);
+ if (ret)
+ return IRQ_NONE;
+
+ status = *(unsigned long *)pending;
+ for_each_set_bit(n, &status, gc->ngpio) {
+ handle_nested_irq(irq_find_mapping(gc->irq.domain, n));
+ stmfx_pinctrl_irq_toggle_trigger(pctl, n);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int stmfx_pinctrl_gpio_function_enable(struct stmfx_pinctrl *pctl)
+{
+ struct pinctrl_gpio_range *gpio_range;
+ struct pinctrl_dev *pctl_dev = pctl->pctl_dev;
+ u32 func = STMFX_FUNC_GPIO;
+
+ pctl->gpio_valid_mask = GENMASK(15, 0);
+
+ gpio_range = pinctrl_find_gpio_range_from_pin(pctl_dev, 16);
+ if (gpio_range) {
+ func |= STMFX_FUNC_ALTGPIO_LOW;
+ pctl->gpio_valid_mask |= GENMASK(19, 16);
+ }
+
+ gpio_range = pinctrl_find_gpio_range_from_pin(pctl_dev, 20);
+ if (gpio_range) {
+ func |= STMFX_FUNC_ALTGPIO_HIGH;
+ pctl->gpio_valid_mask |= GENMASK(23, 20);
+ }
+
+ return stmfx_function_enable(pctl->stmfx, func);
+}
+
+static int stmfx_pinctrl_probe(struct platform_device *pdev)
+{
+ struct stmfx *stmfx = dev_get_platdata(&pdev->dev);
+ struct device_node *np = pdev->dev.of_node;
+ struct stmfx_pinctrl *pctl;
+ u32 n;
+ int irq, ret;
+
+ pctl = devm_kzalloc(stmfx->dev, sizeof(*pctl), GFP_KERNEL);
+ if (!pctl)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, pctl);
+
+ pctl->dev = &pdev->dev;
+ pctl->stmfx = stmfx;
+
+ if (!of_find_property(np, "gpio-ranges", NULL)) {
+ dev_err(pctl->dev, "missing required gpio-ranges property\n");
+ return -EINVAL;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq <= 0) {
+ dev_err(pctl->dev, "failed to get irq\n");
+ return -ENXIO;
+ }
+
+ mutex_init(&pctl->lock);
+
+ /* Register pin controller */
+ pctl->pctl_desc.name = "stmfx-pinctrl";
+ pctl->pctl_desc.pctlops = &stmfx_pinctrl_ops;
+ pctl->pctl_desc.confops = &stmfx_pinconf_ops;
+ pctl->pctl_desc.pins = stmfx_pins;
+ pctl->pctl_desc.npins = ARRAY_SIZE(stmfx_pins);
+ pctl->pctl_desc.owner = THIS_MODULE;
+
+ ret = devm_pinctrl_register_and_init(pctl->dev, &pctl->pctl_desc,
+ pctl, &pctl->pctl_dev);
+ if (ret) {
+ dev_err(pctl->dev, "pinctrl registration failed\n");
+ return ret;
+ }
+
+ ret = pinctrl_enable(pctl->pctl_dev);
+ if (ret) {
+ dev_err(pctl->dev, "pinctrl enable failed\n");
+ return ret;
+ }
+
+ /* Register gpio controller */
+ pctl->gpio_chip.label = "stmfx-gpio";
+ pctl->gpio_chip.parent = pctl->dev;
+ pctl->gpio_chip.get_direction = stmfx_gpio_get_direction;
+ pctl->gpio_chip.direction_input = stmfx_gpio_direction_input;
+ pctl->gpio_chip.direction_output = stmfx_gpio_direction_output;
+ pctl->gpio_chip.get = stmfx_gpio_get;
+ pctl->gpio_chip.set = stmfx_gpio_set;
+ pctl->gpio_chip.set_config = gpiochip_generic_config;
+ pctl->gpio_chip.base = -1;
+ pctl->gpio_chip.ngpio = pctl->pctl_desc.npins;
+ pctl->gpio_chip.can_sleep = true;
+ pctl->gpio_chip.of_node = np;
+ pctl->gpio_chip.need_valid_mask = true;
+
+ ret = devm_gpiochip_add_data(pctl->dev, &pctl->gpio_chip, pctl);
+ if (ret) {
+ dev_err(pctl->dev, "gpio_chip registration failed\n");
+ return ret;
+ }
+
+ ret = stmfx_pinctrl_gpio_function_enable(pctl);
+ if (ret)
+ return ret;
+
+ pctl->irq_chip.name = dev_name(pctl->dev);
+ pctl->irq_chip.irq_mask = stmfx_pinctrl_irq_mask;
+ pctl->irq_chip.irq_unmask = stmfx_pinctrl_irq_unmask;
+ pctl->irq_chip.irq_set_type = stmfx_pinctrl_irq_set_type;
+ pctl->irq_chip.irq_bus_lock = stmfx_pinctrl_irq_bus_lock;
+ pctl->irq_chip.irq_bus_sync_unlock = stmfx_pinctrl_irq_bus_sync_unlock;
+ for_each_clear_bit(n, &pctl->gpio_valid_mask, pctl->gpio_chip.ngpio)
+ clear_bit(n, pctl->gpio_chip.valid_mask);
+
+ ret = gpiochip_irqchip_add_nested(&pctl->gpio_chip, &pctl->irq_chip,
+ 0, handle_bad_irq, IRQ_TYPE_NONE);
+ if (ret) {
+ dev_err(pctl->dev, "cannot add irqchip to gpiochip\n");
+ return ret;
+ }
+
+ ret = devm_request_threaded_irq(pctl->dev, irq, NULL,
+ stmfx_pinctrl_irq_thread_fn,
+ IRQF_ONESHOT,
+ pctl->irq_chip.name, pctl);
+ if (ret) {
+ dev_err(pctl->dev, "cannot request irq%d\n", irq);
+ return ret;
+ }
+
+ gpiochip_set_nested_irqchip(&pctl->gpio_chip, &pctl->irq_chip, irq);
+
+ dev_info(pctl->dev,
+ "%ld GPIOs available\n", hweight_long(pctl->gpio_valid_mask));
+
+ return 0;
+}
+
+static int stmfx_pinctrl_remove(struct platform_device *pdev)
+{
+ struct stmfx *stmfx = dev_get_platdata(&pdev->dev);
+
+ return stmfx_function_disable(stmfx,
+ STMFX_FUNC_GPIO |
+ STMFX_FUNC_ALTGPIO_LOW |
+ STMFX_FUNC_ALTGPIO_HIGH);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int stmfx_pinctrl_backup_regs(struct stmfx_pinctrl *pctl)
+{
+ int ret;
+
+ ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_STATE,
+ &pctl->bkp_gpio_state, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_DIR,
+ &pctl->bkp_gpio_dir, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_TYPE,
+ &pctl->bkp_gpio_type, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_read(pctl->stmfx->map, STMFX_REG_GPIO_PUPD,
+ &pctl->bkp_gpio_pupd, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int stmfx_pinctrl_restore_regs(struct stmfx_pinctrl *pctl)
+{
+ int ret;
+
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_DIR,
+ pctl->bkp_gpio_dir, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_TYPE,
+ pctl->bkp_gpio_type, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPIO_PUPD,
+ pctl->bkp_gpio_pupd, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_GPO_SET,
+ pctl->bkp_gpio_state, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_EVT,
+ pctl->irq_gpi_evt, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_TYPE,
+ pctl->irq_gpi_type, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+ ret = regmap_bulk_write(pctl->stmfx->map, STMFX_REG_IRQ_GPI_SRC,
+ pctl->irq_gpi_src, NR_GPIO_REGS);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int stmfx_pinctrl_suspend(struct device *dev)
+{
+ struct stmfx_pinctrl *pctl = dev_get_drvdata(dev);
+ int ret;
+
+ ret = stmfx_pinctrl_backup_regs(pctl);
+ if (ret) {
+ dev_err(pctl->dev, "registers backup failure\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int stmfx_pinctrl_resume(struct device *dev)
+{
+ struct stmfx_pinctrl *pctl = dev_get_drvdata(dev);
+ int ret;
+
+ ret = stmfx_pinctrl_restore_regs(pctl);
+ if (ret) {
+ dev_err(pctl->dev, "registers restoration failure\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(stmfx_pinctrl_dev_pm_ops,
+ stmfx_pinctrl_suspend, stmfx_pinctrl_resume);
+
+static const struct of_device_id stmfx_pinctrl_of_match[] = {
+ { .compatible = "st,stmfx-0300-pinctrl", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, stmfx_pinctrl_of_match);
+
+static struct platform_driver stmfx_pinctrl_driver = {
+ .driver = {
+ .name = "stmfx-pinctrl",
+ .of_match_table = stmfx_pinctrl_of_match,
+ .pm = &stmfx_pinctrl_dev_pm_ops,
+ },
+ .probe = stmfx_pinctrl_probe,
+ .remove = stmfx_pinctrl_remove,
+};
+module_platform_driver(stmfx_pinctrl_driver);
+
+MODULE_DESCRIPTION("STMFX pinctrl/GPIO driver");
+MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
+MODULE_LICENSE("GPL v2");
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 5/7] ARM: dts: stm32: add STMFX support on stm32746g-eval
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
` (3 preceding siblings ...)
2018-09-27 11:40 ` [PATCH v3 4/7] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver Amelie Delaunay
@ 2018-09-27 11:40 ` Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 6/7] ARM: dts: stm32: add joystick " Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 7/7] ARM: dts: stm32: add orange and blue leds " Amelie Delaunay
6 siblings, 0 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:40 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
This patch adds support for STMicroelectronics Multi-Function eXpander
(STMFX) on stm32746g-eval. It is connected on i2c1.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/stm32746g-eval.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts
index 8c081ea..203faf0 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -44,6 +44,7 @@
#include "stm32f746.dtsi"
#include "stm32f746-pinctrl.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "STMicroelectronics STM32746g-EVAL board";
@@ -114,6 +115,22 @@
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
+
+ stmfx: stmfx@42 {
+ compatible = "st,stmfx-0300";
+ reg = <0x42>;
+ interrupts = <8 IRQ_TYPE_EDGE_RISING>;
+ interrupt-parent = <&gpioi>;
+
+ stmfx_pinctrl: stmfx-pin-controller {
+ compatible = "st,stmfx-0300-pinctrl";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+ };
+ };
};
&rtc {
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 6/7] ARM: dts: stm32: add joystick support on stm32746g-eval
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
` (4 preceding siblings ...)
2018-09-27 11:40 ` [PATCH v3 5/7] ARM: dts: stm32: add STMFX support on stm32746g-eval Amelie Delaunay
@ 2018-09-27 11:40 ` Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 7/7] ARM: dts: stm32: add orange and blue leds " Amelie Delaunay
6 siblings, 0 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:40 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
The joystick (B3) on stm32746g-eval uses gpios on STMFX gpio expander.
These gpios need a pin configuration (push-pull and bias-pull-up),
described under stmfx_pinctrl node.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/stm32746g-eval.dts | 43 ++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts
index 203faf0..b86ad83 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -86,6 +86,43 @@
};
};
+ joystick {
+ compatible = "gpio-keys";
+ #size-cells = <0>;
+ pinctrl-0 = <&joystick_pins>;
+ pinctrl-names = "default";
+ button-0 {
+ label = "JoySel";
+ linux,code = <KEY_ENTER>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+ };
+ button-1 {
+ label = "JoyDown";
+ linux,code = <KEY_DOWN>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+ };
+ button-2 {
+ label = "JoyLeft";
+ linux,code = <KEY_LEFT>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ };
+ button-3 {
+ label = "JoyRight";
+ linux,code = <KEY_RIGHT>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ };
+ button-4 {
+ label = "JoyUp";
+ linux,code = <KEY_UP>;
+ interrupt-parent = <&stmfx_pinctrl>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+
usbotg_hs_phy: usb-phy {
#phy-cells = <0>;
compatible = "usb-nop-xceiv";
@@ -129,6 +166,12 @@
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&stmfx_pinctrl 0 0 24>;
+
+ joystick_pins: joystick {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
+ drive-push-pull;
+ bias-pull-up;
+ };
};
};
};
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 7/7] ARM: dts: stm32: add orange and blue leds on stm32746g-eval
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
` (5 preceding siblings ...)
2018-09-27 11:40 ` [PATCH v3 6/7] ARM: dts: stm32: add joystick " Amelie Delaunay
@ 2018-09-27 11:40 ` Amelie Delaunay
6 siblings, 0 replies; 12+ messages in thread
From: Amelie Delaunay @ 2018-09-27 11:40 UTC (permalink / raw)
To: Lee Jones, Linus Walleij, Rob Herring, Mark Rutland,
Alexandre Torgue, Maxime Coquelin
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-stm32, Amelie Delaunay
Orange (LD2) and blue (LD4) leds on stm32746g-eval are connected on
STMFX gpio expander, offset 17 and 19.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/stm32746g-eval.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32746g-eval.dts b/arch/arm/boot/dts/stm32746g-eval.dts
index b86ad83..a5fa73f 100644
--- a/arch/arm/boot/dts/stm32746g-eval.dts
+++ b/arch/arm/boot/dts/stm32746g-eval.dts
@@ -69,9 +69,15 @@
gpios = <&gpiof 10 1>;
linux,default-trigger = "heartbeat";
};
+ orange {
+ gpios = <&stmfx_pinctrl 17 1>;
+ };
red {
gpios = <&gpiob 7 1>;
};
+ blue {
+ gpios = <&stmfx_pinctrl 19 1>;
+ };
};
gpio_keys {
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver
2018-09-27 11:39 ` [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver Amelie Delaunay
@ 2018-10-09 9:55 ` Lee Jones
2019-02-27 9:32 ` Amelie DELAUNAY
0 siblings, 1 reply; 12+ messages in thread
From: Lee Jones @ 2018-10-09 9:55 UTC (permalink / raw)
To: Amelie Delaunay
Cc: Linus Walleij, Rob Herring, Mark Rutland, Alexandre Torgue,
Maxime Coquelin, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-stm32
On Thu, 27 Sep 2018, Amelie Delaunay wrote:
> STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
> using I2C for communication with the main MCU. Main features are:
> - 16 fast GPIOs individually configurable in input/output
> - 8 alternate GPIOs individually configurable in input/output when other
> STMFX functions are not used
> - Main MCU IDD measurement
> - Resistive touchscreen controller
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/mfd/Kconfig | 14 ++
> drivers/mfd/Makefile | 2 +-
> drivers/mfd/stmfx.c | 626 ++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/mfd/stmfx.h | 27 ++
> 4 files changed, 668 insertions(+), 1 deletion(-)
> create mode 100644 drivers/mfd/stmfx.c
> create mode 100644 include/linux/mfd/stmfx.h
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index f3a5f8d..8c41342 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -1862,6 +1862,20 @@ config MFD_STM32_TIMERS
> for PWM and IIO Timer. This driver allow to share the
> registers between the others drivers.
>
> +config MFD_STMFX
> + tristate "Support for STMicroelectronics Multi-Function eXpander (STMFX)"
> + depends on I2C
> + depends on OF || COMPILE_TEST
> + select MFD_CORE
> + select REGMAP_I2C
> + help
> + Support for the STMicroelectronics Multi-Function eXpander.
> +
> + This driver provides common support for accessing the device,
> + additional drivers must be enabled in order to use the functionality
> + of the device.
> +
> +
> menu "Multimedia Capabilities Port drivers"
> depends on ARCH_SA1100
>
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 5856a94..282323b 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
> obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
> obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
> obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
> -
> +obj-$(CONFIG_MFD_STMFX) += stmfx.o
> diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
> new file mode 100644
> index 0000000..cfd4fca
> --- /dev/null
> +++ b/drivers/mfd/stmfx.c
> @@ -0,0 +1,626 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
> + *
> + * Copyright (C) 2018 STMicroelectronics
> + * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
> + */
> +#include <linux/bitfield.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/mfd/core.h>
> +#include <linux/mfd/stmfx.h>
> +#include <linux/module.h>
> +#include <linux/regulator/consumer.h>
> +
> +/* General */
> +#define STMFX_REG_CHIP_ID 0x00 /* R */
> +#define STMFX_REG_FW_VERSION_MSB 0x01 /* R */
> +#define STMFX_REG_FW_VERSION_LSB 0x02 /* R */
> +#define STMFX_REG_SYS_CTRL 0x40 /* RW */
> +/* IRQ output management */
> +#define STMFX_REG_IRQ_OUT_PIN 0x41 /* RW */
> +#define STMFX_REG_IRQ_SRC_EN 0x42 /* RW */
> +#define STMFX_REG_IRQ_PENDING 0x08 /* R */
> +#define STMFX_REG_IRQ_ACK 0x44 /* RW */
> +/* GPIO management */
> +#define STMFX_REG_IRQ_GPI_PENDING1 0x0C /* R */
> +#define STMFX_REG_IRQ_GPI_PENDING2 0x0D /* R */
> +#define STMFX_REG_IRQ_GPI_PENDING3 0x0E /* R */
> +#define STMFX_REG_GPIO_STATE1 0x10 /* R */
> +#define STMFX_REG_GPIO_STATE2 0x11 /* R */
> +#define STMFX_REG_GPIO_STATE3 0x12 /* R */
> +#define STMFX_REG_IRQ_GPI_SRC1 0x48 /* RW */
> +#define STMFX_REG_IRQ_GPI_SRC2 0x49 /* RW */
> +#define STMFX_REG_IRQ_GPI_SRC3 0x4A /* RW */
> +#define STMFX_REG_GPO_SET1 0x6C /* RW */
> +#define STMFX_REG_GPO_SET2 0x6D /* RW */
> +#define STMFX_REG_GPO_SET3 0x6E /* RW */
> +#define STMFX_REG_GPO_CLR1 0x70 /* RW */
> +#define STMFX_REG_GPO_CLR2 0x71 /* RW */
> +#define STMFX_REG_GPO_CLR3 0x72 /* RW */
> +
> +#define STMFX_REG_MAX 0xB0
> +
> +/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
> +#define STMFX_BOOT_TIME_MS 10
> +
> +/* STMFX_REG_CHIP_ID bitfields */
> +#define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
> +
> +/* STMFX_REG_SYS_CTRL bitfields */
> +#define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
> +#define STMFX_REG_SYS_CTRL_TS_EN BIT(1)
> +#define STMFX_REG_SYS_CTRL_IDD_EN BIT(2)
> +#define STMFX_REG_SYS_CTRL_ALTGPIO_EN BIT(3)
> +#define STMFX_REG_SYS_CTRL_SWRST BIT(7)
> +
> +/* STMFX_REG_IRQ_OUT_PIN bitfields */
> +#define STMFX_REG_IRQ_OUT_PIN_TYPE BIT(0) /* 0-OD 1-PP */
> +#define STMFX_REG_IRQ_OUT_PIN_POL BIT(1) /* 0-active LOW 1-active HIGH */
> +
> +/* STMFX_REG_IRQ_(SRC_EN/PENDING/ACK) bit shift */
> +enum stmfx_irqs {
> + STMFX_REG_IRQ_SRC_EN_GPIO = 0,
> + STMFX_REG_IRQ_SRC_EN_IDD,
> + STMFX_REG_IRQ_SRC_EN_ERROR,
> + STMFX_REG_IRQ_SRC_EN_TS_DET,
> + STMFX_REG_IRQ_SRC_EN_TS_NE,
> + STMFX_REG_IRQ_SRC_EN_TS_TH,
> + STMFX_REG_IRQ_SRC_EN_TS_FULL,
> + STMFX_REG_IRQ_SRC_EN_TS_OVF,
> + STMFX_REG_IRQ_SRC_MAX,
> +};
I'd prefer from here up to the includes to be placed into the header.
> +/**
> + * struct stmfx_ddata - STMFX MFD private structure
You can drop '_ddata' from here (read next comment).
> + * @stmfx: state holder with device for logs and register map
I don't understand why this requires an additional struct.
> + * @vdd: STMFX power supply
> + * @irq_domain: IRQ domain
> + * @lock: IRQ bus lock
> + * @irq_src: cache of IRQ_SRC_EN register for bus_lock
> + * @bkp_sysctrl: backup of SYS_CTRL register for suspend/resume
> + * @bkp_irqoutpin: backup of IRQ_OUT_PIN register for suspend/resume
> + */
> +struct stmfx_ddata {
> + struct stmfx *stmfx;
> + struct regulator *vdd;
> + struct irq_domain *irq_domain;
> + struct mutex lock; /* IRQ bus lock */
> + u8 irq_src;
> +#ifdef CONFIG_PM
> + u8 bkp_sysctrl;
> + u8 bkp_irqoutpin;
> +#endif
I haven't seen this before.
Why is this necessary for *this* device and no others?
> +};
> +
> +static u8 stmfx_func_to_mask(u32 func)
> +{
> + u8 mask = 0;
> +
> + if (func & STMFX_FUNC_GPIO)
> + mask |= STMFX_REG_SYS_CTRL_GPIO_EN;
> +
> + if ((func & STMFX_FUNC_ALTGPIO_LOW) || (func & STMFX_FUNC_ALTGPIO_HIGH))
> + mask |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
> +
> + if (func & STMFX_FUNC_TS)
> + mask |= STMFX_REG_SYS_CTRL_TS_EN;
> +
> + if (func & STMFX_FUNC_IDD)
> + mask |= STMFX_REG_SYS_CTRL_IDD_EN;
> +
> + return mask;
> +}
> +
> +int stmfx_function_enable(struct stmfx *stmfx, u32 func)
> +{
> + u32 sys_ctrl;
> + u8 mask;
> + int ret;
> +
> + ret = regmap_read(stmfx->map, STMFX_REG_SYS_CTRL, &sys_ctrl);
> + if (ret)
> + return ret;
> +
> + /*
> + * IDD and TS have priority in STMFX FW, so if IDD and TS are enabled,
> + * ALTGPIO function is disabled by STMFX FW. If IDD or TS is enabled,
> + * the number of aGPIO available decreases. To avoid GPIO management
> + * disturbance, abort IDD or TS function enable in this case.
> + */
> + if (((func & STMFX_FUNC_IDD) || (func & STMFX_FUNC_TS)) &&
> + (sys_ctrl & STMFX_REG_SYS_CTRL_ALTGPIO_EN)) {
> + dev_err(stmfx->dev, "ALTGPIO function already enabled\n");
> + return -EBUSY;
> + }
> +
> + /* If TS is enabled, aGPIO[3:0] cannot be used */
> + if ((func & STMFX_FUNC_ALTGPIO_LOW) &&
> + (sys_ctrl & STMFX_REG_SYS_CTRL_TS_EN)) {
> + dev_err(stmfx->dev, "TS in use, aGPIO[3:0] unavailable\n");
> + return -EBUSY;
> + }
> +
> + /* If IDD is enabled, aGPIO[7:4] cannot be used */
> + if ((func & STMFX_FUNC_ALTGPIO_HIGH) &&
> + (sys_ctrl & STMFX_REG_SYS_CTRL_IDD_EN)) {
> + dev_err(stmfx->dev, "IDD in use, aGPIO[7:4] unavailable\n");
> + return -EBUSY;
> + }
> +
> + mask = stmfx_func_to_mask(func);
> +
> + return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, mask);
> +}
> +EXPORT_SYMBOL_GPL(stmfx_function_enable);
> +
> +int stmfx_function_disable(struct stmfx *stmfx, u32 func)
> +{
> + u8 mask = stmfx_func_to_mask(func);
> +
> + return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, 0);
> +}
> +EXPORT_SYMBOL_GPL(stmfx_function_disable);
> +
> +static void stmfx_irq_bus_lock(struct irq_data *data)
> +{
> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
> +
> + mutex_lock(&ddata->lock);
> +}
> +
> +static void stmfx_irq_bus_sync_unlock(struct irq_data *data)
> +{
> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
> +
> + regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, ddata->irq_src);
> +
> + mutex_unlock(&ddata->lock);
> +}
> +
> +static void stmfx_irq_mask(struct irq_data *data)
> +{
> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
> +
> + ddata->irq_src &= ~BIT(data->hwirq % 8);
> +}
> +
> +static void stmfx_irq_unmask(struct irq_data *data)
> +{
> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
> +
> + ddata->irq_src |= BIT(data->hwirq % 8);
> +}
> +
> +static struct irq_chip stmfx_irq_chip = {
> + .name = "stmfx-core",
> + .irq_bus_lock = stmfx_irq_bus_lock,
> + .irq_bus_sync_unlock = stmfx_irq_bus_sync_unlock,
> + .irq_mask = stmfx_irq_mask,
> + .irq_unmask = stmfx_irq_unmask,
> +};
> +
> +static irqreturn_t stmfx_irq_handler(int irq, void *data)
> +{
> + struct stmfx_ddata *ddata = data;
> + unsigned long n, pending;
> + u32 ack;
> + int ret;
> +
> + ret = regmap_read(ddata->stmfx->map, STMFX_REG_IRQ_PENDING,
> + (u32 *)&pending);
> + if (ret)
> + return IRQ_NONE;
> +
> + /*
> + * There is no ACK for GPIO, MFX_REG_IRQ_PENDING_GPIO is a logical OR
> + * of MFX_REG_IRQ_GPI _PENDING1/_PENDING2/_PENDING3
> + */
> + ack = pending & ~BIT(STMFX_REG_IRQ_SRC_EN_GPIO);
> + if (ack) {
> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_ACK, ack);
> + if (ret)
> + return IRQ_NONE;
> + }
> +
> + for_each_set_bit(n, &pending, STMFX_REG_IRQ_SRC_MAX)
> + handle_nested_irq(irq_find_mapping(ddata->irq_domain, n));
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int stmfx_irq_map(struct irq_domain *d, unsigned int virq,
> + irq_hw_number_t hwirq)
> +{
> + irq_set_chip_data(virq, d->host_data);
> + irq_set_chip_and_handler(virq, &stmfx_irq_chip, handle_simple_irq);
> + irq_set_nested_thread(virq, 1);
> + irq_set_noprobe(virq);
> +
> + return 0;
> +}
> +
> +static void stmfx_irq_unmap(struct irq_domain *d, unsigned int virq)
> +{
> + irq_set_chip_and_handler(virq, NULL, NULL);
> + irq_set_chip_data(virq, NULL);
> +}
> +
> +static const struct irq_domain_ops stmfx_irq_ops = {
> + .map = stmfx_irq_map,
> + .unmap = stmfx_irq_unmap,
> +};
> +
> +static void stmfx_irq_exit(struct stmfx_ddata *ddata)
> +{
> + int hwirq;
> +
> + for (hwirq = 0; hwirq < STMFX_REG_IRQ_SRC_MAX; hwirq++)
> + irq_dispose_mapping(irq_find_mapping(ddata->irq_domain, hwirq));
'\n' here please.
> + irq_domain_remove(ddata->irq_domain);
> +}
> +
> +static int stmfx_irq_init(struct stmfx_ddata *ddata, int irq)
> +{
> + struct device *dev = ddata->stmfx->dev;
Better to pass either 'dev' or 'pdev' around and extrapolate using the
dev_get_drvdata() helpers, rather than the other way around.
> + u32 irqoutpin = 0, irqtrigger;
> + int ret;
> +
> + ddata->irq_domain = irq_domain_add_simple(dev->of_node,
> + STMFX_REG_IRQ_SRC_MAX, 0,
> + &stmfx_irq_ops, ddata);
> + if (!ddata->irq_domain) {
> + dev_err(dev, "failed to create irq domain\n");
s/irq/IRQ/
I also prefer capital letters to start sentences, but it's not
critical here.
> + return -EINVAL;
> + }
> +
> + if (!of_property_read_bool(dev->of_node, "drive-open-drain"))
> + irqoutpin |= STMFX_REG_IRQ_OUT_PIN_TYPE;
> +
> + irqtrigger = irq_get_trigger_type(irq);
> + if ((irqtrigger & IRQ_TYPE_EDGE_RISING) ||
> + (irqtrigger & IRQ_TYPE_LEVEL_HIGH))
> + irqoutpin |= STMFX_REG_IRQ_OUT_PIN_POL;
> +
> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN, irqoutpin);
> + if (ret)
> + return ret;
> +
> + ret = devm_request_threaded_irq(dev, irq, NULL, stmfx_irq_handler,
> + irqtrigger | IRQF_ONESHOT,
> + "stmfx", ddata);
> + if (ret)
> + stmfx_irq_exit(ddata);
> +
> + return ret;
> +}
> +
> +static int stmfx_chip_reset(struct stmfx_ddata *ddata)
> +{
> + int ret;
> +
> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
> + STMFX_REG_SYS_CTRL_SWRST);
> + if (ret)
> + return ret;
> +
> + msleep(STMFX_BOOT_TIME_MS);
> +
> + return ret;
> +}
> +
> +static int stmfx_chip_init(struct stmfx_ddata *ddata, struct i2c_client *client)
No need to provide both ddata and client, you can extrapolate the
former from the latter.
> +{
> + u32 id;
> + u8 version[2];
> + int ret;
> +
> + ddata->vdd = devm_regulator_get_optional(&client->dev, "vdd");
> + if (IS_ERR(ddata->vdd)) {
> + ret = PTR_ERR(ddata->vdd);
> + if (ret != -ENODEV) {
> + if (ret != -EPROBE_DEFER)
> + dev_err(&client->dev,
> + "no vdd regulator found:%d\n", ret);
s/vdd/VDD/?
> + return ret;
> + }
> + }
> +
> + if (!IS_ERR(ddata->vdd)) {
Why not just 'else'?
> + ret = regulator_enable(ddata->vdd);
> + if (ret) {
> + dev_err(&client->dev, "vdd enable failed: %d\n", ret);
s/vdd/VDD/?
> + return ret;
> + }
> + }
> +
> + ret = regmap_read(ddata->stmfx->map, STMFX_REG_CHIP_ID, &id);
> + if (ret) {
> + dev_err(&client->dev, "error reading chip id: %d\n", ret);
s/id/ID/
> + goto err;
> + }
> +
> + /*
> + * Check that ID is the complement of the I2C address:
> + * STMFX I2C address follows the 7-bit format (MSB), that's why
> + * client->addr is shifted.
> + *
> + * STMFX_I2C_ADDR| STMFX | Linux
> + * input pin | I2C device address | I2C device address
> + *---------------------------------------------------------
> + * 0 | b: 1000 010x h:0x84 | 0x42
> + * 1 | b: 1000 011x h:0x86 | 0x43
> + */
> + if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (client->addr << 1)) {
> + dev_err(&client->dev, "unknown chip id: %#x\n", id);
> + ret = -EINVAL;
> + goto err;
> + }
> +
> + ret = regmap_bulk_read(ddata->stmfx->map, STMFX_REG_FW_VERSION_MSB,
> + version, ARRAY_SIZE(version));
> + if (ret) {
> + dev_err(&client->dev, "error reading fw version: %d\n", ret);
> + goto err;
> + }
> +
> + dev_info(&client->dev, "STMFX id: %#x, fw version: %x.%02x\n",
> + id, version[0], version[1]);
> +
> + return stmfx_chip_reset(ddata);
> +
> +err:
> + if (!IS_ERR(ddata->vdd))
> + return regulator_disable(ddata->vdd);
> +
> + return ret;
> +}
> +
> +static int stmfx_chip_exit(struct stmfx_ddata *ddata)
> +{
> + regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, 0);
> + regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL, 0);
> +
> + if (!IS_ERR(ddata->vdd))
> + return regulator_disable(ddata->vdd);
> +
> + return 0;
> +}
> +
> +static const struct resource stmfx_pinctrl_resources[] = {
> + DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_GPIO),
> +};
> +
> +static struct mfd_cell stmfx_cells[] = {
> + {
> + .of_compatible = "st,stmfx-0300-pinctrl",
> + .name = "stmfx-pinctrl",
> + .resources = stmfx_pinctrl_resources,
> + .num_resources = ARRAY_SIZE(stmfx_pinctrl_resources),
> + }
> +};
What other devices make up this MFD?
> +static bool stmfx_reg_volatile(struct device *dev, unsigned int reg)
> +{
> + switch (reg) {
> + case STMFX_REG_SYS_CTRL:
> + case STMFX_REG_IRQ_SRC_EN:
> + case STMFX_REG_IRQ_PENDING:
> + case STMFX_REG_IRQ_GPI_PENDING1:
> + case STMFX_REG_IRQ_GPI_PENDING2:
> + case STMFX_REG_IRQ_GPI_PENDING3:
> + case STMFX_REG_GPIO_STATE1:
> + case STMFX_REG_GPIO_STATE2:
> + case STMFX_REG_GPIO_STATE3:
> + case STMFX_REG_IRQ_GPI_SRC1:
> + case STMFX_REG_IRQ_GPI_SRC2:
> + case STMFX_REG_IRQ_GPI_SRC3:
> + case STMFX_REG_GPO_SET1:
> + case STMFX_REG_GPO_SET2:
> + case STMFX_REG_GPO_SET3:
> + case STMFX_REG_GPO_CLR1:
> + case STMFX_REG_GPO_CLR2:
> + case STMFX_REG_GPO_CLR3:
> + return true;
> + default:
> + return false;
> + }
> +}
> +
> +static bool stmfx_reg_writeable(struct device *dev, unsigned int reg)
> +{
> + return (reg >= STMFX_REG_SYS_CTRL);
> +}
> +
> +static const struct regmap_config stmfx_regmap_config = {
> + .reg_bits = 8,
> + .reg_stride = 1,
> + .val_bits = 8,
> + .max_register = STMFX_REG_MAX,
> + .volatile_reg = stmfx_reg_volatile,
> + .writeable_reg = stmfx_reg_writeable,
> + .cache_type = REGCACHE_RBTREE,
> +};
> +
> +static int stmfx_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct device *dev = &client->dev;
> + struct stmfx_ddata *ddata;
> + int i, ret;
> +
> + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
> + if (!ddata)
> + return -ENOMEM;
'\n' here please.
> + /* State holder */
> + ddata->stmfx = devm_kzalloc(dev, sizeof(*ddata->stmfx), GFP_KERNEL);
> + if (!ddata->stmfx)
> + return -ENOMEM;
> +
> + i2c_set_clientdata(client, ddata);
> +
> + ddata->stmfx->dev = dev;
> +
> + ddata->stmfx->map = devm_regmap_init_i2c(client, &stmfx_regmap_config);
Just put this straight into the parent struct and do away with the
extra complication.
> + if (IS_ERR(ddata->stmfx->map)) {
> + ret = PTR_ERR(ddata->stmfx->map);
> + dev_err(dev, "failed to allocate register map: %d\n", ret);
> + return ret;
> + }
> +
> + mutex_init(&ddata->lock);
> +
> + ret = stmfx_chip_init(ddata, client);
> + if (ret) {
> + if (ret == -ETIMEDOUT)
> + return -EPROBE_DEFER;
> + return ret;
> + }
> +
> + if (client->irq < 0) {
> + dev_err(dev, "failed to get irq: %d\n", client->irq);
> + ret = client->irq;
> + goto err_chip_exit;
> + }
> +
> + ret = stmfx_irq_init(ddata, client->irq);
> + if (ret)
> + goto err_chip_exit;
> +
> + for (i = 0; i < ARRAY_SIZE(stmfx_cells); i++) {
> + stmfx_cells[i].platform_data = ddata->stmfx;
> + stmfx_cells[i].pdata_size = sizeof(struct stmfx);
> + }
> +
> + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
> + stmfx_cells, ARRAY_SIZE(stmfx_cells), NULL,
> + 0, ddata->irq_domain);
> + if (ret)
> + goto err_irq_exit;
> +
> + return 0;
> +
> +err_irq_exit:
> + stmfx_irq_exit(ddata);
> +err_chip_exit:
> + stmfx_chip_exit(ddata);
> +
> + return ret;
> +}
> +
> +static int stmfx_remove(struct i2c_client *client)
> +{
> + struct stmfx_ddata *ddata = i2c_get_clientdata(client);
> +
> + stmfx_irq_exit(ddata);
> +
> + return stmfx_chip_exit(ddata);
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int stmfx_backup_regs(struct stmfx_ddata *ddata)
> +{
> + int ret;
> +
> + ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
> + &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
> + if (ret)
> + return ret;
> + ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
> + &ddata->bkp_irqoutpin,
> + sizeof(ddata->bkp_irqoutpin));
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int stmfx_restore_regs(struct stmfx_ddata *ddata)
> +{
> + int ret;
> +
> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
> + &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
> + if (ret)
> + return ret;
> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
> + &ddata->bkp_irqoutpin,
> + sizeof(ddata->bkp_irqoutpin));
> + if (ret)
> + return ret;
> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN,
> + &ddata->irq_src, sizeof(ddata->irq_src));
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static int stmfx_suspend(struct device *dev)
> +{
> + struct stmfx_ddata *ddata = dev_get_drvdata(dev);
> + int ret;
> +
> + ret = stmfx_backup_regs(ddata);
> + if (ret) {
> + dev_err(ddata->stmfx->dev, "registers backup failure\n");
> + return ret;
> + }
> +
> + if (!IS_ERR(ddata->vdd)) {
> + ret = regulator_disable(ddata->vdd);
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int stmfx_resume(struct device *dev)
> +{
> + struct stmfx_ddata *ddata = dev_get_drvdata(dev);
> + int ret;
> +
> + if (!IS_ERR(ddata->vdd)) {
> + ret = regulator_enable(ddata->vdd);
> + if (ret) {
> + dev_err(ddata->stmfx->dev,
> + "vdd enable failed: %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = stmfx_restore_regs(ddata);
> + if (ret) {
> + dev_err(ddata->stmfx->dev, "registers restoration failure\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +#endif
> +
> +static SIMPLE_DEV_PM_OPS(stmfx_dev_pm_ops, stmfx_suspend, stmfx_resume);
> +
> +static const struct of_device_id stmfx_of_match[] = {
> + { .compatible = "st,stmfx-0300", },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, stmfx_of_match);
> +
> +static struct i2c_driver stmfx_driver = {
> + .driver = {
> + .name = "stmfx-core",
> + .of_match_table = of_match_ptr(stmfx_of_match),
> + .pm = &stmfx_dev_pm_ops,
> + },
> + .probe = stmfx_probe,
> + .remove = stmfx_remove,
> +};
> +module_i2c_driver(stmfx_driver);
> +
> +MODULE_DESCRIPTION("STMFX core driver");
> +MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/mfd/stmfx.h b/include/linux/mfd/stmfx.h
> new file mode 100644
> index 0000000..35c3d42
> --- /dev/null
> +++ b/include/linux/mfd/stmfx.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2018 STMicroelectronics
> + * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
> + */
> +
> +#ifndef MFD_STMFX_H
> +#define MFX_STMFX_H
> +
> +#include <linux/regmap.h>
> +
> +enum stmfx_functions {
> + STMFX_FUNC_GPIO = BIT(0), /* GPIO[15:0] */
> + STMFX_FUNC_ALTGPIO_LOW = BIT(1), /* aGPIO[3:0] */
> + STMFX_FUNC_ALTGPIO_HIGH = BIT(2), /* aGPIO[7:4] */
> + STMFX_FUNC_TS = BIT(3),
> + STMFX_FUNC_IDD = BIT(4),
> +};
> +
> +struct stmfx {
> + struct device *dev;
> + struct regmap *map;
> +};
> +
> +int stmfx_function_enable(struct stmfx *stmfx, u32 func);
> +int stmfx_function_disable(struct stmfx *stmfx, u32 func);
> +#endif
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
@ 2018-10-09 9:56 ` Lee Jones
2018-10-12 14:39 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Lee Jones @ 2018-10-09 9:56 UTC (permalink / raw)
To: Amelie Delaunay
Cc: Linus Walleij, Rob Herring, Mark Rutland, Alexandre Torgue,
Maxime Coquelin, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-stm32
On Thu, 27 Sep 2018, Amelie Delaunay wrote:
> This patch adds documentation of device tree bindings for the
> STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
For my own reference:
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
2018-10-09 9:56 ` Lee Jones
@ 2018-10-12 14:39 ` Rob Herring
1 sibling, 0 replies; 12+ messages in thread
From: Rob Herring @ 2018-10-12 14:39 UTC (permalink / raw)
To: Amelie Delaunay
Cc: Lee Jones, Linus Walleij, Mark Rutland, Alexandre Torgue,
Maxime Coquelin, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-stm32, Amelie Delaunay
On Thu, 27 Sep 2018 13:39:58 +0200, Amelie Delaunay wrote:
> This patch adds documentation of device tree bindings for the
> STMicroelectronics Multi-Function eXpander (STMFX) MFD core.
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Documentation/devicetree/bindings/mfd/stmfx.txt | 28 +++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/stmfx.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver
2018-10-09 9:55 ` Lee Jones
@ 2019-02-27 9:32 ` Amelie DELAUNAY
0 siblings, 0 replies; 12+ messages in thread
From: Amelie DELAUNAY @ 2019-02-27 9:32 UTC (permalink / raw)
To: Lee Jones
Cc: Linus Walleij, Rob Herring, Mark Rutland, Alexandre TORGUE,
Maxime Coquelin, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-stm32
On 10/9/18 11:55 AM, Lee Jones wrote:
> On Thu, 27 Sep 2018, Amelie Delaunay wrote:
>
>> STMicroelectronics Multi-Function eXpander (STMFX) is a slave controller
>> using I2C for communication with the main MCU. Main features are:
>> - 16 fast GPIOs individually configurable in input/output
>> - 8 alternate GPIOs individually configurable in input/output when other
>> STMFX functions are not used
>> - Main MCU IDD measurement
>> - Resistive touchscreen controller
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
>> drivers/mfd/Kconfig | 14 ++
>> drivers/mfd/Makefile | 2 +-
>> drivers/mfd/stmfx.c | 626 ++++++++++++++++++++++++++++++++++++++++++++++
>> include/linux/mfd/stmfx.h | 27 ++
>> 4 files changed, 668 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/mfd/stmfx.c
>> create mode 100644 include/linux/mfd/stmfx.h
>>
>> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
>> index f3a5f8d..8c41342 100644
>> --- a/drivers/mfd/Kconfig
>> +++ b/drivers/mfd/Kconfig
>> @@ -1862,6 +1862,20 @@ config MFD_STM32_TIMERS
>> for PWM and IIO Timer. This driver allow to share the
>> registers between the others drivers.
>>
>> +config MFD_STMFX
>> + tristate "Support for STMicroelectronics Multi-Function eXpander (STMFX)"
>> + depends on I2C
>> + depends on OF || COMPILE_TEST
>> + select MFD_CORE
>> + select REGMAP_I2C
>> + help
>> + Support for the STMicroelectronics Multi-Function eXpander.
>> +
>> + This driver provides common support for accessing the device,
>> + additional drivers must be enabled in order to use the functionality
>> + of the device.
>> +
>> +
>> menu "Multimedia Capabilities Port drivers"
>> depends on ARCH_SA1100
>>
>> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
>> index 5856a94..282323b 100644
>> --- a/drivers/mfd/Makefile
>> +++ b/drivers/mfd/Makefile
>> @@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
>> obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
>> obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
>> obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
>> -
>> +obj-$(CONFIG_MFD_STMFX) += stmfx.o
>> diff --git a/drivers/mfd/stmfx.c b/drivers/mfd/stmfx.c
>> new file mode 100644
>> index 0000000..cfd4fca
>> --- /dev/null
>> +++ b/drivers/mfd/stmfx.c
>> @@ -0,0 +1,626 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Driver for STMicroelectronics Multi-Function eXpander (STMFX) core
>> + *
>> + * Copyright (C) 2018 STMicroelectronics
>> + * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
>> + */
>> +#include <linux/bitfield.h>
>> +#include <linux/i2c.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/irq.h>
>> +#include <linux/mfd/core.h>
>> +#include <linux/mfd/stmfx.h>
>> +#include <linux/module.h>
>> +#include <linux/regulator/consumer.h>
>> +
>> +/* General */
>> +#define STMFX_REG_CHIP_ID 0x00 /* R */
>> +#define STMFX_REG_FW_VERSION_MSB 0x01 /* R */
>> +#define STMFX_REG_FW_VERSION_LSB 0x02 /* R */
>> +#define STMFX_REG_SYS_CTRL 0x40 /* RW */
>> +/* IRQ output management */
>> +#define STMFX_REG_IRQ_OUT_PIN 0x41 /* RW */
>> +#define STMFX_REG_IRQ_SRC_EN 0x42 /* RW */
>> +#define STMFX_REG_IRQ_PENDING 0x08 /* R */
>> +#define STMFX_REG_IRQ_ACK 0x44 /* RW */
>> +/* GPIO management */
>> +#define STMFX_REG_IRQ_GPI_PENDING1 0x0C /* R */
>> +#define STMFX_REG_IRQ_GPI_PENDING2 0x0D /* R */
>> +#define STMFX_REG_IRQ_GPI_PENDING3 0x0E /* R */
>> +#define STMFX_REG_GPIO_STATE1 0x10 /* R */
>> +#define STMFX_REG_GPIO_STATE2 0x11 /* R */
>> +#define STMFX_REG_GPIO_STATE3 0x12 /* R */
>> +#define STMFX_REG_IRQ_GPI_SRC1 0x48 /* RW */
>> +#define STMFX_REG_IRQ_GPI_SRC2 0x49 /* RW */
>> +#define STMFX_REG_IRQ_GPI_SRC3 0x4A /* RW */
>> +#define STMFX_REG_GPO_SET1 0x6C /* RW */
>> +#define STMFX_REG_GPO_SET2 0x6D /* RW */
>> +#define STMFX_REG_GPO_SET3 0x6E /* RW */
>> +#define STMFX_REG_GPO_CLR1 0x70 /* RW */
>> +#define STMFX_REG_GPO_CLR2 0x71 /* RW */
>> +#define STMFX_REG_GPO_CLR3 0x72 /* RW */
>> +
>> +#define STMFX_REG_MAX 0xB0
>> +
>> +/* MFX boot time is around 10ms, so after reset, we have to wait this delay */
>> +#define STMFX_BOOT_TIME_MS 10
>> +
>> +/* STMFX_REG_CHIP_ID bitfields */
>> +#define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
>> +
>> +/* STMFX_REG_SYS_CTRL bitfields */
>> +#define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
>> +#define STMFX_REG_SYS_CTRL_TS_EN BIT(1)
>> +#define STMFX_REG_SYS_CTRL_IDD_EN BIT(2)
>> +#define STMFX_REG_SYS_CTRL_ALTGPIO_EN BIT(3)
>> +#define STMFX_REG_SYS_CTRL_SWRST BIT(7)
>> +
>> +/* STMFX_REG_IRQ_OUT_PIN bitfields */
>> +#define STMFX_REG_IRQ_OUT_PIN_TYPE BIT(0) /* 0-OD 1-PP */
>> +#define STMFX_REG_IRQ_OUT_PIN_POL BIT(1) /* 0-active LOW 1-active HIGH */
>> +
>> +/* STMFX_REG_IRQ_(SRC_EN/PENDING/ACK) bit shift */
>> +enum stmfx_irqs {
>> + STMFX_REG_IRQ_SRC_EN_GPIO = 0,
>> + STMFX_REG_IRQ_SRC_EN_IDD,
>> + STMFX_REG_IRQ_SRC_EN_ERROR,
>> + STMFX_REG_IRQ_SRC_EN_TS_DET,
>> + STMFX_REG_IRQ_SRC_EN_TS_NE,
>> + STMFX_REG_IRQ_SRC_EN_TS_TH,
>> + STMFX_REG_IRQ_SRC_EN_TS_FULL,
>> + STMFX_REG_IRQ_SRC_EN_TS_OVF,
>> + STMFX_REG_IRQ_SRC_MAX,
>> +};
>
> I'd prefer from here up to the includes to be placed into the header.
>
OK.
>> +/**
>> + * struct stmfx_ddata - STMFX MFD private structure
>
> You can drop '_ddata' from here (read next comment).
>
>> + * @stmfx: state holder with device for logs and register map
>
> I don't understand why this requires an additional struct.
>
>> + * @vdd: STMFX power supply
>> + * @irq_domain: IRQ domain
>> + * @lock: IRQ bus lock
>> + * @irq_src: cache of IRQ_SRC_EN register for bus_lock
>> + * @bkp_sysctrl: backup of SYS_CTRL register for suspend/resume
>> + * @bkp_irqoutpin: backup of IRQ_OUT_PIN register for suspend/resume
>> + */
>> +struct stmfx_ddata {
>> + struct stmfx *stmfx;
>> + struct regulator *vdd;
>> + struct irq_domain *irq_domain;
>> + struct mutex lock; /* IRQ bus lock */
>> + u8 irq_src;
>> +#ifdef CONFIG_PM
>> + u8 bkp_sysctrl;
>> + u8 bkp_irqoutpin;
>> +#endif
>
> I haven't seen this before.
>
> Why is this necessary for *this* device and no others?
>
Not necessary in fact. Private structure was here to reflect the mfd
core specific members because I thought it was useless for his children
to have access to these struct members.
>> +};
>> +
>> +static u8 stmfx_func_to_mask(u32 func)
>> +{
>> + u8 mask = 0;
>> +
>> + if (func & STMFX_FUNC_GPIO)
>> + mask |= STMFX_REG_SYS_CTRL_GPIO_EN;
>> +
>> + if ((func & STMFX_FUNC_ALTGPIO_LOW) || (func & STMFX_FUNC_ALTGPIO_HIGH))
>> + mask |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
>> +
>> + if (func & STMFX_FUNC_TS)
>> + mask |= STMFX_REG_SYS_CTRL_TS_EN;
>> +
>> + if (func & STMFX_FUNC_IDD)
>> + mask |= STMFX_REG_SYS_CTRL_IDD_EN;
>> +
>> + return mask;
>> +}
>> +
>> +int stmfx_function_enable(struct stmfx *stmfx, u32 func)
>> +{
>> + u32 sys_ctrl;
>> + u8 mask;
>> + int ret;
>> +
>> + ret = regmap_read(stmfx->map, STMFX_REG_SYS_CTRL, &sys_ctrl);
>> + if (ret)
>> + return ret;
>> +
>> + /*
>> + * IDD and TS have priority in STMFX FW, so if IDD and TS are enabled,
>> + * ALTGPIO function is disabled by STMFX FW. If IDD or TS is enabled,
>> + * the number of aGPIO available decreases. To avoid GPIO management
>> + * disturbance, abort IDD or TS function enable in this case.
>> + */
>> + if (((func & STMFX_FUNC_IDD) || (func & STMFX_FUNC_TS)) &&
>> + (sys_ctrl & STMFX_REG_SYS_CTRL_ALTGPIO_EN)) {
>> + dev_err(stmfx->dev, "ALTGPIO function already enabled\n");
>> + return -EBUSY;
>> + }
>> +
>> + /* If TS is enabled, aGPIO[3:0] cannot be used */
>> + if ((func & STMFX_FUNC_ALTGPIO_LOW) &&
>> + (sys_ctrl & STMFX_REG_SYS_CTRL_TS_EN)) {
>> + dev_err(stmfx->dev, "TS in use, aGPIO[3:0] unavailable\n");
>> + return -EBUSY;
>> + }
>> +
>> + /* If IDD is enabled, aGPIO[7:4] cannot be used */
>> + if ((func & STMFX_FUNC_ALTGPIO_HIGH) &&
>> + (sys_ctrl & STMFX_REG_SYS_CTRL_IDD_EN)) {
>> + dev_err(stmfx->dev, "IDD in use, aGPIO[7:4] unavailable\n");
>> + return -EBUSY;
>> + }
>> +
>> + mask = stmfx_func_to_mask(func);
>> +
>> + return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, mask);
>> +}
>> +EXPORT_SYMBOL_GPL(stmfx_function_enable);
>> +
>> +int stmfx_function_disable(struct stmfx *stmfx, u32 func)
>> +{
>> + u8 mask = stmfx_func_to_mask(func);
>> +
>> + return regmap_update_bits(stmfx->map, STMFX_REG_SYS_CTRL, mask, 0);
>> +}
>> +EXPORT_SYMBOL_GPL(stmfx_function_disable);
>> +
>> +static void stmfx_irq_bus_lock(struct irq_data *data)
>> +{
>> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
>> +
>> + mutex_lock(&ddata->lock);
>> +}
>> +
>> +static void stmfx_irq_bus_sync_unlock(struct irq_data *data)
>> +{
>> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
>> +
>> + regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, ddata->irq_src);
>> +
>> + mutex_unlock(&ddata->lock);
>> +}
>> +
>> +static void stmfx_irq_mask(struct irq_data *data)
>> +{
>> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
>> +
>> + ddata->irq_src &= ~BIT(data->hwirq % 8);
>> +}
>> +
>> +static void stmfx_irq_unmask(struct irq_data *data)
>> +{
>> + struct stmfx_ddata *ddata = irq_data_get_irq_chip_data(data);
>> +
>> + ddata->irq_src |= BIT(data->hwirq % 8);
>> +}
>> +
>> +static struct irq_chip stmfx_irq_chip = {
>> + .name = "stmfx-core",
>> + .irq_bus_lock = stmfx_irq_bus_lock,
>> + .irq_bus_sync_unlock = stmfx_irq_bus_sync_unlock,
>> + .irq_mask = stmfx_irq_mask,
>> + .irq_unmask = stmfx_irq_unmask,
>> +};
>> +
>> +static irqreturn_t stmfx_irq_handler(int irq, void *data)
>> +{
>> + struct stmfx_ddata *ddata = data;
>> + unsigned long n, pending;
>> + u32 ack;
>> + int ret;
>> +
>> + ret = regmap_read(ddata->stmfx->map, STMFX_REG_IRQ_PENDING,
>> + (u32 *)&pending);
>> + if (ret)
>> + return IRQ_NONE;
>> +
>> + /*
>> + * There is no ACK for GPIO, MFX_REG_IRQ_PENDING_GPIO is a logical OR
>> + * of MFX_REG_IRQ_GPI _PENDING1/_PENDING2/_PENDING3
>> + */
>> + ack = pending & ~BIT(STMFX_REG_IRQ_SRC_EN_GPIO);
>> + if (ack) {
>> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_ACK, ack);
>> + if (ret)
>> + return IRQ_NONE;
>> + }
>> +
>> + for_each_set_bit(n, &pending, STMFX_REG_IRQ_SRC_MAX)
>> + handle_nested_irq(irq_find_mapping(ddata->irq_domain, n));
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +static int stmfx_irq_map(struct irq_domain *d, unsigned int virq,
>> + irq_hw_number_t hwirq)
>> +{
>> + irq_set_chip_data(virq, d->host_data);
>> + irq_set_chip_and_handler(virq, &stmfx_irq_chip, handle_simple_irq);
>> + irq_set_nested_thread(virq, 1);
>> + irq_set_noprobe(virq);
>> +
>> + return 0;
>> +}
>> +
>> +static void stmfx_irq_unmap(struct irq_domain *d, unsigned int virq)
>> +{
>> + irq_set_chip_and_handler(virq, NULL, NULL);
>> + irq_set_chip_data(virq, NULL);
>> +}
>> +
>> +static const struct irq_domain_ops stmfx_irq_ops = {
>> + .map = stmfx_irq_map,
>> + .unmap = stmfx_irq_unmap,
>> +};
>> +
>> +static void stmfx_irq_exit(struct stmfx_ddata *ddata)
>> +{
>> + int hwirq;
>> +
>> + for (hwirq = 0; hwirq < STMFX_REG_IRQ_SRC_MAX; hwirq++)
>> + irq_dispose_mapping(irq_find_mapping(ddata->irq_domain, hwirq));
>
> '\n' here please.
>
>> + irq_domain_remove(ddata->irq_domain);
>> +}
>> +
>> +static int stmfx_irq_init(struct stmfx_ddata *ddata, int irq)
>> +{
>> + struct device *dev = ddata->stmfx->dev;
>
> Better to pass either 'dev' or 'pdev' around and extrapolate using the
> dev_get_drvdata() helpers, rather than the other way around.
>
I agree. I can pass i2c client and extrapolate using the
i2c_get_clientdata helper, here and in _irq_exit, _chip_init,
_chip_exit, to homogenize.
>> + u32 irqoutpin = 0, irqtrigger;
>> + int ret;
>> +
>> + ddata->irq_domain = irq_domain_add_simple(dev->of_node,
>> + STMFX_REG_IRQ_SRC_MAX, 0,
>> + &stmfx_irq_ops, ddata);
>> + if (!ddata->irq_domain) {
>> + dev_err(dev, "failed to create irq domain\n");
>
> s/irq/IRQ/
>
> I also prefer capital letters to start sentences, but it's not
> critical here.
>
OK, I will fix all typos.
>> + return -EINVAL;
>> + }
>> +
>> + if (!of_property_read_bool(dev->of_node, "drive-open-drain"))
>> + irqoutpin |= STMFX_REG_IRQ_OUT_PIN_TYPE;
>> +
>> + irqtrigger = irq_get_trigger_type(irq);
>> + if ((irqtrigger & IRQ_TYPE_EDGE_RISING) ||
>> + (irqtrigger & IRQ_TYPE_LEVEL_HIGH))
>> + irqoutpin |= STMFX_REG_IRQ_OUT_PIN_POL;
>> +
>> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN, irqoutpin);
>> + if (ret)
>> + return ret;
>> +
>> + ret = devm_request_threaded_irq(dev, irq, NULL, stmfx_irq_handler,
>> + irqtrigger | IRQF_ONESHOT,
>> + "stmfx", ddata);
>> + if (ret)
>> + stmfx_irq_exit(ddata);
>> +
>> + return ret;
>> +}
>> +
>> +static int stmfx_chip_reset(struct stmfx_ddata *ddata)
>> +{
>> + int ret;
>> +
>> + ret = regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
>> + STMFX_REG_SYS_CTRL_SWRST);
>> + if (ret)
>> + return ret;
>> +
>> + msleep(STMFX_BOOT_TIME_MS);
>> +
>> + return ret;
>> +}
>> +
>> +static int stmfx_chip_init(struct stmfx_ddata *ddata, struct i2c_client *client)
>
> No need to provide both ddata and client, you can extrapolate the
> former from the latter.
>
>> +{
>> + u32 id;
>> + u8 version[2];
>> + int ret;
>> +
>> + ddata->vdd = devm_regulator_get_optional(&client->dev, "vdd");
>> + if (IS_ERR(ddata->vdd)) {
>> + ret = PTR_ERR(ddata->vdd);
>> + if (ret != -ENODEV) {
>> + if (ret != -EPROBE_DEFER)
>> + dev_err(&client->dev,
>> + "no vdd regulator found:%d\n", ret);
>
> s/vdd/VDD/?
>
>> + return ret;
>> + }
>> + }
>> +
>> + if (!IS_ERR(ddata->vdd)) {
>
> Why not just 'else'?
>
>> + ret = regulator_enable(ddata->vdd);
>> + if (ret) {
>> + dev_err(&client->dev, "vdd enable failed: %d\n", ret);
>
> s/vdd/VDD/?
>
>> + return ret;
>> + }
>> + }
>> +
>> + ret = regmap_read(ddata->stmfx->map, STMFX_REG_CHIP_ID, &id);
>> + if (ret) {
>> + dev_err(&client->dev, "error reading chip id: %d\n", ret);
>
> s/id/ID/
>
>> + goto err;
>> + }
>> +
>> + /*
>> + * Check that ID is the complement of the I2C address:
>> + * STMFX I2C address follows the 7-bit format (MSB), that's why
>> + * client->addr is shifted.
>> + *
>> + * STMFX_I2C_ADDR| STMFX | Linux
>> + * input pin | I2C device address | I2C device address
>> + *---------------------------------------------------------
>> + * 0 | b: 1000 010x h:0x84 | 0x42
>> + * 1 | b: 1000 011x h:0x86 | 0x43
>> + */
>> + if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (client->addr << 1)) {
>> + dev_err(&client->dev, "unknown chip id: %#x\n", id);
>> + ret = -EINVAL;
>> + goto err;
>> + }
>> +
>> + ret = regmap_bulk_read(ddata->stmfx->map, STMFX_REG_FW_VERSION_MSB,
>> + version, ARRAY_SIZE(version));
>> + if (ret) {
>> + dev_err(&client->dev, "error reading fw version: %d\n", ret);
>> + goto err;
>> + }
>> +
>> + dev_info(&client->dev, "STMFX id: %#x, fw version: %x.%02x\n",
>> + id, version[0], version[1]);
>> +
>> + return stmfx_chip_reset(ddata);
>> +
>> +err:
>> + if (!IS_ERR(ddata->vdd))
>> + return regulator_disable(ddata->vdd);
>> +
>> + return ret;
>> +}
>> +
>> +static int stmfx_chip_exit(struct stmfx_ddata *ddata)
>> +{
>> + regmap_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN, 0);
>> + regmap_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL, 0);
>> +
>> + if (!IS_ERR(ddata->vdd))
>> + return regulator_disable(ddata->vdd);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct resource stmfx_pinctrl_resources[] = {
>> + DEFINE_RES_IRQ(STMFX_REG_IRQ_SRC_EN_GPIO),
>> +};
>> +
>> +static struct mfd_cell stmfx_cells[] = {
>> + {
>> + .of_compatible = "st,stmfx-0300-pinctrl",
>> + .name = "stmfx-pinctrl",
>> + .resources = stmfx_pinctrl_resources,
>> + .num_resources = ARRAY_SIZE(stmfx_pinctrl_resources),
>> + }
>> +};
>
> What other devices make up this MFD?
>
I can add two other cells for TouchScreen feature with TouchScreen
interrupts, and IDD feature with IDD and Error interrupt (used by IDD
module to raise default/error encountered during IDD measurement).
>> +static bool stmfx_reg_volatile(struct device *dev, unsigned int reg)
>> +{
>> + switch (reg) {
>> + case STMFX_REG_SYS_CTRL:
>> + case STMFX_REG_IRQ_SRC_EN:
>> + case STMFX_REG_IRQ_PENDING:
>> + case STMFX_REG_IRQ_GPI_PENDING1:
>> + case STMFX_REG_IRQ_GPI_PENDING2:
>> + case STMFX_REG_IRQ_GPI_PENDING3:
>> + case STMFX_REG_GPIO_STATE1:
>> + case STMFX_REG_GPIO_STATE2:
>> + case STMFX_REG_GPIO_STATE3:
>> + case STMFX_REG_IRQ_GPI_SRC1:
>> + case STMFX_REG_IRQ_GPI_SRC2:
>> + case STMFX_REG_IRQ_GPI_SRC3:
>> + case STMFX_REG_GPO_SET1:
>> + case STMFX_REG_GPO_SET2:
>> + case STMFX_REG_GPO_SET3:
>> + case STMFX_REG_GPO_CLR1:
>> + case STMFX_REG_GPO_CLR2:
>> + case STMFX_REG_GPO_CLR3:
>> + return true;
>> + default:
>> + return false;
>> + }
>> +}
>> +
>> +static bool stmfx_reg_writeable(struct device *dev, unsigned int reg)
>> +{
>> + return (reg >= STMFX_REG_SYS_CTRL);
>> +}
>> +
>> +static const struct regmap_config stmfx_regmap_config = {
>> + .reg_bits = 8,
>> + .reg_stride = 1,
>> + .val_bits = 8,
>> + .max_register = STMFX_REG_MAX,
>> + .volatile_reg = stmfx_reg_volatile,
>> + .writeable_reg = stmfx_reg_writeable,
>> + .cache_type = REGCACHE_RBTREE,
>> +};
>> +
>> +static int stmfx_probe(struct i2c_client *client,
>> + const struct i2c_device_id *id)
>> +{
>> + struct device *dev = &client->dev;
>> + struct stmfx_ddata *ddata;
>> + int i, ret;
>> +
>> + ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
>> + if (!ddata)
>> + return -ENOMEM;
>
> '\n' here please.
>
>> + /* State holder */
>> + ddata->stmfx = devm_kzalloc(dev, sizeof(*ddata->stmfx), GFP_KERNEL);
>> + if (!ddata->stmfx)
>> + return -ENOMEM;
>> +
>> + i2c_set_clientdata(client, ddata);
>> +
>> + ddata->stmfx->dev = dev;
>> +
>> + ddata->stmfx->map = devm_regmap_init_i2c(client, &stmfx_regmap_config);
>
> Just put this straight into the parent struct and do away with the
> extra complication.
>
>> + if (IS_ERR(ddata->stmfx->map)) {
>> + ret = PTR_ERR(ddata->stmfx->map);
>> + dev_err(dev, "failed to allocate register map: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + mutex_init(&ddata->lock);
>> +
>> + ret = stmfx_chip_init(ddata, client);
>> + if (ret) {
>> + if (ret == -ETIMEDOUT)
>> + return -EPROBE_DEFER;
>> + return ret;
>> + }
>> +
>> + if (client->irq < 0) {
>> + dev_err(dev, "failed to get irq: %d\n", client->irq);
>> + ret = client->irq;
>> + goto err_chip_exit;
>> + }
>> +
>> + ret = stmfx_irq_init(ddata, client->irq);
>> + if (ret)
>> + goto err_chip_exit;
>> +
>> + for (i = 0; i < ARRAY_SIZE(stmfx_cells); i++) {
>> + stmfx_cells[i].platform_data = ddata->stmfx;
>> + stmfx_cells[i].pdata_size = sizeof(struct stmfx);
>> + }
>> +
>> + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
>> + stmfx_cells, ARRAY_SIZE(stmfx_cells), NULL,
>> + 0, ddata->irq_domain);
>> + if (ret)
>> + goto err_irq_exit;
>> +
>> + return 0;
>> +
>> +err_irq_exit:
>> + stmfx_irq_exit(ddata);
>> +err_chip_exit:
>> + stmfx_chip_exit(ddata);
>> +
>> + return ret;
>> +}
>> +
>> +static int stmfx_remove(struct i2c_client *client)
>> +{
>> + struct stmfx_ddata *ddata = i2c_get_clientdata(client);
>> +
>> + stmfx_irq_exit(ddata);
>> +
>> + return stmfx_chip_exit(ddata);
>> +}
>> +
>> +#ifdef CONFIG_PM_SLEEP
>> +static int stmfx_backup_regs(struct stmfx_ddata *ddata)
>> +{
>> + int ret;
>> +
>> + ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
>> + &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
>> + if (ret)
>> + return ret;
>> + ret = regmap_raw_read(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
>> + &ddata->bkp_irqoutpin,
>> + sizeof(ddata->bkp_irqoutpin));
>> + if (ret)
>> + return ret;
>> +
>> + return 0;
>> +}
>> +
>> +static int stmfx_restore_regs(struct stmfx_ddata *ddata)
>> +{
>> + int ret;
>> +
>> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_SYS_CTRL,
>> + &ddata->bkp_sysctrl, sizeof(ddata->bkp_sysctrl));
>> + if (ret)
>> + return ret;
>> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_OUT_PIN,
>> + &ddata->bkp_irqoutpin,
>> + sizeof(ddata->bkp_irqoutpin));
>> + if (ret)
>> + return ret;
>> + ret = regmap_raw_write(ddata->stmfx->map, STMFX_REG_IRQ_SRC_EN,
>> + &ddata->irq_src, sizeof(ddata->irq_src));
>> + if (ret)
>> + return ret;
>> +
>> + return 0;
>> +}
>> +
>> +static int stmfx_suspend(struct device *dev)
>> +{
>> + struct stmfx_ddata *ddata = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + ret = stmfx_backup_regs(ddata);
>> + if (ret) {
>> + dev_err(ddata->stmfx->dev, "registers backup failure\n");
>> + return ret;
>> + }
>> +
>> + if (!IS_ERR(ddata->vdd)) {
>> + ret = regulator_disable(ddata->vdd);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int stmfx_resume(struct device *dev)
>> +{
>> + struct stmfx_ddata *ddata = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + if (!IS_ERR(ddata->vdd)) {
>> + ret = regulator_enable(ddata->vdd);
>> + if (ret) {
>> + dev_err(ddata->stmfx->dev,
>> + "vdd enable failed: %d\n", ret);
>> + return ret;
>> + }
>> + }
>> +
>> + ret = stmfx_restore_regs(ddata);
>> + if (ret) {
>> + dev_err(ddata->stmfx->dev, "registers restoration failure\n");
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +#endif
>> +
>> +static SIMPLE_DEV_PM_OPS(stmfx_dev_pm_ops, stmfx_suspend, stmfx_resume);
>> +
>> +static const struct of_device_id stmfx_of_match[] = {
>> + { .compatible = "st,stmfx-0300", },
>> + {},
>> +};
>> +MODULE_DEVICE_TABLE(of, stmfx_of_match);
>> +
>> +static struct i2c_driver stmfx_driver = {
>> + .driver = {
>> + .name = "stmfx-core",
>> + .of_match_table = of_match_ptr(stmfx_of_match),
>> + .pm = &stmfx_dev_pm_ops,
>> + },
>> + .probe = stmfx_probe,
>> + .remove = stmfx_remove,
>> +};
>> +module_i2c_driver(stmfx_driver);
>> +
>> +MODULE_DESCRIPTION("STMFX core driver");
>> +MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
>> +MODULE_LICENSE("GPL v2");
>> diff --git a/include/linux/mfd/stmfx.h b/include/linux/mfd/stmfx.h
>> new file mode 100644
>> index 0000000..35c3d42
>> --- /dev/null
>> +++ b/include/linux/mfd/stmfx.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Copyright (C) 2018 STMicroelectronics
>> + * Author(s): Amelie Delaunay <amelie.delaunay@st.com>.
>> + */
>> +
>> +#ifndef MFD_STMFX_H
>> +#define MFX_STMFX_H
>> +
>> +#include <linux/regmap.h>
>> +
>> +enum stmfx_functions {
>> + STMFX_FUNC_GPIO = BIT(0), /* GPIO[15:0] */
>> + STMFX_FUNC_ALTGPIO_LOW = BIT(1), /* aGPIO[3:0] */
>> + STMFX_FUNC_ALTGPIO_HIGH = BIT(2), /* aGPIO[7:4] */
>> + STMFX_FUNC_TS = BIT(3),
>> + STMFX_FUNC_IDD = BIT(4),
>> +};
>> +
>> +struct stmfx {
>> + struct device *dev;
>> + struct regmap *map;
>> +};
>> +
>> +int stmfx_function_enable(struct stmfx *stmfx, u32 func);
>> +int stmfx_function_disable(struct stmfx *stmfx, u32 func);
>> +#endif
>
V4 is coming, based on your comments. Thanks for the review.
Regards,
Amelie
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-02-27 9:32 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-27 11:39 [PATCH v3 0/7] Introduce STMFX I2C Multi-Function eXpander Amelie Delaunay
2018-09-27 11:39 ` [PATCH v3 1/7] dt-bindings: mfd: Add ST Multi-Function eXpander (STMFX) core bindings Amelie Delaunay
2018-10-09 9:56 ` Lee Jones
2018-10-12 14:39 ` Rob Herring
2018-09-27 11:39 ` [PATCH v3 2/7] mfd: Add ST Multi-Function eXpander (STMFX) core driver Amelie Delaunay
2018-10-09 9:55 ` Lee Jones
2019-02-27 9:32 ` Amelie DELAUNAY
2018-09-27 11:40 ` [PATCH v3 3/7] dt-bindings: pinctrl: document the STMFX pinctrl bindings Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 4/7] pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 5/7] ARM: dts: stm32: add STMFX support on stm32746g-eval Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 6/7] ARM: dts: stm32: add joystick " Amelie Delaunay
2018-09-27 11:40 ` [PATCH v3 7/7] ARM: dts: stm32: add orange and blue leds " Amelie Delaunay
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