* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
@ 2018-10-14 8:13 ` Thomas Gleixner
2018-10-14 8:14 ` Christoph Hellwig
2018-10-14 9:18 ` [tip:x86/urgent] x86/swiotlb: Enable " tip-bot for Christoph Hellwig
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: Thomas Gleixner @ 2018-10-14 8:13 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: x86, tedheadster, konrad.wilk, iommu, linux-kernel
On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
>
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
>
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster@gmail.com>
> Tested-by: tedheadster <tedheadster@gmail.com>
I'll add your SOB when picking this up :)
> ---
> arch/x86/kernel/pci-swiotlb.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
> int __init pci_swiotlb_detect_4gb(void)
> {
> /* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
> if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
> swiotlb = 1;
> -#endif
>
> /*
> * If SME is active then swiotlb will be set to 1 so that bounce
> --
> 2.19.1
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 8:13 ` Thomas Gleixner
@ 2018-10-14 8:14 ` Christoph Hellwig
2018-10-14 8:57 ` Thomas Gleixner
0 siblings, 1 reply; 10+ messages in thread
From: Christoph Hellwig @ 2018-10-14 8:14 UTC (permalink / raw)
To: Thomas Gleixner
Cc: Christoph Hellwig, x86, tedheadster, konrad.wilk, iommu, linux-kernel
On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
>
> > We already build the swiotlb code for 32b-t kernels with PAE support,
> > but the code to actually use swiotlb has only been enabled for 64-bit
> > kernel for an unknown reason.
> >
> > Before Linux 4.18 we papers over this fact because the networking code,
> > the scsi layer and some random block drivers implenented their own
> > bounce buffering scheme.
> >
> > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> > Reported-by: tedheadster <tedheadster@gmail.com>
> > Tested-by: tedheadster <tedheadster@gmail.com>
>
> I'll add your SOB when picking this up :)
Thanks. Here it is in writing:
Signed-off-by: Christoph Hellwig <hch@lst.de>
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 8:14 ` Christoph Hellwig
@ 2018-10-14 8:57 ` Thomas Gleixner
2018-10-14 9:04 ` Ingo Molnar
0 siblings, 1 reply; 10+ messages in thread
From: Thomas Gleixner @ 2018-10-14 8:57 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: x86, tedheadster, konrad.wilk, iommu, linux-kernel
On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> >
> > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > kernel for an unknown reason.
> > >
> > > Before Linux 4.18 we papers over this fact because the networking code,
> > > the scsi layer and some random block drivers implenented their own
> > > bounce buffering scheme.
> > >
> > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
Please use the first 12 characters of the commit SHA for fixes tags in the
future, as documented. No need to resend, I fixed it up for you and added a
Cc: stable as well
Thanks,
tglx
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 8:57 ` Thomas Gleixner
@ 2018-10-14 9:04 ` Ingo Molnar
2018-10-14 12:49 ` tedheadster
0 siblings, 1 reply; 10+ messages in thread
From: Ingo Molnar @ 2018-10-14 9:04 UTC (permalink / raw)
To: Thomas Gleixner
Cc: Christoph Hellwig, x86, tedheadster, konrad.wilk, iommu, linux-kernel
* Thomas Gleixner <tglx@linutronix.de> wrote:
> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
>
> > On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> > >
> > > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > > kernel for an unknown reason.
> > > >
> > > > Before Linux 4.18 we papers over this fact because the networking code,
> > > > the scsi layer and some random block drivers implenented their own
> > > > bounce buffering scheme.
> > > >
> > > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
>
> Please use the first 12 characters of the commit SHA for fixes tags in the
> future, as documented. No need to resend, I fixed it up for you and added a
> Cc: stable as well
For those who have their ~/.gitconfig's from ancient Git history, this can be done via:
git config --global core.abbrev 12
Thanks,
Ingo
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 9:04 ` Ingo Molnar
@ 2018-10-14 12:49 ` tedheadster
0 siblings, 0 replies; 10+ messages in thread
From: tedheadster @ 2018-10-14 12:49 UTC (permalink / raw)
To: mingo
Cc: Thomas Gleixner, Christoph Hellwig, x86, konrad.wilk, iommu,
Linux Kernel Mailing List
Please change:
Reported-by: tedheadster <tedheadster@gmail.com>
Tested-by: tedheadster <tedheadster@gmail.com>
to
Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>
- Matthew
^ permalink raw reply [flat|nested] 10+ messages in thread
* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
2018-10-14 8:13 ` Thomas Gleixner
@ 2018-10-14 9:18 ` tip-bot for Christoph Hellwig
2018-10-15 9:09 ` tip-bot for Christoph Hellwig
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-14 9:18 UTC (permalink / raw)
To: linux-tip-commits; +Cc: tedheadster, mingo, hpa, hch, linux-kernel, tglx
Commit-ID: ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Gitweb: https://git.kernel.org/tip/ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Author: Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 14 Oct 2018 11:11:23 +0200
x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.
Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.
Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster@gmail.com>
Tested-by: tedheadster <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de
---
arch/x86/kernel/pci-swiotlb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
int __init pci_swiotlb_detect_4gb(void)
{
/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
swiotlb = 1;
-#endif
/*
* If SME is active then swiotlb will be set to 1 so that bounce
^ permalink raw reply related [flat|nested] 10+ messages in thread* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
2018-10-14 8:13 ` Thomas Gleixner
2018-10-14 9:18 ` [tip:x86/urgent] x86/swiotlb: Enable " tip-bot for Christoph Hellwig
@ 2018-10-15 9:09 ` tip-bot for Christoph Hellwig
2018-10-15 18:52 ` [PATCH] x86: enable " Konrad Rzeszutek Wilk
2018-10-19 5:54 ` [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM " tip-bot for Christoph Hellwig
4 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-15 9:09 UTC (permalink / raw)
To: linux-tip-commits; +Cc: linux-kernel, hch, mingo, tglx, tedheadster, hpa
Commit-ID: 6f3bc8028570e4c326030e8795dbcd57c561b723
Gitweb: https://git.kernel.org/tip/6f3bc8028570e4c326030e8795dbcd57c561b723
Author: Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 15 Oct 2018 10:55:03 +0200
x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.
Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.
Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de
---
arch/x86/kernel/pci-swiotlb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
int __init pci_swiotlb_detect_4gb(void)
{
/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
swiotlb = 1;
-#endif
/*
* If SME is active then swiotlb will be set to 1 so that bounce
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
` (2 preceding siblings ...)
2018-10-15 9:09 ` tip-bot for Christoph Hellwig
@ 2018-10-15 18:52 ` Konrad Rzeszutek Wilk
2018-10-19 5:54 ` [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM " tip-bot for Christoph Hellwig
4 siblings, 0 replies; 10+ messages in thread
From: Konrad Rzeszutek Wilk @ 2018-10-15 18:52 UTC (permalink / raw)
To: Christoph Hellwig, x86; +Cc: tedheadster, iommu, linux-kernel
On 10/14/18 3:52 AM, Christoph Hellwig wrote:
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
>
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
>
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster@gmail.com>
> Tested-by: tedheadster <tedheadster@gmail.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
But since it is already in 'tip' feel free to ignore my tag.
Thanks!
> ---
> arch/x86/kernel/pci-swiotlb.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
> int __init pci_swiotlb_detect_4gb(void)
> {
> /* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
> if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
> swiotlb = 1;
> -#endif
>
> /*
> * If SME is active then swiotlb will be set to 1 so that bounce
>
^ permalink raw reply [flat|nested] 10+ messages in thread* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM on 32-bit kernels
2018-10-14 7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
` (3 preceding siblings ...)
2018-10-15 18:52 ` [PATCH] x86: enable " Konrad Rzeszutek Wilk
@ 2018-10-19 5:54 ` tip-bot for Christoph Hellwig
4 siblings, 0 replies; 10+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-19 5:54 UTC (permalink / raw)
To: linux-tip-commits; +Cc: hch, mingo, tedheadster, hpa, tglx, linux-kernel
Commit-ID: 485734f3fc77c1eb77ffe138c027b9a4bf0178f3
Gitweb: https://git.kernel.org/tip/485734f3fc77c1eb77ffe138c027b9a4bf0178f3
Author: Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Fri, 19 Oct 2018 07:49:32 +0200
x86/swiotlb: Enable swiotlb for > 4GiG RAM on 32-bit kernels
We already build the swiotlb code for 32-bit kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernels for an unknown reason.
Before Linux v4.18 we paper over this fact because the networking code,
the SCSI layer and some random block drivers implemented their own
bounce buffering scheme.
[ mingo: Changelog fixes. ]
Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/pci-swiotlb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
int __init pci_swiotlb_detect_4gb(void)
{
/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
swiotlb = 1;
-#endif
/*
* If SME is active then swiotlb will be set to 1 so that bounce
^ permalink raw reply related [flat|nested] 10+ messages in thread