* [PATCH 0/3] omap2-mcspi: Add slave mode support
@ 2018-10-15 6:38 Vignesh R
2018-10-15 6:38 ` [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() Vignesh R
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Vignesh R @ 2018-10-15 6:38 UTC (permalink / raw)
To: Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel, Vignesh R, Sekhar Nori
This series add slave mode support for TI's McSPI controller.
Slave mode tested on Beagle Bone Black with SPI0 in master mode
connected to SPI1 in slave mode. Tested with slave-time,
slave-system-control and spidev as slave clients.
Master mode tested on AM335x ICEv2 with a SPI flash for regression.
Vignesh R (3):
spi: omap2-mcspi: Switch to readl_poll_timeout()
spi: omap2-mcspi: Set FIFO DMA trigger level to word length
spi: omap2-mcspi: Add slave mode support
drivers/spi/spi-omap2-mcspi.c | 177 +++++++++++++++++++++++++---------
1 file changed, 131 insertions(+), 46 deletions(-)
--
2.19.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() 2018-10-15 6:38 [PATCH 0/3] omap2-mcspi: Add slave mode support Vignesh R @ 2018-10-15 6:38 ` Vignesh R 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Switch to readl_poll_timeout()" to the spi tree Mark Brown 2018-10-15 6:38 ` [PATCH 2/3] spi: omap2-mcspi: Set FIFO DMA trigger level to word length Vignesh R 2018-10-15 6:38 ` [PATCH 3/3] spi: omap2-mcspi: Add slave mode support Vignesh R 2 siblings, 1 reply; 11+ messages in thread From: Vignesh R @ 2018-10-15 6:38 UTC (permalink / raw) To: Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel, Vignesh R, Sekhar Nori Use standard readl_poll_timeout() macro for polling on status bits. Signed-off-by: Vignesh R <vigneshr@ti.com> --- drivers/spi/spi-omap2-mcspi.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 508c61c669e7..985f00d8a964 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -33,6 +33,7 @@ #include <linux/of.h> #include <linux/of_device.h> #include <linux/gcd.h> +#include <linux/iopoll.h> #include <linux/spi/spi.h> #include <linux/gpio.h> @@ -353,19 +354,9 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) { - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(1000); - while (!(readl_relaxed(reg) & bit)) { - if (time_after(jiffies, timeout)) { - if (!(readl_relaxed(reg) & bit)) - return -ETIMEDOUT; - else - return 0; - } - cpu_relax(); - } - return 0; + u32 val; + + return readl_poll_timeout(reg, val, val & bit, 1, MSEC_PER_SEC); } static void omap2_mcspi_rx_callback(void *data) -- 2.19.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Applied "spi: omap2-mcspi: Switch to readl_poll_timeout()" to the spi tree 2018-10-15 6:38 ` [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() Vignesh R @ 2018-10-19 12:29 ` Mark Brown 0 siblings, 0 replies; 11+ messages in thread From: Mark Brown @ 2018-10-19 12:29 UTC (permalink / raw) To: Vignesh R Cc: Mark Brown, Mark Brown, linux-spi, linux-omap, linux-kernel, Sekhar Nori, linux-spi The patch spi: omap2-mcspi: Switch to readl_poll_timeout() has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 4d3eea971b45792882a5b6b7bc7ceccea4ae6c76 Mon Sep 17 00:00:00 2001 From: Vignesh R <vigneshr@ti.com> Date: Mon, 15 Oct 2018 12:08:27 +0530 Subject: [PATCH] spi: omap2-mcspi: Switch to readl_poll_timeout() Use standard readl_poll_timeout() macro for polling on status bits. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-omap2-mcspi.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 508c61c669e7..985f00d8a964 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -33,6 +33,7 @@ #include <linux/of.h> #include <linux/of_device.h> #include <linux/gcd.h> +#include <linux/iopoll.h> #include <linux/spi/spi.h> #include <linux/gpio.h> @@ -353,19 +354,9 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) { - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(1000); - while (!(readl_relaxed(reg) & bit)) { - if (time_after(jiffies, timeout)) { - if (!(readl_relaxed(reg) & bit)) - return -ETIMEDOUT; - else - return 0; - } - cpu_relax(); - } - return 0; + u32 val; + + return readl_poll_timeout(reg, val, val & bit, 1, MSEC_PER_SEC); } static void omap2_mcspi_rx_callback(void *data) -- 2.19.0.rc2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/3] spi: omap2-mcspi: Set FIFO DMA trigger level to word length 2018-10-15 6:38 [PATCH 0/3] omap2-mcspi: Add slave mode support Vignesh R 2018-10-15 6:38 ` [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() Vignesh R @ 2018-10-15 6:38 ` Vignesh R 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Set FIFO DMA trigger level to word length" to the spi tree Mark Brown 2018-10-15 6:38 ` [PATCH 3/3] spi: omap2-mcspi: Add slave mode support Vignesh R 2 siblings, 1 reply; 11+ messages in thread From: Vignesh R @ 2018-10-15 6:38 UTC (permalink / raw) To: Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel, Vignesh R, Sekhar Nori McSPI has 32 byte FIFO in Transmit-Receive mode. Current code tries to configuration FIFO watermark level for DMA trigger to be GCD of transfer length and max FIFO size which would mean trigger level may be set to 32 for transmit-receive mode if length is aligned. This does not work in case of SPI slave mode where FIFO always needs to have data ready whenever master starts the clock. With DMA trigger size of 32 there will be a small window during slave TX where DMA is still putting data into FIFO but master would have started clock for next byte, resulting in shifting out of stale data. Similarly, on Slave RX side there may be RX FIFO overflow Fix this by setting FIFO watermark for DMA trigger to word length. This means DMA is triggered as soon as FIFO has space for word length bytes and DMA would make sure FIFO is almost always full therefore improving FIFO occupancy in both master and slave mode. Signed-off-by: Vignesh R <vigneshr@ti.com> --- drivers/spi/spi-omap2-mcspi.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 985f00d8a964..88469bb22235 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -300,7 +300,7 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, struct omap2_mcspi_cs *cs = spi->controller_state; struct omap2_mcspi *mcspi; unsigned int wcnt; - int max_fifo_depth, fifo_depth, bytes_per_word; + int max_fifo_depth, bytes_per_word; u32 chconf, xferlevel; mcspi = spi_master_get_devdata(master); @@ -316,10 +316,6 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, else max_fifo_depth = OMAP2_MCSPI_MAX_FIFODEPTH; - fifo_depth = gcd(t->len, max_fifo_depth); - if (fifo_depth < 2 || fifo_depth % bytes_per_word != 0) - goto disable_fifo; - wcnt = t->len / bytes_per_word; if (wcnt > OMAP2_MCSPI_MAX_FIFOWCNT) goto disable_fifo; @@ -327,16 +323,17 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, xferlevel = wcnt << 16; if (t->rx_buf != NULL) { chconf |= OMAP2_MCSPI_CHCONF_FFER; - xferlevel |= (fifo_depth - 1) << 8; + xferlevel |= (bytes_per_word - 1) << 8; } + if (t->tx_buf != NULL) { chconf |= OMAP2_MCSPI_CHCONF_FFET; - xferlevel |= fifo_depth - 1; + xferlevel |= bytes_per_word - 1; } mcspi_write_reg(master, OMAP2_MCSPI_XFERLEVEL, xferlevel); mcspi_write_chconf0(spi, chconf); - mcspi->fifo_depth = fifo_depth; + mcspi->fifo_depth = max_fifo_depth; return; } @@ -576,7 +573,6 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) struct dma_slave_config cfg; enum dma_slave_buswidth width; unsigned es; - u32 burst; void __iomem *chstat_reg; void __iomem *irqstat_reg; int wait_res; @@ -596,22 +592,14 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) } count = xfer->len; - burst = 1; - - if (mcspi->fifo_depth > 0) { - if (count > mcspi->fifo_depth) - burst = mcspi->fifo_depth / es; - else - burst = count / es; - } memset(&cfg, 0, sizeof(cfg)); cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0; cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0; cfg.src_addr_width = width; cfg.dst_addr_width = width; - cfg.src_maxburst = burst; - cfg.dst_maxburst = burst; + cfg.src_maxburst = es; + cfg.dst_maxburst = es; rx = xfer->rx_buf; tx = xfer->tx_buf; -- 2.19.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Applied "spi: omap2-mcspi: Set FIFO DMA trigger level to word length" to the spi tree 2018-10-15 6:38 ` [PATCH 2/3] spi: omap2-mcspi: Set FIFO DMA trigger level to word length Vignesh R @ 2018-10-19 12:29 ` Mark Brown 0 siblings, 0 replies; 11+ messages in thread From: Mark Brown @ 2018-10-19 12:29 UTC (permalink / raw) To: Vignesh R Cc: Mark Brown, Mark Brown, linux-spi, linux-omap, linux-kernel, Sekhar Nori, linux-spi The patch spi: omap2-mcspi: Set FIFO DMA trigger level to word length has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From c367dadf3cfda3760005eecb7613db49bd9aba7c Mon Sep 17 00:00:00 2001 From: Vignesh R <vigneshr@ti.com> Date: Mon, 15 Oct 2018 12:08:28 +0530 Subject: [PATCH] spi: omap2-mcspi: Set FIFO DMA trigger level to word length McSPI has 32 byte FIFO in Transmit-Receive mode. Current code tries to configuration FIFO watermark level for DMA trigger to be GCD of transfer length and max FIFO size which would mean trigger level may be set to 32 for transmit-receive mode if length is aligned. This does not work in case of SPI slave mode where FIFO always needs to have data ready whenever master starts the clock. With DMA trigger size of 32 there will be a small window during slave TX where DMA is still putting data into FIFO but master would have started clock for next byte, resulting in shifting out of stale data. Similarly, on Slave RX side there may be RX FIFO overflow Fix this by setting FIFO watermark for DMA trigger to word length. This means DMA is triggered as soon as FIFO has space for word length bytes and DMA would make sure FIFO is almost always full therefore improving FIFO occupancy in both master and slave mode. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-omap2-mcspi.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 985f00d8a964..88469bb22235 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -300,7 +300,7 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, struct omap2_mcspi_cs *cs = spi->controller_state; struct omap2_mcspi *mcspi; unsigned int wcnt; - int max_fifo_depth, fifo_depth, bytes_per_word; + int max_fifo_depth, bytes_per_word; u32 chconf, xferlevel; mcspi = spi_master_get_devdata(master); @@ -316,10 +316,6 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, else max_fifo_depth = OMAP2_MCSPI_MAX_FIFODEPTH; - fifo_depth = gcd(t->len, max_fifo_depth); - if (fifo_depth < 2 || fifo_depth % bytes_per_word != 0) - goto disable_fifo; - wcnt = t->len / bytes_per_word; if (wcnt > OMAP2_MCSPI_MAX_FIFOWCNT) goto disable_fifo; @@ -327,16 +323,17 @@ static void omap2_mcspi_set_fifo(const struct spi_device *spi, xferlevel = wcnt << 16; if (t->rx_buf != NULL) { chconf |= OMAP2_MCSPI_CHCONF_FFER; - xferlevel |= (fifo_depth - 1) << 8; + xferlevel |= (bytes_per_word - 1) << 8; } + if (t->tx_buf != NULL) { chconf |= OMAP2_MCSPI_CHCONF_FFET; - xferlevel |= fifo_depth - 1; + xferlevel |= bytes_per_word - 1; } mcspi_write_reg(master, OMAP2_MCSPI_XFERLEVEL, xferlevel); mcspi_write_chconf0(spi, chconf); - mcspi->fifo_depth = fifo_depth; + mcspi->fifo_depth = max_fifo_depth; return; } @@ -576,7 +573,6 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) struct dma_slave_config cfg; enum dma_slave_buswidth width; unsigned es; - u32 burst; void __iomem *chstat_reg; void __iomem *irqstat_reg; int wait_res; @@ -596,22 +592,14 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) } count = xfer->len; - burst = 1; - - if (mcspi->fifo_depth > 0) { - if (count > mcspi->fifo_depth) - burst = mcspi->fifo_depth / es; - else - burst = count / es; - } memset(&cfg, 0, sizeof(cfg)); cfg.src_addr = cs->phys + OMAP2_MCSPI_RX0; cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0; cfg.src_addr_width = width; cfg.dst_addr_width = width; - cfg.src_maxburst = burst; - cfg.dst_maxburst = burst; + cfg.src_maxburst = es; + cfg.dst_maxburst = es; rx = xfer->rx_buf; tx = xfer->tx_buf; -- 2.19.0.rc2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/3] spi: omap2-mcspi: Add slave mode support 2018-10-15 6:38 [PATCH 0/3] omap2-mcspi: Add slave mode support Vignesh R 2018-10-15 6:38 ` [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() Vignesh R 2018-10-15 6:38 ` [PATCH 2/3] spi: omap2-mcspi: Set FIFO DMA trigger level to word length Vignesh R @ 2018-10-15 6:38 ` Vignesh R 2018-10-15 8:23 ` Sekhar Nori 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Add slave mode support" to the spi tree Mark Brown 2 siblings, 2 replies; 11+ messages in thread From: Vignesh R @ 2018-10-15 6:38 UTC (permalink / raw) To: Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel, Vignesh R, Sekhar Nori Add support to use McSPI controller as SPI slave. In slave mode, DMA TX completion does not mean entire data has been shifted out as data might still be stuck in FIFO waiting for master to clock the bus. Therefore, add an IRQ handler for slave mode to know when entire data in FIFO has been shifted out. Signed-off-by: Vignesh R <vigneshr@ti.com> --- drivers/spi/spi-omap2-mcspi.c | 138 ++++++++++++++++++++++++++++++---- 1 file changed, 122 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 88469bb22235..f024c3fc3679 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -127,6 +127,7 @@ struct omap2_mcspi_regs { }; struct omap2_mcspi { + struct completion txdone; struct spi_master *master; /* Virtual base address of the controller */ void __iomem *base; @@ -136,6 +137,7 @@ struct omap2_mcspi { struct device *dev; struct omap2_mcspi_regs ctx; int fifo_depth; + bool slave_aborted; unsigned int pin_dir:1; }; @@ -275,19 +277,23 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) } } -static void omap2_mcspi_set_master_mode(struct spi_master *master) +static void omap2_mcspi_set_mode(struct spi_master *master) { struct omap2_mcspi *mcspi = spi_master_get_devdata(master); struct omap2_mcspi_regs *ctx = &mcspi->ctx; u32 l; /* - * Setup when switching from (reset default) slave mode - * to single-channel master mode + * Choose master or slave mode */ l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL); - l &= ~(OMAP2_MCSPI_MODULCTRL_STEST | OMAP2_MCSPI_MODULCTRL_MS); - l |= OMAP2_MCSPI_MODULCTRL_SINGLE; + l &= ~(OMAP2_MCSPI_MODULCTRL_STEST); + if (spi_controller_is_slave(master)) { + l |= (OMAP2_MCSPI_MODULCTRL_MS); + } else { + l &= ~(OMAP2_MCSPI_MODULCTRL_MS); + l |= OMAP2_MCSPI_MODULCTRL_SINGLE; + } mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l); ctx->modulctrl = l; @@ -356,6 +362,20 @@ static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) return readl_poll_timeout(reg, val, val & bit, 1, MSEC_PER_SEC); } +static int mcspi_wait_for_completion(struct omap2_mcspi *mcspi, + struct completion *x) +{ + if (spi_controller_is_slave(mcspi->master)) { + if (wait_for_completion_interruptible(x) || + mcspi->slave_aborted) + return -EINTR; + } else { + wait_for_completion(x); + } + + return 0; +} + static void omap2_mcspi_rx_callback(void *data) { struct spi_device *spi = data; @@ -505,7 +525,12 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, dma_async_issue_pending(mcspi_dma->dma_rx); omap2_mcspi_set_dma_req(spi, 1, 1); - wait_for_completion(&mcspi_dma->dma_rx_completion); + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_rx_completion); + if (ret || mcspi->slave_aborted) { + dmaengine_terminate_sync(mcspi_dma->dma_rx); + omap2_mcspi_set_dma_req(spi, 1, 0); + return 0; + } for (x = 0; x < nb_sizes; x++) kfree(sg_out[x]); @@ -604,14 +629,37 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) rx = xfer->rx_buf; tx = xfer->tx_buf; - if (tx != NULL) + mcspi->slave_aborted = false; + reinit_completion(&mcspi_dma->dma_tx_completion); + reinit_completion(&mcspi_dma->dma_rx_completion); + reinit_completion(&mcspi->txdone); + if (tx) { + /* Enable EOW IRQ to know end of tx in slave mode */ + if (spi_controller_is_slave(spi->master)) + mcspi_write_reg(spi->master, + OMAP2_MCSPI_IRQENABLE, + OMAP2_MCSPI_IRQSTATUS_EOW); omap2_mcspi_tx_dma(spi, xfer, cfg); + } if (rx != NULL) count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); if (tx != NULL) { - wait_for_completion(&mcspi_dma->dma_tx_completion); + int ret; + + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_tx_completion); + if (ret || mcspi->slave_aborted) { + dmaengine_terminate_sync(mcspi_dma->dma_tx); + omap2_mcspi_set_dma_req(spi, 0, 0); + return 0; + } + + if (spi_controller_is_slave(mcspi->master)) { + ret = mcspi_wait_for_completion(mcspi, &mcspi->txdone); + if (ret || mcspi->slave_aborted) + return 0; + } if (mcspi->fifo_depth > 0) { irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; @@ -1068,6 +1116,36 @@ static void omap2_mcspi_cleanup(struct spi_device *spi) gpio_free(spi->cs_gpio); } +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) +{ + struct omap2_mcspi *mcspi = data; + u32 irqstat; + + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); + if (!irqstat) + return IRQ_NONE; + + /* Disable IRQ and wakeup slave xfer task */ + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) + complete(&mcspi->txdone); + + return IRQ_HANDLED; +} + +static int omap2_mcspi_slave_abort(struct spi_master *master) +{ + struct omap2_mcspi *mcspi = spi_master_get_devdata(master); + struct omap2_mcspi_dma *mcspi_dma = mcspi->dma_channels; + + mcspi->slave_aborted = true; + complete(&mcspi_dma->dma_rx_completion); + complete(&mcspi_dma->dma_tx_completion); + complete(&mcspi->txdone); + + return 0; +} + static int omap2_mcspi_transfer_one(struct spi_master *master, struct spi_device *spi, struct spi_transfer *t) @@ -1234,10 +1312,20 @@ static bool omap2_mcspi_can_dma(struct spi_master *master, struct spi_device *spi, struct spi_transfer *xfer) { + struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); + struct omap2_mcspi_dma *mcspi_dma = + &mcspi->dma_channels[spi->chip_select]; + + if (!mcspi_dma->dma_rx || !mcspi_dma->dma_tx) + return false; + + if (spi_controller_is_slave(master)) + return true; + return (xfer->len >= DMA_MIN_BYTES); } -static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi) +static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) { struct spi_master *master = mcspi->master; struct omap2_mcspi_regs *ctx = &mcspi->ctx; @@ -1254,7 +1342,7 @@ static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi) OMAP2_MCSPI_WAKEUPENABLE_WKEN); ctx->wakeupenable = OMAP2_MCSPI_WAKEUPENABLE_WKEN; - omap2_mcspi_set_master_mode(master); + omap2_mcspi_set_mode(master); pm_runtime_mark_last_busy(mcspi->dev); pm_runtime_put_autosuspend(mcspi->dev); return 0; @@ -1329,11 +1417,12 @@ static int omap2_mcspi_probe(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; const struct of_device_id *match; - master = spi_alloc_master(&pdev->dev, sizeof *mcspi); - if (master == NULL) { - dev_dbg(&pdev->dev, "master allocation failed\n"); + if (of_property_read_bool(node, "spi-slave")) + master = spi_alloc_slave(&pdev->dev, sizeof(*mcspi)); + else + master = spi_alloc_master(&pdev->dev, sizeof(*mcspi)); + if (!master) return -ENOMEM; - } /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; @@ -1345,6 +1434,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) master->transfer_one = omap2_mcspi_transfer_one; master->set_cs = omap2_mcspi_set_cs; master->cleanup = omap2_mcspi_cleanup; + master->slave_abort = omap2_mcspi_slave_abort; master->dev.of_node = node; master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ; master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15; @@ -1396,15 +1486,31 @@ static int omap2_mcspi_probe(struct platform_device *pdev) sprintf(mcspi->dma_channels[i].dma_tx_ch_name, "tx%d", i); } + status = platform_get_irq(pdev, 0); + if (status == -EPROBE_DEFER) + goto free_master; + if (status < 0) { + dev_err(&pdev->dev, "no irq resource found\n"); + goto free_master; + } + init_completion(&mcspi->txdone); + status = devm_request_irq(&pdev->dev, status, + omap2_mcspi_irq_handler, 0, pdev->name, + mcspi); + if (status) { + dev_err(&pdev->dev, "Cannot request IRQ"); + goto free_master; + } + pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_enable(&pdev->dev); - status = omap2_mcspi_master_setup(mcspi); + status = omap2_mcspi_controller_setup(mcspi); if (status < 0) goto disable_pm; - status = devm_spi_register_master(&pdev->dev, master); + status = devm_spi_register_controller(&pdev->dev, master); if (status < 0) goto disable_pm; -- 2.19.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] spi: omap2-mcspi: Add slave mode support 2018-10-15 6:38 ` [PATCH 3/3] spi: omap2-mcspi: Add slave mode support Vignesh R @ 2018-10-15 8:23 ` Sekhar Nori 2018-10-15 9:42 ` Vignesh R 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Add slave mode support" to the spi tree Mark Brown 1 sibling, 1 reply; 11+ messages in thread From: Sekhar Nori @ 2018-10-15 8:23 UTC (permalink / raw) To: Vignesh R, Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel On Monday 15 October 2018 12:08 PM, Vignesh R wrote: > Add support to use McSPI controller as SPI slave. In slave mode, DMA TX > completion does not mean entire data has been shifted out as data might > still be stuck in FIFO waiting for master to clock the bus. Therefore, > add an IRQ handler for slave mode to know when entire data in FIFO has > been shifted out. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > --- > drivers/spi/spi-omap2-mcspi.c | 138 ++++++++++++++++++++++++++++++---- > 1 file changed, 122 insertions(+), 16 deletions(-) > > diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c > index 88469bb22235..f024c3fc3679 100644 > --- a/drivers/spi/spi-omap2-mcspi.c > +++ b/drivers/spi/spi-omap2-mcspi.c > @@ -127,6 +127,7 @@ struct omap2_mcspi_regs { > }; > > struct omap2_mcspi { > + struct completion txdone; > struct spi_master *master; > /* Virtual base address of the controller */ > void __iomem *base; > @@ -136,6 +137,7 @@ struct omap2_mcspi { > struct device *dev; > struct omap2_mcspi_regs ctx; > int fifo_depth; > + bool slave_aborted; > unsigned int pin_dir:1; > }; > > @@ -275,19 +277,23 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) > } > } > > -static void omap2_mcspi_set_master_mode(struct spi_master *master) > +static void omap2_mcspi_set_mode(struct spi_master *master) > { > struct omap2_mcspi *mcspi = spi_master_get_devdata(master); > struct omap2_mcspi_regs *ctx = &mcspi->ctx; > u32 l; > > /* > - * Setup when switching from (reset default) slave mode > - * to single-channel master mode > + * Choose master or slave mode > */ > l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL); > - l &= ~(OMAP2_MCSPI_MODULCTRL_STEST | OMAP2_MCSPI_MODULCTRL_MS); > - l |= OMAP2_MCSPI_MODULCTRL_SINGLE; > + l &= ~(OMAP2_MCSPI_MODULCTRL_STEST); > + if (spi_controller_is_slave(master)) { > + l |= (OMAP2_MCSPI_MODULCTRL_MS); > + } else { > + l &= ~(OMAP2_MCSPI_MODULCTRL_MS); > + l |= OMAP2_MCSPI_MODULCTRL_SINGLE; > + } > mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l); > > ctx->modulctrl = l; > @@ -356,6 +362,20 @@ static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) > return readl_poll_timeout(reg, val, val & bit, 1, MSEC_PER_SEC); > } > > +static int mcspi_wait_for_completion(struct omap2_mcspi *mcspi, > + struct completion *x) > +{ > + if (spi_controller_is_slave(mcspi->master)) { > + if (wait_for_completion_interruptible(x) || > + mcspi->slave_aborted) > + return -EINTR; > + } else { > + wait_for_completion(x); > + } > + > + return 0; > +} > + > static void omap2_mcspi_rx_callback(void *data) > { > struct spi_device *spi = data; > @@ -505,7 +525,12 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, > dma_async_issue_pending(mcspi_dma->dma_rx); > omap2_mcspi_set_dma_req(spi, 1, 1); > > - wait_for_completion(&mcspi_dma->dma_rx_completion); > + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_rx_completion); > + if (ret || mcspi->slave_aborted) { > + dmaengine_terminate_sync(mcspi_dma->dma_rx); > + omap2_mcspi_set_dma_req(spi, 1, 0); > + return 0; > + } > > for (x = 0; x < nb_sizes; x++) > kfree(sg_out[x]); > @@ -604,14 +629,37 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) > rx = xfer->rx_buf; > tx = xfer->tx_buf; > > - if (tx != NULL) > + mcspi->slave_aborted = false; > + reinit_completion(&mcspi_dma->dma_tx_completion); > + reinit_completion(&mcspi_dma->dma_rx_completion); > + reinit_completion(&mcspi->txdone); > + if (tx) { > + /* Enable EOW IRQ to know end of tx in slave mode */ > + if (spi_controller_is_slave(spi->master)) > + mcspi_write_reg(spi->master, > + OMAP2_MCSPI_IRQENABLE, > + OMAP2_MCSPI_IRQSTATUS_EOW); > omap2_mcspi_tx_dma(spi, xfer, cfg); > + } > > if (rx != NULL) > count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); > > if (tx != NULL) { > - wait_for_completion(&mcspi_dma->dma_tx_completion); > + int ret; > + > + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_tx_completion); > + if (ret || mcspi->slave_aborted) { > + dmaengine_terminate_sync(mcspi_dma->dma_tx); > + omap2_mcspi_set_dma_req(spi, 0, 0); > + return 0; > + } > + > + if (spi_controller_is_slave(mcspi->master)) { > + ret = mcspi_wait_for_completion(mcspi, &mcspi->txdone); > + if (ret || mcspi->slave_aborted) > + return 0; > + } > > if (mcspi->fifo_depth > 0) { > irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; > @@ -1068,6 +1116,36 @@ static void omap2_mcspi_cleanup(struct spi_device *spi) > gpio_free(spi->cs_gpio); > } > > +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) > +{ > + struct omap2_mcspi *mcspi = data; > + u32 irqstat; > + > + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); > + if (!irqstat) > + return IRQ_NONE; > + > + /* Disable IRQ and wakeup slave xfer task */ > + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); > + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) > + complete(&mcspi->txdone); > + > + return IRQ_HANDLED; You need to have the: pm_runtime_get_sync(); /* access registers */ pm_runtime_mark_last_busy(); pm_runtime_put_autosuspend(); sequence here. I think thats also missing from the dma callbacks. Probably working by chance today. Thanks, Sekhar ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] spi: omap2-mcspi: Add slave mode support 2018-10-15 8:23 ` Sekhar Nori @ 2018-10-15 9:42 ` Vignesh R 2018-10-15 10:04 ` Sekhar Nori 0 siblings, 1 reply; 11+ messages in thread From: Vignesh R @ 2018-10-15 9:42 UTC (permalink / raw) To: Sekhar Nori, Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel Hi Sekhar, On Monday 15 October 2018 01:53 PM, Sekhar Nori wrote: [...] >> >> +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) >> +{ >> + struct omap2_mcspi *mcspi = data; >> + u32 irqstat; >> + >> + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); >> + if (!irqstat) >> + return IRQ_NONE; >> + >> + /* Disable IRQ and wakeup slave xfer task */ >> + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); >> + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) >> + complete(&mcspi->txdone); >> + >> + return IRQ_HANDLED; > > You need to have the: > > pm_runtime_get_sync(); > > /* access registers */ > > pm_runtime_mark_last_busy(); > pm_runtime_put_autosuspend(); > > sequence here. I think thats also missing from the dma callbacks. > Probably working by chance today. > This is taken care of by the SPI core as part of __spi_pump_messages(): pm_runtime_get_sync() ... spi_transfer_one_message ... omap2_mcspi_transfer_one ... omap2_mcspi_txrx_dma So, both in dma callbacks and in IRQ handler, SPI controller is in active state. -- Regards Vignesh ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] spi: omap2-mcspi: Add slave mode support 2018-10-15 9:42 ` Vignesh R @ 2018-10-15 10:04 ` Sekhar Nori 2018-10-15 14:56 ` Tony Lindgren 0 siblings, 1 reply; 11+ messages in thread From: Sekhar Nori @ 2018-10-15 10:04 UTC (permalink / raw) To: Vignesh R, Mark Brown; +Cc: linux-spi, linux-omap, linux-kernel On Monday 15 October 2018 03:12 PM, Vignesh R wrote: > Hi Sekhar, > > On Monday 15 October 2018 01:53 PM, Sekhar Nori wrote: > > [...] >>> >>> +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) >>> +{ >>> + struct omap2_mcspi *mcspi = data; >>> + u32 irqstat; >>> + >>> + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); >>> + if (!irqstat) >>> + return IRQ_NONE; >>> + >>> + /* Disable IRQ and wakeup slave xfer task */ >>> + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); >>> + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) >>> + complete(&mcspi->txdone); >>> + >>> + return IRQ_HANDLED; >> >> You need to have the: >> >> pm_runtime_get_sync(); >> >> /* access registers */ >> >> pm_runtime_mark_last_busy(); >> pm_runtime_put_autosuspend(); >> >> sequence here. I think thats also missing from the dma callbacks. >> Probably working by chance today. >> > > This is taken care of by the SPI core as part of __spi_pump_messages(): > pm_runtime_get_sync() > ... > spi_transfer_one_message > ... > omap2_mcspi_transfer_one > ... > omap2_mcspi_txrx_dma > > So, both in dma callbacks and in IRQ handler, SPI controller is in > active state. Ah, okay then. False alarm :) Regards, Sekhar ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] spi: omap2-mcspi: Add slave mode support 2018-10-15 10:04 ` Sekhar Nori @ 2018-10-15 14:56 ` Tony Lindgren 0 siblings, 0 replies; 11+ messages in thread From: Tony Lindgren @ 2018-10-15 14:56 UTC (permalink / raw) To: Sekhar Nori; +Cc: Vignesh R, Mark Brown, linux-spi, linux-omap, linux-kernel * Sekhar Nori <nsekhar@ti.com> [181015 10:04]: > On Monday 15 October 2018 03:12 PM, Vignesh R wrote: > > Hi Sekhar, > > > > On Monday 15 October 2018 01:53 PM, Sekhar Nori wrote: > > > > [...] > >>> > >>> +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) > >>> +{ > >>> + struct omap2_mcspi *mcspi = data; > >>> + u32 irqstat; > >>> + > >>> + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); > >>> + if (!irqstat) > >>> + return IRQ_NONE; > >>> + > >>> + /* Disable IRQ and wakeup slave xfer task */ > >>> + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); > >>> + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) > >>> + complete(&mcspi->txdone); > >>> + > >>> + return IRQ_HANDLED; > >> > >> You need to have the: > >> > >> pm_runtime_get_sync(); > >> > >> /* access registers */ > >> > >> pm_runtime_mark_last_busy(); > >> pm_runtime_put_autosuspend(); > >> > >> sequence here. I think thats also missing from the dma callbacks. > >> Probably working by chance today. > >> > > > > This is taken care of by the SPI core as part of __spi_pump_messages(): > > pm_runtime_get_sync() > > ... > > spi_transfer_one_message > > ... > > omap2_mcspi_transfer_one > > ... > > omap2_mcspi_txrx_dma > > > > So, both in dma callbacks and in IRQ handler, SPI controller is in > > active state. > > Ah, okay then. False alarm :) FYI, we never want to do pm_runtime_get_sync() from the irq handler as that implies pm_runtime_irq_safe(). And pm_runtime_irq_safe() takes a permanent use count on the parent device which is something we don't want to do. And we need to fix in existing drivers to not rely on using pm_runtime_irq_safe(). The way to deal with having an event wake up a device is to configure a generic wakeirq that then wakes up the device and have the interrupt handler bail out early in the unlikely case the device is not awake when servicing interrupts. And in some cases with clock autoidle we can just use cpu_pm notifiers instead of PM runtime if the changes are related to SoC idle states. Anyways, sounds like no need to do anything with these patches :) Regards, Tony ^ permalink raw reply [flat|nested] 11+ messages in thread
* Applied "spi: omap2-mcspi: Add slave mode support" to the spi tree 2018-10-15 6:38 ` [PATCH 3/3] spi: omap2-mcspi: Add slave mode support Vignesh R 2018-10-15 8:23 ` Sekhar Nori @ 2018-10-19 12:29 ` Mark Brown 1 sibling, 0 replies; 11+ messages in thread From: Mark Brown @ 2018-10-19 12:29 UTC (permalink / raw) To: Vignesh R Cc: Mark Brown, Mark Brown, linux-spi, linux-omap, linux-kernel, Sekhar Nori, linux-spi The patch spi: omap2-mcspi: Add slave mode support has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From d5fcf8715cdd453b17078a6e3dfbcf26610572be Mon Sep 17 00:00:00 2001 From: Vignesh R <vigneshr@ti.com> Date: Mon, 15 Oct 2018 12:08:29 +0530 Subject: [PATCH] spi: omap2-mcspi: Add slave mode support Add support to use McSPI controller as SPI slave. In slave mode, DMA TX completion does not mean entire data has been shifted out as data might still be stuck in FIFO waiting for master to clock the bus. Therefore, add an IRQ handler for slave mode to know when entire data in FIFO has been shifted out. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org> --- drivers/spi/spi-omap2-mcspi.c | 138 ++++++++++++++++++++++++++++++---- 1 file changed, 122 insertions(+), 16 deletions(-) diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 88469bb22235..f024c3fc3679 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -127,6 +127,7 @@ struct omap2_mcspi_regs { }; struct omap2_mcspi { + struct completion txdone; struct spi_master *master; /* Virtual base address of the controller */ void __iomem *base; @@ -136,6 +137,7 @@ struct omap2_mcspi { struct device *dev; struct omap2_mcspi_regs ctx; int fifo_depth; + bool slave_aborted; unsigned int pin_dir:1; }; @@ -275,19 +277,23 @@ static void omap2_mcspi_set_cs(struct spi_device *spi, bool enable) } } -static void omap2_mcspi_set_master_mode(struct spi_master *master) +static void omap2_mcspi_set_mode(struct spi_master *master) { struct omap2_mcspi *mcspi = spi_master_get_devdata(master); struct omap2_mcspi_regs *ctx = &mcspi->ctx; u32 l; /* - * Setup when switching from (reset default) slave mode - * to single-channel master mode + * Choose master or slave mode */ l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL); - l &= ~(OMAP2_MCSPI_MODULCTRL_STEST | OMAP2_MCSPI_MODULCTRL_MS); - l |= OMAP2_MCSPI_MODULCTRL_SINGLE; + l &= ~(OMAP2_MCSPI_MODULCTRL_STEST); + if (spi_controller_is_slave(master)) { + l |= (OMAP2_MCSPI_MODULCTRL_MS); + } else { + l &= ~(OMAP2_MCSPI_MODULCTRL_MS); + l |= OMAP2_MCSPI_MODULCTRL_SINGLE; + } mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l); ctx->modulctrl = l; @@ -356,6 +362,20 @@ static int mcspi_wait_for_reg_bit(void __iomem *reg, unsigned long bit) return readl_poll_timeout(reg, val, val & bit, 1, MSEC_PER_SEC); } +static int mcspi_wait_for_completion(struct omap2_mcspi *mcspi, + struct completion *x) +{ + if (spi_controller_is_slave(mcspi->master)) { + if (wait_for_completion_interruptible(x) || + mcspi->slave_aborted) + return -EINTR; + } else { + wait_for_completion(x); + } + + return 0; +} + static void omap2_mcspi_rx_callback(void *data) { struct spi_device *spi = data; @@ -505,7 +525,12 @@ omap2_mcspi_rx_dma(struct spi_device *spi, struct spi_transfer *xfer, dma_async_issue_pending(mcspi_dma->dma_rx); omap2_mcspi_set_dma_req(spi, 1, 1); - wait_for_completion(&mcspi_dma->dma_rx_completion); + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_rx_completion); + if (ret || mcspi->slave_aborted) { + dmaengine_terminate_sync(mcspi_dma->dma_rx); + omap2_mcspi_set_dma_req(spi, 1, 0); + return 0; + } for (x = 0; x < nb_sizes; x++) kfree(sg_out[x]); @@ -604,14 +629,37 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) rx = xfer->rx_buf; tx = xfer->tx_buf; - if (tx != NULL) + mcspi->slave_aborted = false; + reinit_completion(&mcspi_dma->dma_tx_completion); + reinit_completion(&mcspi_dma->dma_rx_completion); + reinit_completion(&mcspi->txdone); + if (tx) { + /* Enable EOW IRQ to know end of tx in slave mode */ + if (spi_controller_is_slave(spi->master)) + mcspi_write_reg(spi->master, + OMAP2_MCSPI_IRQENABLE, + OMAP2_MCSPI_IRQSTATUS_EOW); omap2_mcspi_tx_dma(spi, xfer, cfg); + } if (rx != NULL) count = omap2_mcspi_rx_dma(spi, xfer, cfg, es); if (tx != NULL) { - wait_for_completion(&mcspi_dma->dma_tx_completion); + int ret; + + ret = mcspi_wait_for_completion(mcspi, &mcspi_dma->dma_tx_completion); + if (ret || mcspi->slave_aborted) { + dmaengine_terminate_sync(mcspi_dma->dma_tx); + omap2_mcspi_set_dma_req(spi, 0, 0); + return 0; + } + + if (spi_controller_is_slave(mcspi->master)) { + ret = mcspi_wait_for_completion(mcspi, &mcspi->txdone); + if (ret || mcspi->slave_aborted) + return 0; + } if (mcspi->fifo_depth > 0) { irqstat_reg = mcspi->base + OMAP2_MCSPI_IRQSTATUS; @@ -1068,6 +1116,36 @@ static void omap2_mcspi_cleanup(struct spi_device *spi) gpio_free(spi->cs_gpio); } +static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) +{ + struct omap2_mcspi *mcspi = data; + u32 irqstat; + + irqstat = mcspi_read_reg(mcspi->master, OMAP2_MCSPI_IRQSTATUS); + if (!irqstat) + return IRQ_NONE; + + /* Disable IRQ and wakeup slave xfer task */ + mcspi_write_reg(mcspi->master, OMAP2_MCSPI_IRQENABLE, 0); + if (irqstat & OMAP2_MCSPI_IRQSTATUS_EOW) + complete(&mcspi->txdone); + + return IRQ_HANDLED; +} + +static int omap2_mcspi_slave_abort(struct spi_master *master) +{ + struct omap2_mcspi *mcspi = spi_master_get_devdata(master); + struct omap2_mcspi_dma *mcspi_dma = mcspi->dma_channels; + + mcspi->slave_aborted = true; + complete(&mcspi_dma->dma_rx_completion); + complete(&mcspi_dma->dma_tx_completion); + complete(&mcspi->txdone); + + return 0; +} + static int omap2_mcspi_transfer_one(struct spi_master *master, struct spi_device *spi, struct spi_transfer *t) @@ -1234,10 +1312,20 @@ static bool omap2_mcspi_can_dma(struct spi_master *master, struct spi_device *spi, struct spi_transfer *xfer) { + struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); + struct omap2_mcspi_dma *mcspi_dma = + &mcspi->dma_channels[spi->chip_select]; + + if (!mcspi_dma->dma_rx || !mcspi_dma->dma_tx) + return false; + + if (spi_controller_is_slave(master)) + return true; + return (xfer->len >= DMA_MIN_BYTES); } -static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi) +static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) { struct spi_master *master = mcspi->master; struct omap2_mcspi_regs *ctx = &mcspi->ctx; @@ -1254,7 +1342,7 @@ static int omap2_mcspi_master_setup(struct omap2_mcspi *mcspi) OMAP2_MCSPI_WAKEUPENABLE_WKEN); ctx->wakeupenable = OMAP2_MCSPI_WAKEUPENABLE_WKEN; - omap2_mcspi_set_master_mode(master); + omap2_mcspi_set_mode(master); pm_runtime_mark_last_busy(mcspi->dev); pm_runtime_put_autosuspend(mcspi->dev); return 0; @@ -1329,11 +1417,12 @@ static int omap2_mcspi_probe(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; const struct of_device_id *match; - master = spi_alloc_master(&pdev->dev, sizeof *mcspi); - if (master == NULL) { - dev_dbg(&pdev->dev, "master allocation failed\n"); + if (of_property_read_bool(node, "spi-slave")) + master = spi_alloc_slave(&pdev->dev, sizeof(*mcspi)); + else + master = spi_alloc_master(&pdev->dev, sizeof(*mcspi)); + if (!master) return -ENOMEM; - } /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; @@ -1345,6 +1434,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev) master->transfer_one = omap2_mcspi_transfer_one; master->set_cs = omap2_mcspi_set_cs; master->cleanup = omap2_mcspi_cleanup; + master->slave_abort = omap2_mcspi_slave_abort; master->dev.of_node = node; master->max_speed_hz = OMAP2_MCSPI_MAX_FREQ; master->min_speed_hz = OMAP2_MCSPI_MAX_FREQ >> 15; @@ -1396,15 +1486,31 @@ static int omap2_mcspi_probe(struct platform_device *pdev) sprintf(mcspi->dma_channels[i].dma_tx_ch_name, "tx%d", i); } + status = platform_get_irq(pdev, 0); + if (status == -EPROBE_DEFER) + goto free_master; + if (status < 0) { + dev_err(&pdev->dev, "no irq resource found\n"); + goto free_master; + } + init_completion(&mcspi->txdone); + status = devm_request_irq(&pdev->dev, status, + omap2_mcspi_irq_handler, 0, pdev->name, + mcspi); + if (status) { + dev_err(&pdev->dev, "Cannot request IRQ"); + goto free_master; + } + pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_enable(&pdev->dev); - status = omap2_mcspi_master_setup(mcspi); + status = omap2_mcspi_controller_setup(mcspi); if (status < 0) goto disable_pm; - status = devm_spi_register_master(&pdev->dev, master); + status = devm_spi_register_controller(&pdev->dev, master); if (status < 0) goto disable_pm; -- 2.19.0.rc2 ^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2018-10-19 12:29 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2018-10-15 6:38 [PATCH 0/3] omap2-mcspi: Add slave mode support Vignesh R 2018-10-15 6:38 ` [PATCH 1/3] spi: omap2-mcspi: Switch to readl_poll_timeout() Vignesh R 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Switch to readl_poll_timeout()" to the spi tree Mark Brown 2018-10-15 6:38 ` [PATCH 2/3] spi: omap2-mcspi: Set FIFO DMA trigger level to word length Vignesh R 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Set FIFO DMA trigger level to word length" to the spi tree Mark Brown 2018-10-15 6:38 ` [PATCH 3/3] spi: omap2-mcspi: Add slave mode support Vignesh R 2018-10-15 8:23 ` Sekhar Nori 2018-10-15 9:42 ` Vignesh R 2018-10-15 10:04 ` Sekhar Nori 2018-10-15 14:56 ` Tony Lindgren 2018-10-19 12:29 ` Applied "spi: omap2-mcspi: Add slave mode support" to the spi tree Mark Brown
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