[RFC PATCH v3 0/4] irqchip/gic-v3: Add support to DT based quirk for msm8996

[RFC PATCH v3 0/4] irqchip/gic-v3: Add support to DT based quirk for msm8996

[Srinivas Kandagatla]

Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
There are many devices out there with this restriction in place
and there has been no update to this firmware since last few years,
making those devices totally unusable for upstream development.

My previous attempts to add quick based on IIDR register value seems to be
flawed by the fact that the value conflicted with other SoCs.
Last Suggestion by Marc Z using compatible seems to be the only way to apply
quirks required for msm8996 based SoCs.

Here is the patchset which add new compatible for msm8996 gicv3 and add
support gic_enable_of_quirks() followed by the actual quirk required for msm8996.

Without this quirk many qcom SoCs (atleast 3 that I know) are
unable to boot mainline.

Thanks,
Srini

Srinivas Kandagatla (4):
  dt-bindings/gic-v3: Add msm8996 compatible string
  irqchip/gic: common: add support to device tree based quirks
  irqchip: gic-v3: Add quirk for msm8996 secured registers
  arm64: dts: add msm8996 compatible to gicv3

 .../interrupt-controller/arm,gic-v3.txt       |  4 ++-
 arch/arm64/boot/dts/qcom/msm8996.dtsi         |  2 +-
 drivers/irqchip/irq-gic-common.c              | 12 +++++++++
 drivers/irqchip/irq-gic-common.h              |  3 +++
 drivers/irqchip/irq-gic-v3.c                  | 26 +++++++++++++++++++
 5 files changed, 45 insertions(+), 2 deletions(-)

-- 
2.19.1

[RFC PATCH v3 1/4] dt-bindings/gic-v3: Add msm8996 compatible string

[Srinivas Kandagatla]

Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
There are many devices out there with this restriction in place
and there has been no update to this firmware since last few years,
making those devices totally unusable for upstream development.

IIDR register value conflicts with other SoCs, using compatible seems
to be the only way to apply quirks required for msm8996 based SoCs.

Without this quirk many qcom SoCs (atleast 3 that I know) are
unable to boot mainline.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 .../devicetree/bindings/interrupt-controller/arm,gic-v3.txt   | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
index 3ea78c4ef887..b83bb8249074 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
@@ -7,7 +7,9 @@ Interrupts (LPI).
 
 Main node required properties:
 
-- compatible : should at least contain  "arm,gic-v3".
+- compatible : should at least contain  "arm,gic-v3" or either
+		"qcom,msm8996-gic-v3", "arm,gic-v3" for msm8996 SoCs
+		to address SoC specific bugs/quirks
 - interrupt-controller : Identifies the node as an interrupt controller
 - #interrupt-cells : Specifies the number of cells needed to encode an
   interrupt source. Must be a single cell with a value of at least 3.
-- 
2.19.1

[RFC PATCH v3 2/4] irqchip/gic: common: add support to device tree based quirks

[Srinivas Kandagatla]

This patch adds support to device tree based quirks based on
device tree compatible string.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 drivers/irqchip/irq-gic-common.c | 12 ++++++++++++
 drivers/irqchip/irq-gic-common.h |  3 +++
 2 files changed, 15 insertions(+)

diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c
index 01e673c680cd..3c93c6f4d1f1 100644
--- a/drivers/irqchip/irq-gic-common.c
+++ b/drivers/irqchip/irq-gic-common.c
@@ -36,6 +36,18 @@ void gic_set_kvm_info(const struct gic_kvm_info *info)
 	gic_kvm_info = info;
 }
 
+void gic_enable_of_quirks(const struct device_node *np,
+			  const struct gic_quirk *quirks, void *data)
+{
+	for (; quirks->desc; quirks++) {
+		if (!of_device_is_compatible(np, quirks->compatible))
+			continue;
+		if (quirks->init(data))
+			pr_info("GIC: enabling workaround for %s\n",
+				quirks->desc);
+	}
+}
+
 void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
 		void *data)
 {
diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h
index 3919cd7c5285..97e58fb6c232 100644
--- a/drivers/irqchip/irq-gic-common.h
+++ b/drivers/irqchip/irq-gic-common.h
@@ -23,6 +23,7 @@
 
 struct gic_quirk {
 	const char *desc;
+	const char *compatible;
 	bool (*init)(void *data);
 	u32 iidr;
 	u32 mask;
@@ -35,6 +36,8 @@ void gic_dist_config(void __iomem *base, int gic_irqs,
 void gic_cpu_config(void __iomem *base, void (*sync_access)(void));
 void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
 		void *data);
+void gic_enable_of_quirks(const struct device_node *np,
+			  const struct gic_quirk *quirks, void *data);
 
 void gic_set_kvm_info(const struct gic_kvm_info *info);
 
-- 
2.19.1

[RFC PATCH v3 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers

[Srinivas Kandagatla]

Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
Its been more than 2+ years of wait for this to be fixed, which has
no hopes to be fixed. This change was introduced for the "lead device"
on msm8996 platform. It looks like all publicly available msm8996 and
other qcom SoCs have this implementation.

So add a quirk to not access this register on msm8996.

With this quirk MSM8996 can at least boot out of mainline,
which can help community to work with boards based on MSM8996 and other
SoCs with have this restrictions. This Quirk is based on device tree
compatible string.

Without this patch Qualcomm DB820c board reboots when GICR_WAKER
is accessed.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 drivers/irqchip/irq-gic-v3.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 8f87f40c9460..4bd3bbe1b7ce 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -41,6 +41,8 @@
 
 #include "irq-gic-common.h"
 
+#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996	(1ULL << 0)
+
 struct redist_region {
 	void __iomem		*redist_base;
 	phys_addr_t		phys_base;
@@ -55,6 +57,7 @@ struct gic_chip_data {
 	struct irq_domain	*domain;
 	u64			redist_stride;
 	u32			nr_redist_regions;
+	u64			flags;
 	bool			has_rss;
 	unsigned int		irq_nr;
 	struct partition_desc	*ppi_descs[16];
@@ -139,6 +142,9 @@ static void gic_enable_redist(bool enable)
 	u32 count = 1000000;	/* 1s! */
 	u32 val;
 
+	if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996)
+		return;
+
 	rbase = gic_data_rdist_rd_base();
 
 	val = readl_relaxed(rbase + GICR_WAKER);
@@ -1067,6 +1073,23 @@ static const struct irq_domain_ops partition_domain_ops = {
 	.select = gic_irq_domain_select,
 };
 
+static bool __maybe_unused gic_enable_quirk_msm8996(void *data)
+{
+	struct gic_chip_data *d = data;
+
+	d->flags |= FLAGS_WORKAROUND_GICR_WAKER_MSM8996;
+
+	return true;
+}
+
+static const struct gic_quirk gic_quirks[] = {
+	{
+		.desc	= "GICv3: Qualcomm MSM8996 skip GICR_WAKER Read/Write",
+		.compatible = "qcom,msm8996-gic-v3", /* MSM8996 */
+		.init	= gic_enable_quirk_msm8996,
+	},
+};
+
 static int __init gic_init_bases(void __iomem *dist_base,
 				 struct redist_region *rdist_regs,
 				 u32 nr_redist_regions,
@@ -1126,6 +1149,9 @@ static int __init gic_init_bases(void __iomem *dist_base,
 
 	gic_update_vlpi_properties();
 
+	if (is_of_node(handle))
+		gic_enable_of_quirks(to_of_node(handle), gic_quirks, &gic_data);
+
 	gic_smp_init();
 	gic_dist_init();
 	gic_cpu_init();
-- 
2.19.1

Re: [RFC PATCH v3 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers

[Bjorn Andersson]

On Mon 12 Nov 02:33 PST 2018, Srinivas Kandagatla wrote:

> Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
> Its been more than 2+ years of wait for this to be fixed, which has
> no hopes to be fixed. This change was introduced for the "lead device"
> on msm8996 platform. It looks like all publicly available msm8996 and
> other qcom SoCs have this implementation.
> 
> So add a quirk to not access this register on msm8996.
> 
> With this quirk MSM8996 can at least boot out of mainline,
> which can help community to work with boards based on MSM8996 and other
> SoCs with have this restrictions. This Quirk is based on device tree
> compatible string.
> 
> Without this patch Qualcomm DB820c board reboots when GICR_WAKER
> is accessed.
> 

Hi Srinivas,

Given that the change request introducing this restriction looks quite
generic and that we've heard reports of other shipping platforms having
the same restriction, could we make this slightly more generic?

I.e. dropping the MSM8996 from the flag name and perhaps use a bool
property in devicetree to toggle the flag, instead of adding compatibles
as we figure out which Qualcomm platforms has this restriction.

Regards,
Bjorn

> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  drivers/irqchip/irq-gic-v3.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 8f87f40c9460..4bd3bbe1b7ce 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -41,6 +41,8 @@
>  
>  #include "irq-gic-common.h"
>  
> +#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996	(1ULL << 0)
> +
>  struct redist_region {
>  	void __iomem		*redist_base;
>  	phys_addr_t		phys_base;
> @@ -55,6 +57,7 @@ struct gic_chip_data {
>  	struct irq_domain	*domain;
>  	u64			redist_stride;
>  	u32			nr_redist_regions;
> +	u64			flags;
>  	bool			has_rss;
>  	unsigned int		irq_nr;
>  	struct partition_desc	*ppi_descs[16];
> @@ -139,6 +142,9 @@ static void gic_enable_redist(bool enable)
>  	u32 count = 1000000;	/* 1s! */
>  	u32 val;
>  
> +	if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996)
> +		return;
> +
>  	rbase = gic_data_rdist_rd_base();
>  
>  	val = readl_relaxed(rbase + GICR_WAKER);
> @@ -1067,6 +1073,23 @@ static const struct irq_domain_ops partition_domain_ops = {
>  	.select = gic_irq_domain_select,
>  };
>  
> +static bool __maybe_unused gic_enable_quirk_msm8996(void *data)
> +{
> +	struct gic_chip_data *d = data;
> +
> +	d->flags |= FLAGS_WORKAROUND_GICR_WAKER_MSM8996;
> +
> +	return true;
> +}
> +
> +static const struct gic_quirk gic_quirks[] = {
> +	{
> +		.desc	= "GICv3: Qualcomm MSM8996 skip GICR_WAKER Read/Write",
> +		.compatible = "qcom,msm8996-gic-v3", /* MSM8996 */
> +		.init	= gic_enable_quirk_msm8996,
> +	},
> +};
> +
>  static int __init gic_init_bases(void __iomem *dist_base,
>  				 struct redist_region *rdist_regs,
>  				 u32 nr_redist_regions,
> @@ -1126,6 +1149,9 @@ static int __init gic_init_bases(void __iomem *dist_base,
>  
>  	gic_update_vlpi_properties();
>  
> +	if (is_of_node(handle))
> +		gic_enable_of_quirks(to_of_node(handle), gic_quirks, &gic_data);
> +
>  	gic_smp_init();
>  	gic_dist_init();
>  	gic_cpu_init();
> -- 
> 2.19.1
> 

Re: [RFC PATCH v3 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers

[Marc Zyngier]

Bjorn,

On Wed, 28 Nov 2018 23:33:27 +0000,
Bjorn Andersson <bjorn.andersson@linaro.org> wrote:
> 
> On Mon 12 Nov 02:33 PST 2018, Srinivas Kandagatla wrote:
> 
> > Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
> > Its been more than 2+ years of wait for this to be fixed, which has
> > no hopes to be fixed. This change was introduced for the "lead device"
> > on msm8996 platform. It looks like all publicly available msm8996 and
> > other qcom SoCs have this implementation.
> > 
> > So add a quirk to not access this register on msm8996.
> > 
> > With this quirk MSM8996 can at least boot out of mainline,
> > which can help community to work with boards based on MSM8996 and other
> > SoCs with have this restrictions. This Quirk is based on device tree
> > compatible string.
> > 
> > Without this patch Qualcomm DB820c board reboots when GICR_WAKER
> > is accessed.
> > 
> 
> Hi Srinivas,
> 
> Given that the change request introducing this restriction looks quite
> generic and that we've heard reports of other shipping platforms having
> the same restriction, could we make this slightly more generic?

s/restriction/gross bug/

> I.e. dropping the MSM8996 from the flag name and perhaps use a bool
> property in devicetree to toggle the flag, instead of adding compatibles
> as we figure out which Qualcomm platforms has this restriction.

If we are to introduce a property, then it ought to be an erratum
number (similar to what we do for the arch timer). Srinivas wasn't
able to obtain one despite the defect having been known for years, so
I guess this is out.

Thanks,

	M.

-- 
Jazz is not dead, it just smell funny.

Re: [RFC PATCH v3 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers

[Srinivas Kandagatla]

On 28/11/18 23:33, Bjorn Andersson wrote:
> Given that the change request introducing this restriction looks quite
> generic and that we've heard reports of other shipping platforms having
> the same restriction, could we make this slightly more generic?
> 
> I.e. dropping the MSM8996 from the flag name and perhaps use a bool
> property in devicetree to toggle the flag, instead of adding compatibles
> as we figure out which Qualcomm platforms has this restriction.
If I understand the dt compatible thing correctly. Am not expecting 
other platforms to add new compatible string. If the gic-v3 of that SoC 
is compatible with msm8996, they should be able to use the same 
compatible string!

--srini

Re: [RFC PATCH v3 3/4] irqchip: gic-v3: Add quirk for msm8996 secured registers

[Marc Zyngier]

On 12/11/2018 10:33, Srinivas Kandagatla wrote:
> Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
> Its been more than 2+ years of wait for this to be fixed, which has
> no hopes to be fixed. This change was introduced for the "lead device"
> on msm8996 platform. It looks like all publicly available msm8996 and
> other qcom SoCs have this implementation.

s/qcom/Qualcomm/

> 
> So add a quirk to not access this register on msm8996.
> 
> With this quirk MSM8996 can at least boot out of mainline,
> which can help community to work with boards based on MSM8996 and other
> SoCs with have this restrictions. This Quirk is based on device tree
> compatible string.
> 
> Without this patch Qualcomm DB820c board reboots when GICR_WAKER
> is accessed.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
>  drivers/irqchip/irq-gic-v3.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> index 8f87f40c9460..4bd3bbe1b7ce 100644
> --- a/drivers/irqchip/irq-gic-v3.c
> +++ b/drivers/irqchip/irq-gic-v3.c
> @@ -41,6 +41,8 @@
>  
>  #include "irq-gic-common.h"
>  
> +#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996	(1ULL << 0)
> +
>  struct redist_region {
>  	void __iomem		*redist_base;
>  	phys_addr_t		phys_base;
> @@ -55,6 +57,7 @@ struct gic_chip_data {
>  	struct irq_domain	*domain;
>  	u64			redist_stride;
>  	u32			nr_redist_regions;
> +	u64			flags;
>  	bool			has_rss;
>  	unsigned int		irq_nr;
>  	struct partition_desc	*ppi_descs[16];
> @@ -139,6 +142,9 @@ static void gic_enable_redist(bool enable)
>  	u32 count = 1000000;	/* 1s! */
>  	u32 val;
>  
> +	if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996)
> +		return;
> +
>  	rbase = gic_data_rdist_rd_base();
>  
>  	val = readl_relaxed(rbase + GICR_WAKER);
> @@ -1067,6 +1073,23 @@ static const struct irq_domain_ops partition_domain_ops = {
>  	.select = gic_irq_domain_select,
>  };
>  
> +static bool __maybe_unused gic_enable_quirk_msm8996(void *data)

Why __maybe_unused? It is referenced in the quirk table, right?

> +{
> +	struct gic_chip_data *d = data;
> +
> +	d->flags |= FLAGS_WORKAROUND_GICR_WAKER_MSM8996;
> +
> +	return true;
> +}
> +
> +static const struct gic_quirk gic_quirks[] = {
> +	{
> +		.desc	= "GICv3: Qualcomm MSM8996 skip GICR_WAKER Read/Write",

This should read "GICv3: Qualcomm MSM8996 broken firmware". Nobody knows
what GICR_WAKER is, but people do understand that they run buggy software.

> +		.compatible = "qcom,msm8996-gic-v3", /* MSM8996 */

Drop this comment, it doesn't add anything.

> +		.init	= gic_enable_quirk_msm8996,
> +	},
> +};
> +
>  static int __init gic_init_bases(void __iomem *dist_base,
>  				 struct redist_region *rdist_regs,
>  				 u32 nr_redist_regions,
> @@ -1126,6 +1149,9 @@ static int __init gic_init_bases(void __iomem *dist_base,
>  
>  	gic_update_vlpi_properties();
>  
> +	if (is_of_node(handle))
> +		gic_enable_of_quirks(to_of_node(handle), gic_quirks, &gic_data);
> +

Please move this as early as possible. Actually, given that this is DT
only, it should be done in gic_of_init. It should also be moved to the
previous patch, with gic_quirks being an empty array.

>  	gic_smp_init();
>  	gic_dist_init();
>  	gic_cpu_init();
> 

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

[RFC PATCH v3 4/4] arm64: dts: add msm8996 compatible to gicv3

[Srinivas Kandagatla]

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 16c3fc0f4e69..e38da221f9a9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -902,7 +902,7 @@
 		};
 
 		intc: interrupt-controller@9bc0000 {
-			compatible = "arm,gic-v3";
+			compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";
 			#interrupt-cells = <3>;
 			interrupt-controller;
 			#redistributor-regions = <1>;
-- 
2.19.1

Re: [RFC PATCH v3 4/4] arm64: dts: add msm8996 compatible to gicv3

[Marc Zyngier]

On 12/11/2018 10:33, Srinivas Kandagatla wrote:
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Please write a commit log.

	M.

> ---
>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 16c3fc0f4e69..e38da221f9a9 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -902,7 +902,7 @@
>  		};
>  
>  		intc: interrupt-controller@9bc0000 {
> -			compatible = "arm,gic-v3";
> +			compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";
>  			#interrupt-cells = <3>;
>  			interrupt-controller;
>  			#redistributor-regions = <1>;
> 


-- 
Jazz is not dead. It just smells funny...