[PATCH 0/3] GPCv2 support for i.MX8MQ

[PATCH 0/3] GPCv2 support for i.MX8MQ

[Andrey Smirnov]

Everyone:

This series contains changes I made to add support for i.MX8MQ to
GPCv2 driver in order to enable support of PCIE IP block on i.MX8MQ
SoCs (full tree can be found at [github-v0]). This series is _very_
preliminary and by no means is ready for inclusion (it also has some
unmet dependencies).  However is should be in OK enough shape to get
some early feedback on, which is the intent of this submission.

All other feedback is appreciated as well!

Thank you,
Andrey Smirnov

[github-v0] https://github.com/ndreys/linux/commits/imx8mq-pcie-v0

Andrey Smirnov (3):
  soc: imx: gpcv2: Remove static qualifier from domain_data
  soc: imx: gpcv2: Make regmap access table variant specific.
  soc: imx: gpcv2: Add support for i.MX8MQ

 drivers/soc/imx/Kconfig |   4 +-
 drivers/soc/imx/gpcv2.c | 238 ++++++++++++++++++++++++++++++++++++----
 2 files changed, 219 insertions(+), 23 deletions(-)

-- 
2.19.1

[PATCH 1/3] soc: imx: gpcv2: Remove static qualifier from domain_data

[Andrey Smirnov]

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/soc/imx/gpcv2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index e7b5994fee9d..0835999f1ed0 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -265,7 +265,7 @@ builtin_platform_driver(imx_pgc_domain_driver)
 
 static int imx_gpcv2_probe(struct platform_device *pdev)
 {
-	static const struct imx_pgc_domain_data *domain_data;
+	const struct imx_pgc_domain_data *domain_data;
 	static const struct regmap_range yes_ranges[] = {
 		regmap_reg_range(GPC_LPCR_A_CORE_BSC,
 				 GPC_M4_PU_PDN_FLG),
-- 
2.19.1

[PATCH 2/3] soc: imx: gpcv2: Make regmap access table variant specific.

[Andrey Smirnov]

Move regmap access table to be a part of struct imx_pgc_domain_data in
order to allow supporting multiple GPCv2 variants.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/soc/imx/gpcv2.c | 43 +++++++++++++++++++++--------------------
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 0835999f1ed0..184ffd4cc9aa 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -67,6 +67,7 @@ struct imx_pgc_domain {
 struct imx_pgc_domain_data {
 	const struct imx_pgc_domain *domains;
 	size_t domains_num;
+	struct regmap_access_table access_table;
 };
 
 static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
@@ -198,9 +199,24 @@ static const struct imx_pgc_domain imx7_pgc_domains[] = {
 	},
 };
 
+static const struct regmap_range imx7_yes_ranges[] = {
+	regmap_reg_range(GPC_LPCR_A_CORE_BSC,
+			 GPC_M4_PU_PDN_FLG),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
+			 GPC_PGC_SR(PGC_MIPI)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
+			 GPC_PGC_SR(PGC_PCIE)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC),
+			 GPC_PGC_SR(PGC_USB_HSIC)),
+};
+
 static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
 	.domains = imx7_pgc_domains,
 	.domains_num = ARRAY_SIZE(imx7_pgc_domains),
+	.access_table = {
+		.yes_ranges	= yes_ranges,
+		.n_yes_ranges	= ARRAY_SIZE(yes_ranges),
+	},
 };
 
 static int imx_pgc_domain_probe(struct platform_device *pdev)
@@ -265,30 +281,17 @@ builtin_platform_driver(imx_pgc_domain_driver)
 
 static int imx_gpcv2_probe(struct platform_device *pdev)
 {
-	const struct imx_pgc_domain_data *domain_data;
-	static const struct regmap_range yes_ranges[] = {
-		regmap_reg_range(GPC_LPCR_A_CORE_BSC,
-				 GPC_M4_PU_PDN_FLG),
-		regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
-				 GPC_PGC_SR(PGC_MIPI)),
-		regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
-				 GPC_PGC_SR(PGC_PCIE)),
-		regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC),
-				 GPC_PGC_SR(PGC_USB_HSIC)),
-	};
-	static const struct regmap_access_table access_table = {
-		.yes_ranges	= yes_ranges,
-		.n_yes_ranges	= ARRAY_SIZE(yes_ranges),
-	};
-	static const struct regmap_config regmap_config = {
+	struct device *dev = &pdev->dev;
+	const struct imx_pgc_domain_data *
+		domain_data = of_device_get_match_data(dev);
+	const struct regmap_config regmap_config = {
 		.reg_bits	= 32,
 		.val_bits	= 32,
 		.reg_stride	= 4,
-		.rd_table	= &access_table,
-		.wr_table	= &access_table,
+		.rd_table	= &domain_data->access_table,
+		.wr_table	= &domain_data->access_table,
 		.max_register   = SZ_4K,
 	};
-	struct device *dev = &pdev->dev;
 	struct device_node *pgc_np, *np;
 	struct regmap *regmap;
 	struct resource *res;
@@ -313,8 +316,6 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	domain_data = of_device_get_match_data(&pdev->dev);
-
 	for_each_child_of_node(pgc_np, np) {
 		struct platform_device *pd_pdev;
 		struct imx_pgc_domain *domain;
-- 
2.19.1

Re: [PATCH 2/3] soc: imx: gpcv2: Make regmap access table variant specific.

[kbuild test robot]

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Hi Andrey,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on shawnguo/for-next]
[also build test ERROR on v4.20-rc2 next-20181116]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Andrey-Smirnov/soc-imx-gpcv2-Remove-static-qualifier-from-domain_data/20181118-213909
base:   https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git for-next
config: arm-multi_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=arm 

All error/warnings (new ones prefixed by >>):

>> drivers/soc/imx/gpcv2.c:217:17: error: 'yes_ranges' undeclared here (not in a function); did you mean 'imx7_yes_ranges'?
      .yes_ranges = yes_ranges,
                    ^~~~~~~~~~
                    imx7_yes_ranges
   In file included from include/linux/kernel.h:15:0,
                    from include/linux/list.h:9,
                    from include/linux/kobject.h:19,
                    from include/linux/device.h:16,
                    from include/linux/node.h:18,
                    from include/linux/cpu.h:17,
                    from include/linux/of_device.h:5,
                    from drivers/soc/imx/gpcv2.c:11:
   include/linux/build_bug.h:29:45: error: bit-field '<anonymous>' width not an integer constant
    #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
                                                ^
>> include/linux/compiler.h:379:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
    #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
                               ^~~~~~~~~~~~~~~~~
   include/linux/kernel.h:72:59: note: in expansion of macro '__must_be_array'
    #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
                                                              ^~~~~~~~~~~~~~~
>> drivers/soc/imx/gpcv2.c:218:19: note: in expansion of macro 'ARRAY_SIZE'
      .n_yes_ranges = ARRAY_SIZE(yes_ranges),
                      ^~~~~~~~~~
--
   drivers/soc//imx/gpcv2.c:217:17: error: 'yes_ranges' undeclared here (not in a function); did you mean 'imx7_yes_ranges'?
      .yes_ranges = yes_ranges,
                    ^~~~~~~~~~
                    imx7_yes_ranges
   In file included from include/linux/kernel.h:15:0,
                    from include/linux/list.h:9,
                    from include/linux/kobject.h:19,
                    from include/linux/device.h:16,
                    from include/linux/node.h:18,
                    from include/linux/cpu.h:17,
                    from include/linux/of_device.h:5,
                    from drivers/soc//imx/gpcv2.c:11:
   include/linux/build_bug.h:29:45: error: bit-field '<anonymous>' width not an integer constant
    #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
                                                ^
>> include/linux/compiler.h:379:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO'
    #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
                               ^~~~~~~~~~~~~~~~~
   include/linux/kernel.h:72:59: note: in expansion of macro '__must_be_array'
    #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
                                                              ^~~~~~~~~~~~~~~
   drivers/soc//imx/gpcv2.c:218:19: note: in expansion of macro 'ARRAY_SIZE'
      .n_yes_ranges = ARRAY_SIZE(yes_ranges),
                      ^~~~~~~~~~

vim +217 drivers/soc/imx/gpcv2.c

   212	
   213	static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
   214		.domains = imx7_pgc_domains,
   215		.domains_num = ARRAY_SIZE(imx7_pgc_domains),
   216		.access_table = {
 > 217			.yes_ranges	= yes_ranges,
 > 218			.n_yes_ranges	= ARRAY_SIZE(yes_ranges),
   219		},
   220	};
   221	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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[PATCH 3/3] soc: imx: gpcv2: Add support for i.MX8MQ

[Andrey Smirnov]

GPCv2 IP block found on i.MX7D can also be found on i.MX8MQ. Add the
code needed to support the latter as well as the former.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/soc/imx/Kconfig |   4 +-
 drivers/soc/imx/gpcv2.c | 195 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 197 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
index a5b86a28f343..8d0072e7c359 100644
--- a/drivers/soc/imx/Kconfig
+++ b/drivers/soc/imx/Kconfig
@@ -2,9 +2,9 @@ menu "i.MX SoC drivers"
 
 config IMX7_PM_DOMAINS
 	bool "i.MX7 PM domains"
-	depends on SOC_IMX7D || (COMPILE_TEST && OF)
+	depends on SOC_IMX8MQ || SOC_IMX7D || (COMPILE_TEST && OF)
 	depends on PM
 	select PM_GENERIC_DOMAINS
-	default y if SOC_IMX7D
+	default y if SOC_IMX7D || SOC_IMX8MQ
 
 endmenu
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 184ffd4cc9aa..b464f2caa76d 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -15,9 +15,28 @@
 #include <linux/regulator/consumer.h>
 #include <dt-bindings/power/imx7-power.h>
 
+#define IMX8M_POWER_DOMAIN_MIPI_DSI_PHY		0
+#define IMX8M_POWER_DOMAIN_PCIE1_PHY		1
+#define IMX8M_POWER_DOMAIN_USB_OTG1		2
+#define IMX8M_POWER_DOMAIN_USB_OTG2		3
+#define IMX8M_POWER_DOMAIN_GPU			4
+#define IMX8M_POWER_DOMAIN_VPU			5
+#define IMX8M_POWER_DOMAIN_HDMI			6
+#define IMX8M_POWER_DOMAIN_DISP			7
+#define IMX8M_POWER_DOMAIN_MIPI_CSI1_PHY	8
+#define IMX8M_POWER_DOMAIN_MIPI_CSI2_PHY	9
+#define IMX8M_POWER_DOMAIN_PCIE2_PHY		10
+
 #define GPC_LPCR_A_CORE_BSC			0x000
 
 #define GPC_PGC_CPU_MAPPING		0x0ec
+#define PCIE2_A_CORE_DOMAIN		BIT(15)
+#define MIPI_CSI2_A_CORE_DOMAIN		BIT(14)
+#define MIPI_CSI1_A_CORE_DOMAIN		BIT(13)
+#define DISP_A_CORE_DOMAIN		BIT(12)
+#define HDMI_A_CORE_DOMAIN		BIT(11)
+#define VPU_A_CORE_DOMAIN		BIT(10)
+#define GPU_A_CORE_DOMAIN		BIT(9)
 #define USB_HSIC_PHY_A_CORE_DOMAIN		BIT(6)
 #define USB_OTG2_PHY_A_CORE_DOMAIN		BIT(5)
 #define USB_OTG1_PHY_A_CORE_DOMAIN		BIT(4)
@@ -26,6 +45,13 @@
 
 #define GPC_PU_PGC_SW_PUP_REQ		0x0f8
 #define GPC_PU_PGC_SW_PDN_REQ		0x104
+#define PCIE2_SW_Pxx_REQ		BIT(13)
+#define MIPI_CSI2_SW_Pxx_REQ		BIT(12)
+#define MIPI_CSI1_SW_Pxx_REQ		BIT(11)
+#define DISP_SW_Pxx_REQ			BIT(10)
+#define HDMI_SW_Pxx_REQ			BIT(9)
+#define VPU_SW_Pxx_REQ			BIT(8)
+#define GPU_SW_Pxx_REQ			BIT(7)
 #define USB_HSIC_PHY_SW_Pxx_REQ		BIT(4)
 #define USB_OTG2_PHY_SW_Pxx_REQ		BIT(3)
 #define USB_OTG1_PHY_SW_Pxx_REQ		BIT(2)
@@ -42,7 +68,16 @@
  */
 #define PGC_MIPI			16
 #define PGC_PCIE			17
+#define PGC_USB_OTG1			18
+#define PGC_USB_OTG2			19
 #define PGC_USB_HSIC			20
+#define PGC_GPU				23
+#define PGC_VPU				24
+#define PGC_HDMI			25
+#define PGC_DISP			26
+#define PGC_MIPI_CSI1			27
+#define PGC_MIPI_CSI2			28
+#define PGC_PCIE2			29
 #define GPC_PGC_CTRL(n)			(0x800 + (n) * 0x40)
 #define GPC_PGC_SR(n)			(GPC_PGC_CTRL(n) + 0xc)
 
@@ -219,6 +254,165 @@ static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
 	},
 };
 
+static const struct imx_pgc_domain imx8m_pgc_domains[] = {
+	[IMX8M_POWER_DOMAIN_MIPI_DSI_PHY] = {
+		.genpd = {
+			.name      = "mipi-phy",
+		},
+		.bits  = {
+			.pxx = MIPI_PHY_SW_Pxx_REQ,
+			.map = MIPI_PHY_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_MIPI,
+	},
+
+	[IMX8M_POWER_DOMAIN_PCIE1_PHY] = {
+		.genpd = {
+			.name      = "pcie1-phy",
+		},
+		.bits  = {
+			.pxx = PCIE_PHY_SW_Pxx_REQ,
+			.map = PCIE_PHY_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_PCIE,
+	},
+
+	[IMX8M_POWER_DOMAIN_USB_OTG1] = {
+		.genpd = {
+			.name      = "usb-otg1",
+		},
+		.bits  = {
+			.pxx = USB_OTG1_PHY_SW_Pxx_REQ,
+			.map = USB_OTG1_PHY_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_USB_OTG1,
+	},
+
+	[IMX8M_POWER_DOMAIN_USB_OTG2] = {
+		.genpd = {
+			.name      = "usb-otg2",
+		},
+		.bits  = {
+			.pxx = USB_OTG2_PHY_SW_Pxx_REQ,
+			.map = USB_OTG2_PHY_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_USB_OTG2,
+	},
+
+	[IMX8M_POWER_DOMAIN_GPU] = {
+		.genpd = {
+			.name      = "gpu",
+		},
+		.bits  = {
+			.pxx = GPU_SW_Pxx_REQ,
+			.map = GPU_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_GPU,
+	},
+
+	[IMX8M_POWER_DOMAIN_VPU] = {
+		.genpd = {
+			.name      = "vpu",
+		},
+		.bits  = {
+			.pxx = VPU_SW_Pxx_REQ,
+			.map = VPU_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_VPU,
+	},
+
+	[IMX8M_POWER_DOMAIN_HDMI] = {
+		.genpd = {
+			.name      = "hdmi",
+		},
+		.bits  = {
+			.pxx = HDMI_SW_Pxx_REQ,
+			.map = HDMI_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_HDMI,
+	},
+
+	[IMX8M_POWER_DOMAIN_DISP] = {
+		.genpd = {
+			.name      = "disp",
+		},
+		.bits  = {
+			.pxx = DISP_SW_Pxx_REQ,
+			.map = DISP_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_DISP,
+	},
+
+	[IMX8M_POWER_DOMAIN_MIPI_CSI1_PHY] = {
+		.genpd = {
+			.name      = "mipi-csi1-phy",
+		},
+		.bits  = {
+			.pxx = MIPI_CSI1_SW_Pxx_REQ,
+			.map = MIPI_CSI1_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_MIPI_CSI1,
+	},
+
+	[IMX8M_POWER_DOMAIN_MIPI_CSI2_PHY] = {
+		.genpd = {
+			.name      = "mipi-csi2-phy",
+		},
+		.bits  = {
+			.pxx = MIPI_CSI2_SW_Pxx_REQ,
+			.map = MIPI_CSI2_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_MIPI_CSI2,
+	},
+
+	[IMX8M_POWER_DOMAIN_PCIE2_PHY] = {
+		.genpd = {
+			.name      = "pcie2-phy",
+		},
+		.bits  = {
+			.pxx = PCIE2_SW_Pxx_REQ,
+			.map = PCIE2_A_CORE_DOMAIN,
+		},
+		.pgc	   = PGC_PCIE2,
+	},
+};
+
+static const struct regmap_range imx8m_pgc_yes_ranges[] = {
+	regmap_reg_range(GPC_LPCR_A_CORE_BSC,
+			 GPC_M4_PU_PDN_FLG),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
+			 GPC_PGC_SR(PGC_MIPI)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
+			 GPC_PGC_SR(PGC_PCIE)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_USB_OTG1),
+			 GPC_PGC_SR(PGC_USB_OTG1)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_USB_OTG2),
+			 GPC_PGC_SR(PGC_USB_OTG2)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_GPU),
+			 GPC_PGC_SR(PGC_GPU)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_VPU),
+			 GPC_PGC_SR(PGC_VPU)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_HDMI),
+			 GPC_PGC_SR(PGC_HDMI)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_DISP),
+			 GPC_PGC_SR(PGC_DISP)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI_CSI1),
+			 GPC_PGC_SR(PGC_MIPI_CSI1)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI_CSI2),
+			 GPC_PGC_SR(PGC_MIPI_CSI2)),
+	regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE2),
+			 GPC_PGC_SR(PGC_PCIE2)),
+};
+
+static const struct imx_pgc_domain_data imx8m_pgc_domain_data = {
+	.domains = imx8m_pgc_domains,
+	.domains_num = ARRAY_SIZE(imx8m_pgc_domains),
+	.access_table = {
+		.yes_ranges	= imx8m_pgc_yes_ranges,
+		.n_yes_ranges	= ARRAY_SIZE(imx8m_pgc_yes_ranges),
+	},
+};
+
 static int imx_pgc_domain_probe(struct platform_device *pdev)
 {
 	struct imx_pgc_domain *domain = pdev->dev.platform_data;
@@ -373,6 +567,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
 
 static const struct of_device_id imx_gpcv2_dt_ids[] = {
 	{ .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
+	{ .compatible = "fsl,imx8m-gpc", .data = &imx8m_pgc_domain_data, },
 	{ }
 };
 
-- 
2.19.1

Re: [PATCH 0/3] GPCv2 support for i.MX8MQ

[Lucas Stach]

Hi Andrey,

Am Samstag, den 17.11.2018, 10:12 -0800 schrieb Andrey Smirnov:
> Everyone:
> 
> This series contains changes I made to add support for i.MX8MQ to
> GPCv2 driver in order to enable support of PCIE IP block on i.MX8MQ
> SoCs (full tree can be found at [github-v0]). This series is _very_
> preliminary and by no means is ready for inclusion (it also has some
> unmet dependencies).  However is should be in OK enough shape to get
> some early feedback on, which is the intent of this submission.
> 
> All other feedback is appreciated as well!

I've already sent out my version of the GPCv2 i.MX8M support on Friday,
but for whatever reason missed to CC you. It's unfortunate that we now
have 2 slightly different versions of this on the list.

Regards,
Lucas

Re: [PATCH 0/3] GPCv2 support for i.MX8MQ

[Andrey Smirnov]

On Mon, Nov 19, 2018 at 6:10 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Hi Andrey,
>
> Am Samstag, den 17.11.2018, 10:12 -0800 schrieb Andrey Smirnov:
> > Everyone:
> >
> > This series contains changes I made to add support for i.MX8MQ to
> > GPCv2 driver in order to enable support of PCIE IP block on i.MX8MQ
> > SoCs (full tree can be found at [github-v0]). This series is _very_
> > preliminary and by no means is ready for inclusion (it also has some
> > unmet dependencies).  However is should be in OK enough shape to get
> > some early feedback on, which is the intent of this submission.
> >
> > All other feedback is appreciated as well!
>
> I've already sent out my version of the GPCv2 i.MX8M support on Friday,
> but for whatever reason missed to CC you. It's unfortunate that we now
> have 2 slightly different versions of this on the list.
>

Well, assuming first come first served, I am guessing this is your
adventure now.

Thanks,
Andrey Smirnov