From: Rob Herring <robh@kernel.org>
To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Sean Hudson <darknighte@darknighte.com>,
Frank Rowand <frowand.list@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org,
Grant Likely <grant.likely@arm.com>,
Kumar Gala <kumar.gala@linaro.org>,
arm@kernel.org, Will Deacon <will.deacon@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2 08/34] dt-bindings: arm: Convert PMU binding to json-schema
Date: Mon, 3 Dec 2018 15:31:57 -0600 [thread overview]
Message-ID: <20181203213223.16986-9-robh@kernel.org> (raw)
In-Reply-To: <20181203213223.16986-1-robh@kernel.org>
Convert ARM PMU binding to DT schema format using json-schema.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
.../devicetree/bindings/arm/pmu.yaml | 91 +++++++++++++++++++
2 files changed, 91 insertions(+), 70 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
deleted file mode 100644
index 13611a8199bb..000000000000
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ /dev/null
@@ -1,70 +0,0 @@
-* ARM Performance Monitor Units
-
-ARM cores often have a PMU for counting cpu and cache events like cache misses
-and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
-representation in the device tree should be done as under:-
-
-Required properties:
-
-- compatible : should be one of
- "apm,potenza-pmu"
- "arm,armv8-pmuv3"
- "arm,cortex-a73-pmu"
- "arm,cortex-a72-pmu"
- "arm,cortex-a57-pmu"
- "arm,cortex-a53-pmu"
- "arm,cortex-a35-pmu"
- "arm,cortex-a17-pmu"
- "arm,cortex-a15-pmu"
- "arm,cortex-a12-pmu"
- "arm,cortex-a9-pmu"
- "arm,cortex-a8-pmu"
- "arm,cortex-a7-pmu"
- "arm,cortex-a5-pmu"
- "arm,arm11mpcore-pmu"
- "arm,arm1176-pmu"
- "arm,arm1136-pmu"
- "brcm,vulcan-pmu"
- "cavium,thunder-pmu"
- "qcom,scorpion-pmu"
- "qcom,scorpion-mp-pmu"
- "qcom,krait-pmu"
-- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
- interrupt (PPI) then 1 interrupt should be specified.
-
-Optional properties:
-
-- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU
- nodes corresponding directly to the affinity of
- the SPIs listed in the interrupts property.
-
- When using a PPI, specifies a list of phandles to CPU
- nodes corresponding to the set of CPUs which have
- a PMU of this type signalling the PPI listed in the
- interrupts property, unless this is already specified
- by the PPI interrupt specifier itself (in which case
- the interrupt-affinity property shouldn't be present).
-
- This property should be present when there is more than
- a single SPI.
-
-
-- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd
- events.
-
-- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register
- (SDER) is accessible. This will cause the driver to do
- any setup required that is only possible in ARMv7 secure
- state. If not present the ARMv7 SDER will not be touched,
- which means the PMU may fail to operate unless external
- code (bootloader or security monitor) has performed the
- appropriate initialisation. Note that this property is
- not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
- in Non-secure state.
-
-Example:
-
-pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <100 101>;
-};
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml
new file mode 100644
index 000000000000..3ea4abfbf276
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/pmu.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Performance Monitor Units
+
+maintainers:
+ - Mark Rutland <mark.rutland@arm.com>
+ - Will Deacon <will.deacon@arm.com>
+
+description: |+
+ ARM cores often have a PMU for counting cpu and cache events like cache misses
+ and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
+ representation in the device tree should be done as under:-
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - apm,potenza-pmu
+ - arm,armv8-pmuv3
+ - arm,cortex-a73-pmu
+ - arm,cortex-a72-pmu
+ - arm,cortex-a57-pmu
+ - arm,cortex-a53-pmu
+ - arm,cortex-a35-pmu
+ - arm,cortex-a17-pmu
+ - arm,cortex-a15-pmu
+ - arm,cortex-a12-pmu
+ - arm,cortex-a9-pmu
+ - arm,cortex-a8-pmu
+ - arm,cortex-a7-pmu
+ - arm,cortex-a5-pmu
+ - arm,arm11mpcore-pmu
+ - arm,arm1176-pmu
+ - arm,arm1136-pmu
+ - brcm,vulcan-pmu
+ - cavium,thunder-pmu
+ - qcom,scorpion-pmu
+ - qcom,scorpion-mp-pmu
+ - qcom,krait-pmu
+ - items:
+ - const: arm,cortex-a7-pmu
+ - const: arm,cortex-a15-pmu
+
+ interrupts:
+ # Don't know how many CPUs, so no constraints to specify
+ description: 1 per-cpu interrupt (PPI) or 1 interrupt per core.
+
+ interrupt-affinity:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ When using SPIs, specifies a list of phandles to CPU
+ nodes corresponding directly to the affinity of
+ the SPIs listed in the interrupts property.
+
+ When using a PPI, specifies a list of phandles to CPU
+ nodes corresponding to the set of CPUs which have
+ a PMU of this type signalling the PPI listed in the
+ interrupts property, unless this is already specified
+ by the PPI interrupt specifier itself (in which case
+ the interrupt-affinity property shouldn't be present).
+
+ This property should be present when there is more than
+ a single SPI.
+
+ qcom,no-pc-write:
+ type: boolean
+ description:
+ Indicates that this PMU doesn't support the 0xc and 0xd events.
+
+ secure-reg-access:
+ type: boolean
+ description:
+ Indicates that the ARMv7 Secure Debug Enable Register
+ (SDER) is accessible. This will cause the driver to do
+ any setup required that is only possible in ARMv7 secure
+ state. If not present the ARMv7 SDER will not be touched,
+ which means the PMU may fail to operate unless external
+ code (bootloader or security monitor) has performed the
+ appropriate initialisation. Note that this property is
+ not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
+ in Non-secure state.
+
+required:
+ - compatible
+
+...
--
2.19.1
next prev parent reply other threads:[~2018-12-03 21:35 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181203213223.16986-1-robh@kernel.org>
2018-12-03 21:31 ` [PATCH v2 01/34] kbuild: Add support for DT binding schema checks Rob Herring
2018-12-08 4:47 ` Masahiro Yamada
2018-12-10 15:55 ` Rob Herring
2018-12-03 21:31 ` [PATCH v2 02/34] dt-bindings: Add a writing DT schemas how-to and annotated example Rob Herring
2018-12-03 21:31 ` [PATCH v2 03/34] dt-bindings: Convert trivial-devices.txt to json-schema Rob Herring
2018-12-03 21:31 ` [PATCH v2 04/34] dt-bindings: altera: Convert clkmgr binding " Rob Herring
2018-12-05 15:13 ` Dinh Nguyen
2018-12-03 21:31 ` [PATCH v2 05/34] dt-bindings: i2c: Convert i2c-gpio " Rob Herring
2018-12-03 21:31 ` [PATCH v2 06/34] dt-bindings: timer: Convert ARM timer bindings " Rob Herring
2018-12-03 21:31 ` [PATCH v2 07/34] dt-bindings: arm: Convert cpu binding " Rob Herring
2018-12-03 21:31 ` Rob Herring [this message]
2018-12-05 10:08 ` [PATCH v2 08/34] dt-bindings: arm: Convert PMU " Will Deacon
2018-12-05 15:42 ` Rob Herring
2018-12-06 14:37 ` Will Deacon
2018-12-03 21:31 ` [PATCH v2 09/34] dt-bindings: arm: Convert primecell " Rob Herring
2018-12-03 21:31 ` [PATCH v2 10/34] dt-bindings: arm: Convert Actions Semi bindings to jsonschema Rob Herring
2019-01-14 10:26 ` Manivannan Sadhasivam
2018-12-03 21:32 ` [PATCH v2 11/34] dt-bindings: arm: Convert Alpine board/soc bindings to json-schema Rob Herring
2018-12-04 7:53 ` Antoine Tenart
2018-12-03 21:32 ` [PATCH v2 12/34] dt-bindings: arm: Convert Altera " Rob Herring
2018-12-05 15:13 ` Dinh Nguyen
2018-12-03 21:32 ` [PATCH v2 13/34] dt-bindings: arm: amlogic: Move 'amlogic,meson-gx-ao-secure' binding to its own file Rob Herring
2018-12-04 8:31 ` [PATCH v2 13/34] dt-bindings: arm: amlogic: Move 'amlogic, meson-gx-ao-secure' " Neil Armstrong
2018-12-05 1:01 ` [PATCH v2 13/34] dt-bindings: arm: amlogic: Move 'amlogic,meson-gx-ao-secure' " Kevin Hilman
2018-12-05 4:18 ` Rob Herring
2019-01-09 16:12 ` Rob Herring
2018-12-03 21:32 ` [PATCH v2 14/34] dt-bindings: arm: Convert Amlogic board/soc bindings to json-schema Rob Herring
2018-12-04 8:39 ` Neil Armstrong
2018-12-04 14:44 ` Rob Herring
2018-12-06 21:27 ` Rob Herring
2018-12-03 21:32 ` [PATCH v2 15/34] dt-bindings: arm: Convert Atmel " Rob Herring
2018-12-04 8:12 ` Nicolas.Ferre
2018-12-04 22:48 ` Rob Herring
2018-12-03 21:32 ` [PATCH v2 16/34] dt-bindings: arm: Convert Calxeda " Rob Herring
2018-12-03 21:32 ` [PATCH v2 17/34] dt-bindings: arm: Convert TI davinci " Rob Herring
2018-12-06 10:28 ` Sekhar Nori
2018-12-03 21:32 ` [PATCH v2 18/34] dt-bindings: arm: Convert FSL " Rob Herring
2018-12-06 2:31 ` Shawn Guo
2018-12-06 23:33 ` Rob Herring
2018-12-08 1:58 ` Shawn Guo
2019-01-10 6:42 ` Shawn Guo
2019-01-10 10:44 ` Vokáč Michal
2019-01-10 13:44 ` Shawn Guo
2018-12-03 21:32 ` [PATCH v2 19/34] dt-bindings: arm: Convert MediaTek " Rob Herring
2018-12-03 21:32 ` [PATCH v2 20/34] dt-bindings: arm: Convert TI nspire " Rob Herring
2018-12-03 21:32 ` [PATCH v2 21/34] dt-bindings: arm: Convert Oxford Semi " Rob Herring
2018-12-04 8:43 ` Neil Armstrong
2018-12-04 14:04 ` Rob Herring
2018-12-03 21:32 ` [PATCH v2 22/34] dt-bindings: arm: Convert QCom " Rob Herring
2018-12-05 18:31 ` Andy Gross
2018-12-03 21:32 ` [PATCH v2 23/34] dt-bindings: arm: Convert Realtek " Rob Herring
2018-12-03 21:32 ` [PATCH v2 24/34] dt-bindings: arm: Convert Rockchip " Rob Herring
2018-12-04 14:16 ` Heiko Stuebner
2018-12-04 15:04 ` Rob Herring
2018-12-09 22:14 ` [PATCH v2.1 " Heiko Stuebner
2018-12-10 9:54 ` Heiko Stuebner
2018-12-10 15:13 ` Rob Herring
2018-12-10 22:45 ` [PATCH v2.2 " Heiko Stuebner
2018-12-11 15:21 ` Rob Herring
2018-12-03 21:32 ` [PATCH v2 25/34] dt-bindings: arm: renesas: Move 'renesas,prr' binding to its own doc Rob Herring
2018-12-04 14:44 ` Simon Horman
2018-12-04 14:56 ` Geert Uytterhoeven
2018-12-03 21:32 ` [PATCH v2 26/34] dt-bindings: arm: Convert Renesas board/soc bindings to json-schema Rob Herring
2018-12-04 14:48 ` Simon Horman
2018-12-04 14:57 ` Geert Uytterhoeven
2018-12-04 15:08 ` Rob Herring
2018-12-05 19:44 ` Simon Horman
2018-12-06 19:38 ` Rob Herring
2018-12-10 11:12 ` Simon Horman
2018-12-03 21:32 ` [PATCH v2 27/34] dt-bindings: arm: Convert CSR SiRF " Rob Herring
2018-12-03 21:32 ` [PATCH v2 28/34] dt-bindings: arm: Convert SPEAr " Rob Herring
2018-12-04 4:50 ` Viresh Kumar
2018-12-03 21:32 ` [PATCH v2 29/34] dt-bindings: arm: Convert ST STi " Rob Herring
2018-12-04 8:10 ` Patrice CHOTARD
2018-12-03 21:32 ` [PATCH v2 30/34] dt-bindings: arm: Convert Tegra " Rob Herring
2018-12-04 8:50 ` Thierry Reding
2018-12-06 22:38 ` Rob Herring
2018-12-07 11:46 ` Thierry Reding
2018-12-03 21:32 ` [PATCH v2 31/34] dt-bindings: arm: Convert VIA " Rob Herring
2018-12-03 21:32 ` [PATCH v2 32/34] dt-bindings: arm: Convert Xilinx " Rob Herring
2018-12-03 21:32 ` [PATCH v2 33/34] dt-bindings: arm: Add missing Xilinx boards Rob Herring
2018-12-03 21:32 ` [PATCH v2 34/34] dt-bindings: arm: Convert ZTE board/soc bindings to json-schema Rob Herring
2018-12-06 2:33 ` Shawn Guo
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