linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks
@ 2018-12-18  0:21 Jeffrey Hugo
  2018-12-18  0:57 ` Jeffrey Hugo
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Jeffrey Hugo @ 2018-12-18  0:21 UTC (permalink / raw)
  To: mturquette, sboyd, robh+dt, mark.rutland
  Cc: bjorn.andersson, marc.w.gonzalez, linux-clk, devicetree,
	linux-arm-msm, linux-kernel, Jeffrey Hugo

Add rpm smd clocks, PMIC and bus clocks which are required on MSM8998
for clients to vote on.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
---
v3
-Ensure Marc's hang was addressed by GCC fixes
-Renamed the bb clks to ln_bb to match the schematics

v2
-fix compatible ordering nits per Stephen

 .../devicetree/bindings/clock/qcom,rpmcc.txt       |  1 +
 drivers/clk/qcom/clk-smd-rpm.c                     | 63 ++++++++++++++++++++++
 include/dt-bindings/clock/qcom,rpmcc.h             |  8 +++
 3 files changed, 72 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
index 87b4949..944719b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -16,6 +16,7 @@ Required properties :
 			"qcom,rpmcc-msm8974", "qcom,rpmcc"
 			"qcom,rpmcc-apq8064", "qcom,rpmcc"
 			"qcom,rpmcc-msm8996", "qcom,rpmcc"
+			"qcom,rpmcc-msm8998", "qcom,rpmcc"
 			"qcom,rpmcc-qcs404", "qcom,rpmcc"
 
 - #clock-cells : shall contain 1
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index d3aadae..4e3fd73 100644
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -655,10 +655,73 @@ static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm)
 	.num_clks = ARRAY_SIZE(qcs404_clks),
 };
 
+/* msm8998 */
+DEFINE_CLK_SMD_RPM(msm8998, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
+DEFINE_CLK_SMD_RPM(msm8998, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
+DEFINE_CLK_SMD_RPM(msm8998, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, div_clk1, div_clk1_a, 0xb);
+DEFINE_CLK_SMD_RPM(msm8998, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, bb_clk1_a, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, bb_clk2_a, 2);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin,
+				     3);
+DEFINE_CLK_SMD_RPM(msm8998, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk,
+		   QCOM_SMD_RPM_MMAXI_CLK, 0);
+DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
+		   QCOM_SMD_RPM_AGGR_CLK, 1);
+DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
+		   QCOM_SMD_RPM_AGGR_CLK, 2);
+DEFINE_CLK_SMD_RPM_QDSS(msm8998, qdss_clk, qdss_a_clk,
+			QCOM_SMD_RPM_MISC_CLK, 1);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk1, rf_clk1_a, 4);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk2_pin, rf_clk2_a_pin, 5);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6);
+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6);
+static struct clk_smd_rpm *msm8998_clks[] = {
+	[RPM_SMD_SNOC_CLK] = &msm8998_snoc_clk,
+	[RPM_SMD_SNOC_A_CLK] = &msm8998_snoc_a_clk,
+	[RPM_SMD_CNOC_CLK] = &msm8998_cnoc_clk,
+	[RPM_SMD_CNOC_A_CLK] = &msm8998_cnoc_a_clk,
+	[RPM_SMD_CE1_CLK] = &msm8998_ce1_clk,
+	[RPM_SMD_CE1_A_CLK] = &msm8998_ce1_a_clk,
+	[RPM_SMD_DIV_CLK1] = &msm8998_div_clk1,
+	[RPM_SMD_DIV_A_CLK1] = &msm8998_div_clk1_a,
+	[RPM_SMD_IPA_CLK] = &msm8998_ipa_clk,
+	[RPM_SMD_IPA_A_CLK] = &msm8998_ipa_a_clk,
+	[RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1,
+	[RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
+	[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
+	[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
+	[RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin,
+	[RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin,
+	[RPM_SMD_MMAXI_CLK] = &msm8998_mmssnoc_axi_rpm_clk,
+	[RPM_SMD_MMAXI_A_CLK] = &msm8998_mmssnoc_axi_rpm_a_clk,
+	[RPM_SMD_AGGR1_NOC_CLK] = &msm8998_aggre1_noc_clk,
+	[RPM_SMD_AGGR1_NOC_A_CLK] = &msm8998_aggre1_noc_a_clk,
+	[RPM_SMD_AGGR2_NOC_CLK] = &msm8998_aggre2_noc_clk,
+	[RPM_SMD_AGGR2_NOC_A_CLK] = &msm8998_aggre2_noc_a_clk,
+	[RPM_SMD_QDSS_CLK] = &msm8998_qdss_clk,
+	[RPM_SMD_QDSS_A_CLK] = &msm8998_qdss_a_clk,
+	[RPM_SMD_RF_CLK1] = &msm8998_rf_clk1,
+	[RPM_SMD_RF_CLK1_A] = &msm8998_rf_clk1_a,
+	[RPM_SMD_RF_CLK2_PIN] = &msm8998_rf_clk2_pin,
+	[RPM_SMD_RF_CLK2_A_PIN] = &msm8998_rf_clk2_a_pin,
+	[RPM_SMD_RF_CLK3] = &msm8998_rf_clk3,
+	[RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a,
+	[RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin,
+	[RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_msm8998 = {
+	.clks = msm8998_clks,
+	.num_clks = ARRAY_SIZE(msm8998_clks),
+};
+
 static const struct of_device_id rpm_smd_clk_match_table[] = {
 	{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
 	{ .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
 	{ .compatible = "qcom,rpmcc-msm8996", .data = &rpm_clk_msm8996 },
+	{ .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },
 	{ .compatible = "qcom,rpmcc-qcs404",  .data = &rpm_clk_qcs404  },
 	{ }
 };
diff --git a/include/dt-bindings/clock/qcom,rpmcc.h b/include/dt-bindings/clock/qcom,rpmcc.h
index 3658b0c..1526df4 100644
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+++ b/include/dt-bindings/clock/qcom,rpmcc.h
@@ -127,5 +127,13 @@
 #define RPM_SMD_BIMC_GPU_A_CLK			77
 #define RPM_SMD_QPIC_CLK			78
 #define RPM_SMD_QPIC_CLK_A			79
+#define RPM_SMD_LN_BB_CLK2			80
+#define RPM_SMD_LN_BB_A_CLK2			81
+#define RPM_SMD_LN_BB_CLK3_PIN			82
+#define RPM_SMD_LN_BB_A_CLK3_PIN		83
+#define RPM_SMD_RF_CLK3				84
+#define RPM_SMD_RF_CLK3_A			85
+#define RPM_SMD_RF_CLK3_PIN			86
+#define RPM_SMD_RF_CLK3_A_PIN			87
 
 #endif
-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks
  2018-12-18  0:21 [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks Jeffrey Hugo
@ 2018-12-18  0:57 ` Jeffrey Hugo
  2018-12-18  2:55 ` kbuild test robot
  2018-12-18  2:56 ` kbuild test robot
  2 siblings, 0 replies; 4+ messages in thread
From: Jeffrey Hugo @ 2018-12-18  0:57 UTC (permalink / raw)
  To: mturquette, sboyd, robh+dt, mark.rutland
  Cc: bjorn.andersson, marc.w.gonzalez, linux-clk, devicetree,
	linux-arm-msm, linux-kernel

On 12/17/2018 5:21 PM, Jeffrey Hugo wrote:
> Add rpm smd clocks, PMIC and bus clocks which are required on MSM8998
> for clients to vote on.
> 
> Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
> ---
> v3
> -Ensure Marc's hang was addressed by GCC fixes
> -Renamed the bb clks to ln_bb to match the schematics
> 
> v2
> -fix compatible ordering nits per Stephen
> 

Sorry, I missed a build error.  Ignore this.  Will spin a v4.

-- 
Jeffrey Hugo
Qualcomm Datacenter Technologies as an affiliate of Qualcomm 
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks
  2018-12-18  0:21 [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks Jeffrey Hugo
  2018-12-18  0:57 ` Jeffrey Hugo
@ 2018-12-18  2:55 ` kbuild test robot
  2018-12-18  2:56 ` kbuild test robot
  2 siblings, 0 replies; 4+ messages in thread
From: kbuild test robot @ 2018-12-18  2:55 UTC (permalink / raw)
  To: Jeffrey Hugo
  Cc: kbuild-all, mturquette, sboyd, robh+dt, mark.rutland,
	bjorn.andersson, marc.w.gonzalez, linux-clk, devicetree,
	linux-arm-msm, linux-kernel, Jeffrey Hugo

[-- Attachment #1: Type: text/plain, Size: 6633 bytes --]

Hi Jeffrey,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on next-20181217]
[cannot apply to v4.20-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jeffrey-Hugo/clk-qcom-smd-Add-support-for-MSM8998-rpm-clocks/20181218-095431
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: mips-allmodconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=mips 

All errors (new ones prefixed by >>):

   drivers/clk/qcom/clk-smd-rpm.c:691:3: error: 'RPM_SMD_LN_BB_CLK1' undeclared here (not in a function); did you mean 'RPM_SMD_LN_BB_CLK2'?
     [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1,
      ^~~~~~~~~~~~~~~~~~
      RPM_SMD_LN_BB_CLK2
   drivers/clk/qcom/clk-smd-rpm.c:691:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:691:3: note: (near initialization for 'msm8998_clks')
>> drivers/clk/qcom/clk-smd-rpm.c:692:3: error: 'RPM_SMD_LN_BB_CLK1_A' undeclared here (not in a function); did you mean 'RPM_SMD_LN_BB_CLK1'?
     [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
      ^~~~~~~~~~~~~~~~~~~~
      RPM_SMD_LN_BB_CLK1
   drivers/clk/qcom/clk-smd-rpm.c:692:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:692:3: note: (near initialization for 'msm8998_clks')
   drivers/clk/qcom/clk-smd-rpm.c:692:28: error: 'msm8998_ln_bb_clk1_a' undeclared here (not in a function); did you mean 'msm8998_ln_bb_clk1'?
     [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
                               ^~~~~~~~~~~~~~~~~~~~
                               msm8998_ln_bb_clk1
>> drivers/clk/qcom/clk-smd-rpm.c:694:3: error: 'RPM_SMD_LN_BB_CLK2_A' undeclared here (not in a function); did you mean 'RPM_SMD_LN_BB_CLK1_A'?
     [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
      ^~~~~~~~~~~~~~~~~~~~
      RPM_SMD_LN_BB_CLK1_A
   drivers/clk/qcom/clk-smd-rpm.c:694:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:694:3: note: (near initialization for 'msm8998_clks')
>> drivers/clk/qcom/clk-smd-rpm.c:694:28: error: 'msm8998_ln_bb_clk2_a' undeclared here (not in a function); did you mean 'msm8998_ln_bb_clk1_a'?
     [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
                               ^~~~~~~~~~~~~~~~~~~~
                               msm8998_ln_bb_clk1_a
   drivers/clk/qcom/clk-smd-rpm.c:696:3: error: 'RPM_SMD_LN_BB_CLK3_A_PIN' undeclared here (not in a function); did you mean 'RPM_SMD_LN_BB_CLK3_PIN'?
     [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin,
      ^~~~~~~~~~~~~~~~~~~~~~~~
      RPM_SMD_LN_BB_CLK3_PIN
   drivers/clk/qcom/clk-smd-rpm.c:696:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:696:3: note: (near initialization for 'msm8998_clks')

vim +692 drivers/clk/qcom/clk-smd-rpm.c

   657	
   658	/* msm8998 */
   659	DEFINE_CLK_SMD_RPM(msm8998, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
   660	DEFINE_CLK_SMD_RPM(msm8998, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
   661	DEFINE_CLK_SMD_RPM(msm8998, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
   662	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, div_clk1, div_clk1_a, 0xb);
   663	DEFINE_CLK_SMD_RPM(msm8998, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
   664	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, bb_clk1_a, 1);
   665	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, bb_clk2_a, 2);
   666	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin,
   667					     3);
   668	DEFINE_CLK_SMD_RPM(msm8998, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk,
   669			   QCOM_SMD_RPM_MMAXI_CLK, 0);
   670	DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
   671			   QCOM_SMD_RPM_AGGR_CLK, 1);
   672	DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
   673			   QCOM_SMD_RPM_AGGR_CLK, 2);
   674	DEFINE_CLK_SMD_RPM_QDSS(msm8998, qdss_clk, qdss_a_clk,
   675				QCOM_SMD_RPM_MISC_CLK, 1);
   676	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk1, rf_clk1_a, 4);
   677	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk2_pin, rf_clk2_a_pin, 5);
   678	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6);
   679	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6);
   680	static struct clk_smd_rpm *msm8998_clks[] = {
   681		[RPM_SMD_SNOC_CLK] = &msm8998_snoc_clk,
   682		[RPM_SMD_SNOC_A_CLK] = &msm8998_snoc_a_clk,
   683		[RPM_SMD_CNOC_CLK] = &msm8998_cnoc_clk,
   684		[RPM_SMD_CNOC_A_CLK] = &msm8998_cnoc_a_clk,
   685		[RPM_SMD_CE1_CLK] = &msm8998_ce1_clk,
   686		[RPM_SMD_CE1_A_CLK] = &msm8998_ce1_a_clk,
   687		[RPM_SMD_DIV_CLK1] = &msm8998_div_clk1,
   688		[RPM_SMD_DIV_A_CLK1] = &msm8998_div_clk1_a,
   689		[RPM_SMD_IPA_CLK] = &msm8998_ipa_clk,
   690		[RPM_SMD_IPA_A_CLK] = &msm8998_ipa_a_clk,
 > 691		[RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1,
 > 692		[RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
   693		[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
 > 694		[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
   695		[RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin,
   696		[RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin,
   697		[RPM_SMD_MMAXI_CLK] = &msm8998_mmssnoc_axi_rpm_clk,
   698		[RPM_SMD_MMAXI_A_CLK] = &msm8998_mmssnoc_axi_rpm_a_clk,
   699		[RPM_SMD_AGGR1_NOC_CLK] = &msm8998_aggre1_noc_clk,
   700		[RPM_SMD_AGGR1_NOC_A_CLK] = &msm8998_aggre1_noc_a_clk,
   701		[RPM_SMD_AGGR2_NOC_CLK] = &msm8998_aggre2_noc_clk,
   702		[RPM_SMD_AGGR2_NOC_A_CLK] = &msm8998_aggre2_noc_a_clk,
   703		[RPM_SMD_QDSS_CLK] = &msm8998_qdss_clk,
   704		[RPM_SMD_QDSS_A_CLK] = &msm8998_qdss_a_clk,
   705		[RPM_SMD_RF_CLK1] = &msm8998_rf_clk1,
   706		[RPM_SMD_RF_CLK1_A] = &msm8998_rf_clk1_a,
   707		[RPM_SMD_RF_CLK2_PIN] = &msm8998_rf_clk2_pin,
   708		[RPM_SMD_RF_CLK2_A_PIN] = &msm8998_rf_clk2_a_pin,
   709		[RPM_SMD_RF_CLK3] = &msm8998_rf_clk3,
   710		[RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a,
   711		[RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin,
   712		[RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin,
   713	};
   714	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 58180 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks
  2018-12-18  0:21 [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks Jeffrey Hugo
  2018-12-18  0:57 ` Jeffrey Hugo
  2018-12-18  2:55 ` kbuild test robot
@ 2018-12-18  2:56 ` kbuild test robot
  2 siblings, 0 replies; 4+ messages in thread
From: kbuild test robot @ 2018-12-18  2:56 UTC (permalink / raw)
  To: Jeffrey Hugo
  Cc: kbuild-all, mturquette, sboyd, robh+dt, mark.rutland,
	bjorn.andersson, marc.w.gonzalez, linux-clk, devicetree,
	linux-arm-msm, linux-kernel, Jeffrey Hugo

[-- Attachment #1: Type: text/plain, Size: 6211 bytes --]

Hi Jeffrey,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on next-20181217]
[cannot apply to v4.20-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jeffrey-Hugo/clk-qcom-smd-Add-support-for-MSM8998-rpm-clocks/20181218-095431
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: nds32-allmodconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 6.4.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=6.4.0 make.cross ARCH=nds32 

All errors (new ones prefixed by >>):

>> drivers/clk/qcom/clk-smd-rpm.c:691:3: error: 'RPM_SMD_LN_BB_CLK1' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1,
      ^~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/clk-smd-rpm.c:691:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:691:3: note: (near initialization for 'msm8998_clks')
>> drivers/clk/qcom/clk-smd-rpm.c:692:3: error: 'RPM_SMD_LN_BB_CLK1_A' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
      ^~~~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/clk-smd-rpm.c:692:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:692:3: note: (near initialization for 'msm8998_clks')
>> drivers/clk/qcom/clk-smd-rpm.c:692:28: error: 'msm8998_ln_bb_clk1_a' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
                               ^~~~~~~~~~~~~~~~~~~~
>> drivers/clk/qcom/clk-smd-rpm.c:694:3: error: 'RPM_SMD_LN_BB_CLK2_A' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
      ^~~~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/clk-smd-rpm.c:694:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:694:3: note: (near initialization for 'msm8998_clks')
>> drivers/clk/qcom/clk-smd-rpm.c:694:28: error: 'msm8998_ln_bb_clk2_a' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
                               ^~~~~~~~~~~~~~~~~~~~
>> drivers/clk/qcom/clk-smd-rpm.c:696:3: error: 'RPM_SMD_LN_BB_CLK3_A_PIN' undeclared here (not in a function)
     [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin,
      ^~~~~~~~~~~~~~~~~~~~~~~~
   drivers/clk/qcom/clk-smd-rpm.c:696:3: error: array index in initializer not of integer type
   drivers/clk/qcom/clk-smd-rpm.c:696:3: note: (near initialization for 'msm8998_clks')

vim +/RPM_SMD_LN_BB_CLK1 +691 drivers/clk/qcom/clk-smd-rpm.c

   657	
   658	/* msm8998 */
   659	DEFINE_CLK_SMD_RPM(msm8998, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
   660	DEFINE_CLK_SMD_RPM(msm8998, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
   661	DEFINE_CLK_SMD_RPM(msm8998, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
   662	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, div_clk1, div_clk1_a, 0xb);
   663	DEFINE_CLK_SMD_RPM(msm8998, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
   664	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, bb_clk1_a, 1);
   665	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, bb_clk2_a, 2);
   666	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin,
   667					     3);
   668	DEFINE_CLK_SMD_RPM(msm8998, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk,
   669			   QCOM_SMD_RPM_MMAXI_CLK, 0);
   670	DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk,
   671			   QCOM_SMD_RPM_AGGR_CLK, 1);
   672	DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk,
   673			   QCOM_SMD_RPM_AGGR_CLK, 2);
   674	DEFINE_CLK_SMD_RPM_QDSS(msm8998, qdss_clk, qdss_a_clk,
   675				QCOM_SMD_RPM_MISC_CLK, 1);
   676	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk1, rf_clk1_a, 4);
   677	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk2_pin, rf_clk2_a_pin, 5);
   678	DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, rf_clk3, rf_clk3_a, 6);
   679	DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, rf_clk3_pin, rf_clk3_a_pin, 6);
   680	static struct clk_smd_rpm *msm8998_clks[] = {
   681		[RPM_SMD_SNOC_CLK] = &msm8998_snoc_clk,
   682		[RPM_SMD_SNOC_A_CLK] = &msm8998_snoc_a_clk,
   683		[RPM_SMD_CNOC_CLK] = &msm8998_cnoc_clk,
   684		[RPM_SMD_CNOC_A_CLK] = &msm8998_cnoc_a_clk,
   685		[RPM_SMD_CE1_CLK] = &msm8998_ce1_clk,
   686		[RPM_SMD_CE1_A_CLK] = &msm8998_ce1_a_clk,
   687		[RPM_SMD_DIV_CLK1] = &msm8998_div_clk1,
   688		[RPM_SMD_DIV_A_CLK1] = &msm8998_div_clk1_a,
   689		[RPM_SMD_IPA_CLK] = &msm8998_ipa_clk,
   690		[RPM_SMD_IPA_A_CLK] = &msm8998_ipa_a_clk,
 > 691		[RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1,
 > 692		[RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a,
   693		[RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
 > 694		[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
   695		[RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin,
 > 696		[RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin,
   697		[RPM_SMD_MMAXI_CLK] = &msm8998_mmssnoc_axi_rpm_clk,
   698		[RPM_SMD_MMAXI_A_CLK] = &msm8998_mmssnoc_axi_rpm_a_clk,
   699		[RPM_SMD_AGGR1_NOC_CLK] = &msm8998_aggre1_noc_clk,
   700		[RPM_SMD_AGGR1_NOC_A_CLK] = &msm8998_aggre1_noc_a_clk,
   701		[RPM_SMD_AGGR2_NOC_CLK] = &msm8998_aggre2_noc_clk,
   702		[RPM_SMD_AGGR2_NOC_A_CLK] = &msm8998_aggre2_noc_a_clk,
   703		[RPM_SMD_QDSS_CLK] = &msm8998_qdss_clk,
   704		[RPM_SMD_QDSS_A_CLK] = &msm8998_qdss_a_clk,
   705		[RPM_SMD_RF_CLK1] = &msm8998_rf_clk1,
   706		[RPM_SMD_RF_CLK1_A] = &msm8998_rf_clk1_a,
   707		[RPM_SMD_RF_CLK2_PIN] = &msm8998_rf_clk2_pin,
   708		[RPM_SMD_RF_CLK2_A_PIN] = &msm8998_rf_clk2_a_pin,
   709		[RPM_SMD_RF_CLK3] = &msm8998_rf_clk3,
   710		[RPM_SMD_RF_CLK3_A] = &msm8998_rf_clk3_a,
   711		[RPM_SMD_RF_CLK3_PIN] = &msm8998_rf_clk3_pin,
   712		[RPM_SMD_RF_CLK3_A_PIN] = &msm8998_rf_clk3_a_pin,
   713	};
   714	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 48521 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-12-18  2:56 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-18  0:21 [PATCH v3] clk: qcom: smd: Add support for MSM8998 rpm clocks Jeffrey Hugo
2018-12-18  0:57 ` Jeffrey Hugo
2018-12-18  2:55 ` kbuild test robot
2018-12-18  2:56 ` kbuild test robot

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).