From: Anup Patel <anup@brainfault.org>
To: Palmer Dabbelt <palmer@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>
Cc: Atish Patra <atish.patra@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <anup@brainfault.org>
Subject: [PATCH v4 2/5] irqchip: sifive-plic: Don't inline plic_toggle() and plic_irq_toggle()
Date: Thu, 27 Dec 2018 16:48:18 +0530 [thread overview]
Message-ID: <20181227111821.80908-3-anup@brainfault.org> (raw)
In-Reply-To: <20181227111821.80908-1-anup@brainfault.org>
The plic_toggle() uses raw_spin_lock() and plic_irq_toggle has a
for loop so both these functions are not suitable for being inline
hence this patch removes the inline keyword.
Signed-off-by: Anup Patel <anup@brainfault.org>
---
drivers/irqchip/irq-sifive-plic.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index c23a293a2aae..01bbbbffbcae 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -69,8 +69,8 @@ struct plic_handler {
};
static DEFINE_PER_CPU(struct plic_handler, plic_handlers);
-static inline void plic_toggle(struct plic_handler *handler,
- int hwirq, int enable)
+static void plic_toggle(struct plic_handler *handler,
+ int hwirq, int enable)
{
u32 __iomem *reg = handler->enable_base + (hwirq / 32) * sizeof(u32);
u32 hwirq_mask = 1 << (hwirq % 32);
@@ -83,7 +83,7 @@ static inline void plic_toggle(struct plic_handler *handler,
raw_spin_unlock(&handler->enable_lock);
}
-static inline void plic_irq_toggle(struct irq_data *d, int enable)
+static void plic_irq_toggle(struct irq_data *d, int enable)
{
int cpu;
--
2.17.1
next prev parent reply other threads:[~2018-12-27 11:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-27 11:18 [PATCH v4 0/5] IRQ affinity support in PLIC driver Anup Patel
2018-12-27 11:18 ` [PATCH v4 1/5] irqchip: sifive-plic: Pre-compute context hart base and enable base Anup Patel
2018-12-27 11:18 ` Anup Patel [this message]
2019-01-15 15:54 ` [PATCH v4 2/5] irqchip: sifive-plic: Don't inline plic_toggle() and plic_irq_toggle() Christoph Hellwig
2019-01-19 5:00 ` Anup Patel
2018-12-27 11:18 ` [PATCH v4 3/5] irqchip: sifive-plic: Add warning in plic_init() if handler already present Anup Patel
2019-01-15 15:54 ` Christoph Hellwig
2019-01-19 5:03 ` Anup Patel
2018-12-27 11:18 ` [PATCH v4 4/5] irqchip: sifive-plic: Differentiate between PLIC handler and context Anup Patel
2019-01-15 15:56 ` Christoph Hellwig
2019-01-19 5:25 ` Anup Patel
2018-12-27 11:18 ` [PATCH v4 5/5] irqchip: sifive-plic: Implement irq_set_affinity() for SMP host Anup Patel
2019-01-15 15:57 ` Christoph Hellwig
2019-01-19 5:26 ` Anup Patel
2019-01-08 12:14 ` [PATCH v4 0/5] IRQ affinity support in PLIC driver Anup Patel
2019-01-23 18:57 ` Palmer Dabbelt
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