[v1] drm/msm/dpu: Remove unused enum and comment from dpu mdss

[v1] drm/msm/dpu: Remove unused enum and comment from dpu mdss

[Jayant Shekhar]

Remove enum dpu_iommu_domain from dpu mdss as its unused.

Remove unnecessary comment for variable which is already
removed.

Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
index 68c54d2..1ab8d4a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
@@ -258,12 +258,6 @@ enum dpu_vbif {
 	VBIF_NRT = VBIF_1
 };
 
-enum dpu_iommu_domain {
-	DPU_IOMMU_DOMAIN_UNSECURE,
-	DPU_IOMMU_DOMAIN_SECURE,
-	DPU_IOMMU_DOMAIN_MAX
-};
-
 /**
  * DPU HW,Component order color map
  */
@@ -358,7 +352,6 @@ enum dpu_3d_blend_mode {
  * @alpha_enable: whether the format has an alpha channel
  * @num_planes: number of planes (including meta data planes)
  * @fetch_mode: linear, tiled, or ubwc hw fetch behavior
- * @is_yuv: is format a yuv variant
  * @flag: usage bit flags
  * @tile_width: format tile width
  * @tile_height: format tile height
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [Freedreno] [v1] drm/msm/dpu: Remove unused enum and comment from dpu mdss

[Sean Paul]

On Wed, Dec 19, 2018 at 12:23:53AM +0530, Jayant Shekhar wrote:
> Remove enum dpu_iommu_domain from dpu mdss as its unused.
> 
> Remove unnecessary comment for variable which is already
> removed.
> 
> Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>

Applied to dpu-staging, thanks!

Sean

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> index 68c54d2..1ab8d4a 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h
> @@ -258,12 +258,6 @@ enum dpu_vbif {
>  	VBIF_NRT = VBIF_1
>  };
>  
> -enum dpu_iommu_domain {
> -	DPU_IOMMU_DOMAIN_UNSECURE,
> -	DPU_IOMMU_DOMAIN_SECURE,
> -	DPU_IOMMU_DOMAIN_MAX
> -};
> -
>  /**
>   * DPU HW,Component order color map
>   */
> @@ -358,7 +352,6 @@ enum dpu_3d_blend_mode {
>   * @alpha_enable: whether the format has an alpha channel
>   * @num_planes: number of planes (including meta data planes)
>   * @fetch_mode: linear, tiled, or ubwc hw fetch behavior
> - * @is_yuv: is format a yuv variant
>   * @flag: usage bit flags
>   * @tile_width: format tile width
>   * @tile_height: format tile height
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno

-- 
Sean Paul, Software Engineer, Google / Chromium OS