From: Evan Green <evgreen@chromium.org>
To: Andy Gross <andy.gross@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>
Cc: Can Guo <cang@codeaurora.org>,
Douglas Anderson <dianders@chromium.org>,
Asutosh Das <asutoshd@codeaurora.org>,
Stephen Boyd <swboyd@chromium.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Evan Green <evgreen@chromium.org>,
Jeffrey Hugo <jhugo@codeaurora.org>,
linux-kernel@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>
Subject: [PATCH v2 8/9] phy: qcom-qmp: Move UFS phy to phy_poweron/off
Date: Wed, 23 Jan 2019 14:11:36 -0800 [thread overview]
Message-ID: <20190123221137.41722-9-evgreen@chromium.org> (raw)
In-Reply-To: <20190123221137.41722-1-evgreen@chromium.org>
For UFS, move the actual firing up of the PHY to phy_poweron and
phy_poweroff callbacks, rather than init/exit. UFS calls
phy_poweroff during suspend, so now all clocks and regulators for
the phy can be powered down during suspend.
Signed-off-by: Evan Green <evgreen@chromium.org>
---
Changes in v2:
- Removed whitespace changes (Stephen)
drivers/phy/qualcomm/phy-qcom-qmp.c | 80 +++++++++--------------------
1 file changed, 23 insertions(+), 57 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 721af5706fbb1..fa32b2837e708 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1346,8 +1346,7 @@ static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp)
return 0;
}
-/* PHY Initialization */
-static int qcom_qmp_phy_init(struct phy *phy)
+static int qcom_qmp_phy_enable(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
struct qcom_qmp *qmp = qphy->qmp;
@@ -1428,14 +1427,6 @@ static int qcom_qmp_phy_init(struct phy *phy)
goto err_lane_rst;
}
- /*
- * UFS PHY requires the deassert of software reset before serdes start.
- * For UFS PHYs that do not have software reset control bits, defer
- * starting serdes until the power on callback.
- */
- if ((cfg->type == PHY_TYPE_UFS) && cfg->no_pcs_sw_reset)
- goto out;
-
/*
* Pull out PHY from POWER DOWN state.
* This is active low enable signal to power-down PHY.
@@ -1447,7 +1438,9 @@ static int qcom_qmp_phy_init(struct phy *phy)
usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
/* Pull PHY out of reset state */
- qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+ if (!cfg->no_pcs_sw_reset)
+ qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
+
if (cfg->has_phy_dp_com_ctrl)
qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
@@ -1464,11 +1457,12 @@ static int qcom_qmp_phy_init(struct phy *phy)
goto err_pcs_ready;
}
qmp->phy_initialized = true;
-
-out:
- return ret;
+ return 0;
err_pcs_ready:
+ if (qmp->ufs_reset)
+ reset_control_assert(qmp->ufs_reset);
+
clk_disable_unprepare(qphy->pipe_clk);
err_clk_enable:
if (cfg->has_lane_rst)
@@ -1479,7 +1473,7 @@ static int qcom_qmp_phy_init(struct phy *phy)
return ret;
}
-static int qcom_qmp_phy_exit(struct phy *phy)
+static int qcom_qmp_phy_disable(struct phy *phy)
{
struct qmp_phy *qphy = phy_get_drvdata(phy);
struct qcom_qmp *qmp = qphy->qmp;
@@ -1507,44 +1501,6 @@ static int qcom_qmp_phy_exit(struct phy *phy)
return 0;
}
-static int qcom_qmp_phy_poweron(struct phy *phy)
-{
- struct qmp_phy *qphy = phy_get_drvdata(phy);
- struct qcom_qmp *qmp = qphy->qmp;
- const struct qmp_phy_cfg *cfg = qmp->cfg;
- void __iomem *pcs = qphy->pcs;
- void __iomem *status;
- unsigned int mask, val;
- int ret = 0;
-
- if (cfg->type != PHY_TYPE_UFS)
- return 0;
-
- /*
- * For UFS PHY that has not software reset control, serdes start
- * should only happen when UFS driver explicitly calls phy_power_on
- * after it deasserts software reset.
- */
- if (cfg->no_pcs_sw_reset && !qmp->phy_initialized &&
- (qmp->init_count != 0)) {
- /* start SerDes and Phy-Coding-Sublayer */
- qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
-
- status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
- mask = cfg->mask_pcs_ready;
-
- ret = readl_poll_timeout(status, val, !(val & mask), 1,
- PHY_INIT_COMPLETE_TIMEOUT);
- if (ret) {
- dev_err(qmp->dev, "phy initialization timed-out\n");
- return ret;
- }
- qmp->phy_initialized = true;
- }
-
- return ret;
-}
-
static int qcom_qmp_phy_set_mode(struct phy *phy,
enum phy_mode mode, int submode)
{
@@ -1794,9 +1750,15 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
}
static const struct phy_ops qcom_qmp_phy_gen_ops = {
- .init = qcom_qmp_phy_init,
- .exit = qcom_qmp_phy_exit,
- .power_on = qcom_qmp_phy_poweron,
+ .init = qcom_qmp_phy_enable,
+ .exit = qcom_qmp_phy_disable,
+ .set_mode = qcom_qmp_phy_set_mode,
+ .owner = THIS_MODULE,
+};
+
+static const struct phy_ops qcom_qmp_ufs_ops = {
+ .power_on = qcom_qmp_phy_enable,
+ .power_off = qcom_qmp_phy_disable,
.set_mode = qcom_qmp_phy_set_mode,
.owner = THIS_MODULE,
};
@@ -1807,6 +1769,7 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id)
struct qcom_qmp *qmp = dev_get_drvdata(dev);
struct phy *generic_phy;
struct qmp_phy *qphy;
+ const struct phy_ops *ops = &qcom_qmp_phy_gen_ops;
char prop_name[MAX_PROP_NAME];
int ret;
@@ -1893,7 +1856,10 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id)
}
}
- generic_phy = devm_phy_create(dev, np, &qcom_qmp_phy_gen_ops);
+ if (qmp->cfg->type == PHY_TYPE_UFS)
+ ops = &qcom_qmp_ufs_ops;
+
+ generic_phy = devm_phy_create(dev, np, ops);
if (IS_ERR(generic_phy)) {
ret = PTR_ERR(generic_phy);
dev_err(dev, "failed to create qphy %d\n", ret);
--
2.18.1
next prev parent reply other threads:[~2019-01-23 22:12 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-23 22:11 [PATCH v2 0/9] phy: qcom-ufs: Enable regulators to be off in suspend Evan Green
2019-01-23 22:11 ` [PATCH v2 1/9] dt-bindings: ufs: Add #reset-cells for Qualcomm controllers Evan Green
2019-01-30 18:56 ` Rob Herring
2019-02-01 17:41 ` Stephen Boyd
2019-01-23 22:11 ` [PATCH v2 2/9] dt-bindings: phy-qcom-qmp: Add UFS PHY reset Evan Green
2019-02-01 17:41 ` Stephen Boyd
2019-01-23 22:11 ` [PATCH v2 3/9] dt-bindings: phy: qcom-ufs: Add resets property Evan Green
2019-02-01 17:41 ` Stephen Boyd
2019-01-23 22:11 ` [PATCH v2 4/9] arm64: dts: sdm845: Add UFS PHY reset Evan Green
2019-01-23 22:11 ` [PATCH v2 5/9] arm64: dts: msm8996: Add UFS PHY reset controller Evan Green
2019-01-23 22:11 ` [PATCH v2 6/9] scsi: ufs: qcom: Expose the reset controller for PHY Evan Green
2019-02-01 17:56 ` Stephen Boyd
2019-02-05 17:59 ` Evan Green
2019-01-23 22:11 ` [PATCH v2 7/9] phy: qcom-qmp: Utilize UFS reset controller Evan Green
2019-02-01 18:00 ` Stephen Boyd
2019-02-05 18:00 ` Evan Green
2019-01-23 22:11 ` Evan Green [this message]
2019-01-23 22:11 ` [PATCH v2 9/9] phy: qcom-ufs: Refactor all init steps into phy_poweron Evan Green
2019-02-01 18:43 ` Stephen Boyd
2019-02-05 18:00 ` Evan Green
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190123221137.41722-9-evgreen@chromium.org \
--to=evgreen@chromium.org \
--cc=andy.gross@linaro.org \
--cc=asutoshd@codeaurora.org \
--cc=cang@codeaurora.org \
--cc=dianders@chromium.org \
--cc=jhugo@codeaurora.org \
--cc=kishon@ti.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mgautam@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=swboyd@chromium.org \
--cc=vivek.gautam@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).