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From: Christoph Hellwig <hch@infradead.org>
To: Atish Patra <atish.patra@wdc.com>
Cc: linux-riscv@lists.infradead.org, "Patrick Stählin" <me@packi.ch>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Damien Le Moal" <Damien.LeMoal@wdc.com>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Alan Kao" <alankao@andestech.com>,
	"Dmitriy Cherkasov" <dmitriy@oss-tech.org>,
	"Anup Patel" <anup@brainfault.org>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	linux-kernel@vger.kernel.org, "Zong Li" <zongbox@gmail.com>,
	"Palmer Dabbelt" <palmer@sifive.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Andreas Schwab" <schwab@suse.de>,
	"Marc Zyngier" <marc.zyngier@arm.com>,
	"Thomas Gleixner" <tglx@linutronix.de>
Subject: Re: [v3 PATCH 6/8] clocksource/drivers/riscv: Add required checks during clock source init
Date: Fri, 8 Feb 2019 01:04:05 -0800	[thread overview]
Message-ID: <20190208090405.GC16932@infradead.org> (raw)
In-Reply-To: <1549590681-24125-7-git-send-email-atish.patra@wdc.com>

On Thu, Feb 07, 2019 at 05:51:19PM -0800, Atish Patra wrote:
> Currently, clocksource registration happens for an invalid cpu
> for non-smp kernels. This lead to kernel panic as cpu hotplug
> registration will fail for those cpus. Moreover,
> riscv_hartid_to_cpuid can return errors now.
> 
> Do not proceed if hartid or cpuid is invalid. Take this opprtunity
> to print appropriate error strings for different failure cases.
> 
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  drivers/clocksource/timer-riscv.c | 23 ++++++++++++++++++++---
>  1 file changed, 20 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 43189220..3c7ea75b 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -95,13 +95,30 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>  	struct clocksource *cs;
>  
>  	hartid = riscv_of_processor_hartid(n);
> +	if (hartid < 0) {
> +		pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
> +			n, hartid);
> +		return hartid;
> +	}
> +
>  	cpuid = riscv_hartid_to_cpuid(hartid);
> +	if (cpuid < 0) {
> +		pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
> +		return cpuid;
> +	}
>  
>  	if (cpuid != smp_processor_id())
>  		return 0;
>  
> +	pr_err("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
> +	       __func__, cpuid, hartid);

This does not look like an error case to me.  At best it is info,
if not debug.

  reply	other threads:[~2019-02-08  9:04 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-08  1:51 [v3 PATCH 0/8] Various SMP related fixes Atish Patra
2019-02-08  1:51 ` [v3 PATCH 1/8] RISC-V: Do not wait indefinitely in __cpu_up Atish Patra
2019-02-08  9:01   ` Christoph Hellwig
2019-02-08  1:51 ` [v3 PATCH 2/8] RISC-V: Move cpuid to hartid mapping to SMP Atish Patra
2019-02-08  9:03   ` Christoph Hellwig
2019-02-08 22:56     ` Atish Patra
2019-02-08  1:51 ` [v3 PATCH 3/8] RISC-V: Remove NR_CPUs check during hartid search from DT Atish Patra
2019-02-08  1:51 ` [v3 PATCH 4/8] RISC-V: Allow hartid-to-cpuid function to fail Atish Patra
2019-02-08  1:51 ` [v3 PATCH 5/8] RISC-V: Compare cpuid with NR_CPUS before mapping Atish Patra
2019-02-08  1:51 ` [v3 PATCH 6/8] clocksource/drivers/riscv: Add required checks during clock source init Atish Patra
2019-02-08  9:04   ` Christoph Hellwig [this message]
2019-02-08 22:56     ` Atish Patra
2019-02-08  1:51 ` [v3 PATCH 7/8] irqchip/irq-sifive-plic:: Check and continue in case of an invalid cpuid Atish Patra
2019-02-08  1:51 ` [v3 PATCH 8/8] RISC-V: Assign hwcap only according to boot cpu Atish Patra
2019-02-08  9:11   ` Christoph Hellwig
2019-02-08 23:02     ` Atish Patra
2019-02-09  4:26       ` David Abdurachmanov
2019-02-09 16:11         ` Marc Zyngier
2019-02-11 19:02         ` Palmer Dabbelt
2019-02-11 20:03           ` Atish Patra
2019-02-11 22:13             ` Marc Zyngier
2019-02-11 22:23               ` Palmer Dabbelt
2019-02-11 23:25                 ` Atish Patra
2019-02-11 13:23   ` Andreas Schwab

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