* [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause
@ 2019-02-15 8:33 Maxime Chevallier
2019-02-15 13:24 ` Andrew Lunn
2019-02-17 23:34 ` David Miller
0 siblings, 2 replies; 3+ messages in thread
From: Maxime Chevallier @ 2019-02-15 8:33 UTC (permalink / raw)
To: davem
Cc: Maxime Chevallier, netdev, linux-kernel, Andrew Lunn,
Florian Fainelli, Heiner Kallweit, Russell King,
linux-arm-kernel, Antoine Tenart, thomas.petazzoni,
gregory.clement, miquel.raynal
The PHY core expects PHY drivers not to set Pause and Asym_Pause bits,
unless the driver only wants to specify one of them due to HW
limitation. In the case of the Marvell10g driver, we don't need to set
them.
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/marvell10g.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index 496805c0ddfe..c04fe5a75129 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -242,9 +242,6 @@ static int mv3310_config_init(struct phy_device *phydev)
phydev->interface != PHY_INTERFACE_MODE_10GKR)
return -ENODEV;
- __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported);
- __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->supported);
-
if (phydev->c45_ids.devices_in_package & MDIO_DEVS_AN) {
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
if (val < 0)
--
2.19.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause
2019-02-15 8:33 [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause Maxime Chevallier
@ 2019-02-15 13:24 ` Andrew Lunn
2019-02-17 23:34 ` David Miller
1 sibling, 0 replies; 3+ messages in thread
From: Andrew Lunn @ 2019-02-15 13:24 UTC (permalink / raw)
To: Maxime Chevallier
Cc: davem, netdev, linux-kernel, Florian Fainelli, Heiner Kallweit,
Russell King, linux-arm-kernel, Antoine Tenart, thomas.petazzoni,
gregory.clement, miquel.raynal
On Fri, Feb 15, 2019 at 09:33:47AM +0100, Maxime Chevallier wrote:
> The PHY core expects PHY drivers not to set Pause and Asym_Pause bits,
> unless the driver only wants to specify one of them due to HW
> limitation. In the case of the Marvell10g driver, we don't need to set
> them.
>
> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
Thanks Maxime
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause
2019-02-15 8:33 [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause Maxime Chevallier
2019-02-15 13:24 ` Andrew Lunn
@ 2019-02-17 23:34 ` David Miller
1 sibling, 0 replies; 3+ messages in thread
From: David Miller @ 2019-02-17 23:34 UTC (permalink / raw)
To: maxime.chevallier
Cc: netdev, linux-kernel, andrew, f.fainelli, hkallweit1, linux,
linux-arm-kernel, antoine.tenart, thomas.petazzoni,
gregory.clement, miquel.raynal
From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: Fri, 15 Feb 2019 09:33:47 +0100
> The PHY core expects PHY drivers not to set Pause and Asym_Pause bits,
> unless the driver only wants to specify one of them due to HW
> limitation. In the case of the Marvell10g driver, we don't need to set
> them.
>
> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
Applied, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-02-15 8:33 [PATCH net-next] net: phy: marvell10g: Don't explicitly set Pause and Asym_Pause Maxime Chevallier
2019-02-15 13:24 ` Andrew Lunn
2019-02-17 23:34 ` David Miller
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