linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	mst@redhat.com, yu-cheng.yu@intel.com,
	Zhang Yi Z <yi.z.zhang@linux.intel.com>
Subject: Re: [PATCH v3 3/8] KVM:CPUID: Add CPUID support for Guest CET
Date: Mon, 4 Mar 2019 10:28:36 -0800	[thread overview]
Message-ID: <20190304182836.GB17120@linux.intel.com> (raw)
In-Reply-To: <20190303093645.GB31538@local-michael-cet-test.sh.intel.com>

On Sun, Mar 03, 2019 at 05:36:45PM +0800, Yang Weijiang wrote:
> On Fri, Mar 01, 2019 at 06:53:23AM -0800, Sean Christopherson wrote:
> > On Thu, Feb 28, 2019 at 04:28:32PM +0800, Yang Weijiang wrote:
> > > On Thu, Feb 28, 2019 at 07:59:40AM -0800, Sean Christopherson wrote:
> > > > On Mon, Feb 25, 2019 at 09:27:11PM +0800, Yang Weijiang wrote:
> > > > > Guest CET SHSTK and IBT capability are reported via
> > > > > CPUID.(EAX=7, ECX=0):ECX[bit 7] and EDX[bit 20] respectively.
> > > > > Guest user mode and supervisor mode xsaves component size
> > > > > is reported via CPUID.(EAX=0xD, ECX=1):ECX[bit 11] and ECX[bit 12]
> > > > > respectively.
> > > > > 
> > > > > Signed-off-by: Zhang Yi Z <yi.z.zhang@linux.intel.com>
> > > > > Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> > > > > ---
> > > > >  arch/x86/kvm/cpuid.c | 60 +++++++++++++++++++++++++++++++++-----------
> > > > >  arch/x86/kvm/x86.h   |  4 +++
> > > > >  2 files changed, 50 insertions(+), 14 deletions(-)
> > > > > 
> > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > > > > index cb1aece25b17..5e05756cc6db 100644
> > > > > --- a/arch/x86/kvm/cpuid.c
> > > > > +++ b/arch/x86/kvm/cpuid.c
> > > > > @@ -65,6 +65,16 @@ u64 kvm_supported_xcr0(void)
> > > > >  	return xcr0;
> > > > >  }
> > > > >  
> > > > > +u64 kvm_supported_xss(void)
> > > > > +{
> > > > > +	u64 xss;
> > > > > +
> > > > > +	rdmsrl(MSR_IA32_XSS, xss);
> > > > > +	xss &= KVM_SUPPORTED_XSS;
> > > > > +	return xss;
> > > > > +}
> > > > > +EXPORT_SYMBOL(kvm_supported_xss);
> > > > > +
> > > > >  #define F(x) bit(X86_FEATURE_##x)
> > > > >  
> > > > >  /* For scattered features from cpufeatures.h; we currently expose none */
> > > > > @@ -323,6 +333,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> > > > >  				 u32 index, int *nent, int maxnent)
> > > > >  {
> > > > >  	int r;
> > > > > +	u32 eax, ebx, ecx, edx;
> > > > >  	unsigned f_nx = is_efer_nx() ? F(NX) : 0;
> > > > >  #ifdef CONFIG_X86_64
> > > > >  	unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
> > > > > @@ -503,6 +514,20 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> > > > >  			 * if the host doesn't support it.
> > > > >  			 */
> > > > >  			entry->edx |= F(ARCH_CAPABILITIES);
> > > > > +
> > > > > +			/*
> > > > > +			 * Guest OS CET enabling is designed independent to
> > > > > +			 * host enabling, it only has dependency on Host HW
> > > > > +			 * capability, if it has, report CET support to
> > > > > +			 * Guest.
> > > > > +			 */
> > > > > +			cpuid_count(7, 0, &eax, &ebx, &ecx, &edx);
> > > > > +			if (ecx & F(SHSTK))
> > > > > +				entry->ecx |= F(SHSTK);
> > > > > +
> > > > > +			if (edx & F(IBT))
> > > > > +				entry->edx |= F(IBT);
> > > > 
> > > > There's no need to manually add these flags.  They will be automatically
> > > > kept if supported in hardware because your previous patch, 02/08, added
> > > > them to the mask of features that can be exposed to the guest,
> > > > i.e. set them in kvm_cpuid_7_0_e{c,d}x_x86_features.
> > > > 
> > > I shared the same thought as you before, but after I took a closer look at the
> > > kernel code, actually, when host CET feature is disabled by user via
> > > cmdline options(no_cet_shstk and no_cet_ibt), it'll mask out CET feature bits in
> > > boot_cpu_data.x86_capbility[] array, and cpuid_mask() will make the bits
> > > in previous definition lost, so these lines actually add them back when
> > > host CET is disabled.
> > 
> > 'entry' is filled by do_cpuid_1_ent(), which does cpuid_count(), same as
> > your code, i.e. it's not affected by whether or not the host kernel is
> > using each feature.
> >
> I checked CET kernel patch:
> #ifdef CONFIG_X86_INTEL_SHADOW_STACK_USER
> static __init int setup_disable_shstk(char *s) {
> 	/* require an exact match without trailing characters */
> 	if (s[0] != '\0')
> 		return 0;
> 
> 	if (!boot_cpu_has(X86_FEATURE_SHSTK))
> 		return 1;
> 
> 	setup_clear_cpu_cap(X86_FEATURE_SHSTK);
> 	pr_info("x86: 'no_cet_shstk' specified, disabling Shadow Stack\n");
> 	return 1;
> }
> __setup("no_cet_shstk", setup_disable_shstk); #endif
> 
> setup_disable_shstk()->setup_clear_cpu_cap(X86_FEATURE_SHSTK)->do_clear_cpu_cap(NULL,
> feature)->clear_feature(c, feature)->clear_cpu_cap(&boot_cpu_data, feature);
> 
> this path will clear boot_cpu_data.x86_capability[X86_FEATURE_SHSTK] if "no_cet_shstk" is set.
> but in cpuid_mask(), it will "AND" the bit with SHSTK bit set 
> in kvm_cpuid_7_0_ecx_x86_features, so the bit in ecx is cleared, 
> need to add the bit back according to host cpuid_count(). 
> the CET kernel patch can be seen in below patch link.

Ah, I see.  In this case we need to honor boot_cpu_data.  The idea is
that a feature should not be exposed to the guest, i.e. actually used,
if it has been explicitly disabled by the user, e.g. to workaround a
hardware or firmware issue.  The cases where a feature is exposed to
the guest even when disabled in host is when said feature is emulated
by KVM in software.

> 
> > > please check CET kernel patch here:
> > > https://lkml.org/lkml/2018/11/20/204

  reply	other threads:[~2019-03-04 18:28 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-25 13:27 [PATCH v3 0/8] This patch-set is to enable Guest CET support Yang Weijiang
2019-02-25 13:27 ` [PATCH v3 1/8] KVM:VMX: Define CET VMCS fields and bits Yang Weijiang
2019-02-26 19:31   ` Jim Mattson
2019-02-26  7:52     ` Yang Weijiang
2019-02-28 15:53     ` Sean Christopherson
2019-02-28  9:51       ` Yang Weijiang
2019-02-25 13:27 ` [PATCH v3 2/8] KVM:CPUID: Define CET CPUID bits and CR4.CET master enable bit Yang Weijiang
2019-02-26 19:48   ` Jim Mattson
2019-02-26  7:57     ` Yang Weijiang
2019-03-01  2:15       ` Xiaoyao Li
2019-02-28 16:04   ` Sean Christopherson
2019-02-28  8:10     ` Yang Weijiang
2019-02-25 13:27 ` [PATCH v3 3/8] KVM:CPUID: Add CPUID support for Guest CET Yang Weijiang
2019-02-28 15:59   ` Sean Christopherson
2019-02-28  8:28     ` Yang Weijiang
2019-03-01 14:53       ` Sean Christopherson
2019-03-03  9:36         ` Yang Weijiang
2019-03-04 18:28           ` Sean Christopherson [this message]
2019-03-04 12:17             ` Yang Weijiang
2019-03-04 18:47   ` Sean Christopherson
2019-03-04 10:01     ` Yang Weijiang
2019-03-04 18:54     ` Sean Christopherson
2019-03-04 10:11       ` Yang Weijiang
2019-03-08 11:32   ` Paolo Bonzini
2019-03-10 12:18     ` Yang Weijiang
2019-02-25 13:27 ` [PATCH v3 4/8] KVM:CPUID: Fix xsaves area size calculation for CPUID.(EAX=0xD,ECX=1) Yang Weijiang
2019-02-25 13:27 ` [PATCH v3 5/8] KVM:VMX: Pass through host CET related MSRs to Guest Yang Weijiang
2019-03-04 18:53   ` Sean Christopherson
2019-03-04 10:07     ` Yang Weijiang
2019-03-05  3:21       ` Sean Christopherson
2019-02-25 13:27 ` [PATCH v3 6/8] KVM:VMX: Load Guest CET via VMCS when CET is enabled in Guest Yang Weijiang
2019-02-28 16:17   ` Sean Christopherson
2019-02-28  8:38     ` Yang Weijiang
2019-03-01 14:58       ` Sean Christopherson
2019-03-03 12:26         ` Yang Weijiang
2019-03-04 18:43           ` Sean Christopherson
2019-03-04  9:56             ` Yang Weijiang
2019-03-05  3:12               ` Sean Christopherson
2019-03-04 12:36                 ` Yang Weijiang
2019-03-08 16:28                   ` Sean Christopherson
2019-03-08 16:36                     ` Paolo Bonzini
2019-02-25 13:27 ` [PATCH v3 7/8] KVM:X86: Add XSS bit 11 and 12 support for CET xsaves/xrstors Yang Weijiang
2019-02-28 16:25   ` Sean Christopherson
2019-02-28  8:44     ` Yang Weijiang
2019-03-08 11:32       ` Paolo Bonzini
2019-03-10 12:20         ` Yang Weijiang
2019-03-10 13:35           ` Yang Weijiang
2019-03-11 15:32             ` Paolo Bonzini
2019-03-12 14:30               ` Yang Weijiang
2019-03-08 10:49   ` Paolo Bonzini
2019-03-11  1:29     ` Kang, Luwei
2019-02-25 13:27 ` [PATCH v3 8/8] KVM:X86: Add user-space read/write interface for CET MSRs Yang Weijiang
2019-02-28 16:32   ` Sean Christopherson
2019-02-28  9:41     ` Yang Weijiang
2019-03-08 17:30       ` Sean Christopherson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190304182836.GB17120@linux.intel.com \
    --to=sean.j.christopherson@intel.com \
    --cc=jmattson@google.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=rkrcmar@redhat.com \
    --cc=weijiang.yang@intel.com \
    --cc=yi.z.zhang@linux.intel.com \
    --cc=yu-cheng.yu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).