From: Marc Zyngier <marc.zyngier@arm.com>
To: Lina Iyer <ilina@codeaurora.org>
Cc: swboyd@chromium.org, evgreen@chromium.org,
linux-kernel@vger.kernel.org, rplsssn@codeaurora.org,
linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com,
bjorn.andersson@linaro.org, dianders@chromium.org,
linus.walleij@linaro.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v4 03/10] of/irq: document properties for wakeup interrupt parent
Date: Mon, 18 Mar 2019 17:42:36 +0000 [thread overview]
Message-ID: <20190318174236.072f0a95@why.wild-wind.fr.eu.org> (raw)
In-Reply-To: <20190313211844.29416-4-ilina@codeaurora.org>
On Wed, 13 Mar 2019 15:18:37 -0600
Lina Iyer <ilina@codeaurora.org> wrote:
Please do Cc Rob when posting DT related patches.
> Some interrupt controllers in a SoC, are always powered on and have a
> select interrupts routed to them, so that they can wakeup the SoC from
> suspend. Add wakeup-parent DT property to refer to these interrupt
> controllers.
>
> If the interrupts routed to the wakeup parent are not sequential, than a
> map needs to exist to associate the same interrupt line on multiple
> interrupt controllers. Providing this map in every driver is cumbersome.
> Let's add this in the device tree and document the properties to map the
> interrupt specifiers
>
> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
> ---
> Changes in v4:
> - Added this documentation
> ---
> .../interrupt-controller/interrupts.txt | 39 +++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> index 8a3c40829899..917b598317f5 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> @@ -108,3 +108,42 @@ commonly used:
> sensitivity = <7>;
> };
> };
> +
> +3) Interrupt wakeup parent
> +--------------------------
> +
> +Some interrupt controllers in a SoC, are always powered on and have a select
> +interrupts routed to them, so that they can wakeup the SoC from suspend. These
> +interrupt controllers do not fall into the category of a parent interrupt
> +controller and can be specified by the "wakeup-parent" property and contain a
> +single phandle referring to the wakeup capable interrupt controller.
> +
> + Example:
> + wakeup-parent = <&pdc_intc>;
> +
> +
> +4) Interrupt mapping
> +--------------------
> +
> +Sometimes interrupts may be detected by more than one interrupt controller
> +(depending on which controller is active). The interrupt controllers may not
> +be in hierarchy and therefore the interrupt controller driver is required to
> +establish the relationship between the same interrupt at different interrupt
> +controllers. If these interrupts are not sequential then a map needs to be
> +specified to help identify these interrupts.
> +
> +Mapping the interrupt specifiers in the device tree can be done using the
> +"irqdomain-map" property. The property contains interrupt specifier at the
> +current interrupt controller followed by the interrupt specifier at the mapped
> +interrupt controller.
> +
> + irqdomain-map = <incoming-interrupt-specifier mapped-interrupt-specifier>
> +
> +The optional properties "irqdomain-map-mask" and "irqdomain-map-pass-thru" may
> +be provided to help interpret the valid bits of the incoming and mapped
> +interrupt specifiers respectively.
> +
> + Example:
> + irqdomain-map = <22 0 &intc 36 0>, <24 0 &intc 37 0>;
> + irqdomain-map-mask = <0xff 0>;
> + irqdomain-map-pass-thru = <0 0xff>;
This doesn't quite explain how the mask and pass-thru properties are
used. I guess that the mask is used to define the 'useful bits' on the
incoming side, but pass-thru puzzles me. In your example, does it mean
that incoming lines map to outgoing interrupt <0 0>?
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2019-03-18 17:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-13 21:18 [PATCH v4 00/10] support wakeup capable GPIOs Lina Iyer
2019-03-13 21:18 ` [PATCH v4 01/10] gpio: Add support for hierarchical IRQ domains Lina Iyer
2019-03-13 21:18 ` [PATCH v4 02/10] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer
2019-03-13 21:18 ` [PATCH v4 03/10] of/irq: document properties for wakeup interrupt parent Lina Iyer
2019-03-18 17:42 ` Marc Zyngier [this message]
2019-04-04 15:58 ` Lina Iyer
2019-04-15 12:42 ` Marc Zyngier
2019-04-15 21:11 ` Lina Iyer
2019-04-16 16:54 ` Stephen Boyd
2019-04-16 17:42 ` Lina Iyer
2019-04-17 14:36 ` Linus Walleij
2019-03-13 21:18 ` [PATCH v4 04/10] of: irq: add helper to remap interrupts to another irqdomain Lina Iyer
2019-03-22 17:43 ` Lina Iyer
2019-03-13 21:18 ` [PATCH v4 05/10] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2019-03-13 21:18 ` [PATCH v4 06/10] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Lina Iyer
2019-03-15 23:37 ` Rob Herring
2019-03-18 15:37 ` Lina Iyer
2019-03-13 21:18 ` [PATCH v4 07/10] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Lina Iyer
2019-03-15 16:28 ` Stephen Boyd
2019-03-16 11:39 ` Marc Zyngier
2019-03-21 21:54 ` Stephen Boyd
2019-04-16 21:26 ` Lina Iyer
2019-04-17 13:58 ` Linus Walleij
2019-04-22 22:58 ` Lina Iyer
2019-04-17 16:08 ` Lina Iyer
2019-04-17 17:38 ` Linus Walleij
2019-03-13 21:18 ` [PATCH v4 08/10] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer
2019-03-13 21:18 ` [PATCH v4 09/10] arm64: dts: qcom: setup PDC as wakeup parent for GPIOs " Lina Iyer
2019-03-13 21:18 ` [PATCH v4 10/10] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer
2019-04-15 12:43 ` [PATCH v4 00/10] support wakeup capable GPIOs Marc Zyngier
2019-04-15 15:56 ` Lina Iyer
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