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* [v2] ASoC: AMD: Configure wclk and bclk of master codec
@ 2019-03-25  6:38 Agrawal, Akshu
  2019-03-25 12:06 ` Mark Brown
  2019-03-25 12:16 ` Mark Brown
  0 siblings, 2 replies; 3+ messages in thread
From: Agrawal, Akshu @ 2019-03-25  6:38 UTC (permalink / raw)
  Cc: Agrawal, Akshu, djkurtz, Deucher, Alexander,
	Adam.Thomson.Opensource, Liam Girdwood, Mark Brown,
	Jaroslav Kysela, Takashi Iwai, Mukunda, Vijendar, Wei Yongjun,
	Kuninori Morimoto,
	moderated list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEM...,
	open list

With CCF support in da7219, we can now set the correct rate of
wclk and bclk.
Setting bclk at lower rate at 1.53Mhz from its earlier default
rate of 3Mhz, also fixes noise issue observed on some dmics.

v2: Removed clk set rate and enable/disable from da7219 ops as
da7219 codec takes care of them internally. Clock configuration
kept for those codecs where da7219 acts as master of clock.
As suggested by Adam Thomson.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
---
 sound/soc/amd/acp-da7219-max98357a.c | 45 +++++++++++++++++-----------
 1 file changed, 28 insertions(+), 17 deletions(-)

diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c
index 8e2ce369a295..7737c6dc026a 100644
--- a/sound/soc/amd/acp-da7219-max98357a.c
+++ b/sound/soc/amd/acp-da7219-max98357a.c
@@ -46,7 +46,8 @@
 #define DUAL_CHANNEL		2
 
 static struct snd_soc_jack cz_jack;
-static struct clk *da7219_dai_clk;
+static struct clk *da7219_dai_wclk;
+static struct clk *da7219_dai_bclk;
 extern int bt_uart_enable;
 
 static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
@@ -72,7 +73,8 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
 		return ret;
 	}
 
-	da7219_dai_clk = clk_get(component->dev, "da7219-dai-bclk");
+	da7219_dai_wclk = clk_get(component->dev, "da7219-dai-wclk");
+	da7219_dai_bclk = clk_get(component->dev, "da7219-dai-bclk");
 
 	ret = snd_soc_card_jack_new(card, "Headset Jack",
 				SND_JACK_HEADSET | SND_JACK_LINEOUT |
@@ -94,12 +96,15 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd)
 	return 0;
 }
 
-static int da7219_clk_enable(struct snd_pcm_substream *substream)
+static int da7219_clk_enable(struct snd_pcm_substream *substream,
+			     int wclk_rate, int bclk_rate)
 {
 	int ret = 0;
 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
 
-	ret = clk_prepare_enable(da7219_dai_clk);
+	clk_set_rate(da7219_dai_wclk, wclk_rate);
+	clk_set_rate(da7219_dai_bclk, bclk_rate);
+	ret = clk_prepare_enable(da7219_dai_bclk);
 	if (ret < 0) {
 		dev_err(rtd->dev, "can't enable master clock %d\n", ret);
 		return ret;
@@ -110,7 +115,7 @@ static int da7219_clk_enable(struct snd_pcm_substream *substream)
 
 static void da7219_clk_disable(void)
 {
-	clk_disable_unprepare(da7219_dai_clk);
+	clk_disable_unprepare(da7219_dai_bclk);
 }
 
 static const unsigned int channels[] = {
@@ -151,7 +156,7 @@ static int cz_da7219_play_startup(struct snd_pcm_substream *substream)
 				   &constraints_rates);
 
 	machine->play_i2s_instance = I2S_SP_INSTANCE;
-	return da7219_clk_enable(substream);
+	return 0;
 }
 
 static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
@@ -173,12 +178,7 @@ static int cz_da7219_cap_startup(struct snd_pcm_substream *substream)
 
 	machine->cap_i2s_instance = I2S_SP_INSTANCE;
 	machine->capture_channel = CAP_CHANNEL1;
-	return da7219_clk_enable(substream);
-}
-
-static void cz_da7219_shutdown(struct snd_pcm_substream *substream)
-{
-	da7219_clk_disable();
+	return 0;
 }
 
 static int cz_max_startup(struct snd_pcm_substream *substream)
@@ -199,7 +199,7 @@ static int cz_max_startup(struct snd_pcm_substream *substream)
 				   &constraints_rates);
 
 	machine->play_i2s_instance = I2S_BT_INSTANCE;
-	return da7219_clk_enable(substream);
+	return 0;
 }
 
 static void cz_max_shutdown(struct snd_pcm_substream *substream)
@@ -225,7 +225,7 @@ static int cz_dmic0_startup(struct snd_pcm_substream *substream)
 				   &constraints_rates);
 
 	machine->cap_i2s_instance = I2S_BT_INSTANCE;
-	return da7219_clk_enable(substream);
+	return 0;
 }
 
 static int cz_dmic1_startup(struct snd_pcm_substream *substream)
@@ -247,7 +247,7 @@ static int cz_dmic1_startup(struct snd_pcm_substream *substream)
 
 	machine->cap_i2s_instance = I2S_SP_INSTANCE;
 	machine->capture_channel = CAP_CHANNEL0;
-	return da7219_clk_enable(substream);
+	return 0;
 }
 
 static void cz_dmic_shutdown(struct snd_pcm_substream *substream)
@@ -255,29 +255,40 @@ static void cz_dmic_shutdown(struct snd_pcm_substream *substream)
 	da7219_clk_disable();
 }
 
+static int cz_da7219_hw_params(struct snd_pcm_substream *substream,
+				      struct snd_pcm_hw_params *params)
+{
+	int wclk, bclk;
+
+	wclk = params_rate(params);
+	bclk = wclk * params_channels(params) *
+		snd_pcm_format_width(params_format(params));
+	return da7219_clk_enable(substream, wclk, bclk);
+}
 static const struct snd_soc_ops cz_da7219_play_ops = {
 	.startup = cz_da7219_play_startup,
-	.shutdown = cz_da7219_shutdown,
 };
 
 static const struct snd_soc_ops cz_da7219_cap_ops = {
 	.startup = cz_da7219_cap_startup,
-	.shutdown = cz_da7219_shutdown,
 };
 
 static const struct snd_soc_ops cz_max_play_ops = {
 	.startup = cz_max_startup,
 	.shutdown = cz_max_shutdown,
+	.hw_params = cz_da7219_hw_params,
 };
 
 static const struct snd_soc_ops cz_dmic0_cap_ops = {
 	.startup = cz_dmic0_startup,
 	.shutdown = cz_dmic_shutdown,
+	.hw_params = cz_da7219_hw_params,
 };
 
 static const struct snd_soc_ops cz_dmic1_cap_ops = {
 	.startup = cz_dmic1_startup,
 	.shutdown = cz_dmic_shutdown,
+	.hw_params = cz_da7219_hw_params,
 };
 
 static struct snd_soc_dai_link cz_dai_7219_98357[] = {
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [v2] ASoC: AMD: Configure wclk and bclk of master codec
  2019-03-25  6:38 [v2] ASoC: AMD: Configure wclk and bclk of master codec Agrawal, Akshu
@ 2019-03-25 12:06 ` Mark Brown
  2019-03-25 12:16 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2019-03-25 12:06 UTC (permalink / raw)
  To: Agrawal, Akshu
  Cc: djkurtz, Deucher, Alexander, Adam.Thomson.Opensource,
	Liam Girdwood, Jaroslav Kysela, Takashi Iwai, Mukunda, Vijendar,
	Wei Yongjun, Kuninori Morimoto,
	moderated list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEM...,
	open list

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On Mon, Mar 25, 2019 at 06:38:27AM +0000, Agrawal, Akshu wrote:

> v2: Removed clk set rate and enable/disable from da7219 ops as
> da7219 codec takes care of them internally. Clock configuration
> kept for those codecs where da7219 acts as master of clock.
> As suggested by Adam Thomson.
> 
> Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
> ---

Place any inter-version changelogs after the --- as covered in
submitting-patches.rst. 

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [v2] ASoC: AMD: Configure wclk and bclk of master codec
  2019-03-25  6:38 [v2] ASoC: AMD: Configure wclk and bclk of master codec Agrawal, Akshu
  2019-03-25 12:06 ` Mark Brown
@ 2019-03-25 12:16 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2019-03-25 12:16 UTC (permalink / raw)
  To: Agrawal, Akshu
  Cc: djkurtz, Deucher, Alexander, Adam.Thomson.Opensource,
	Liam Girdwood, Jaroslav Kysela, Takashi Iwai, Mukunda, Vijendar,
	Wei Yongjun, Kuninori Morimoto,
	moderated list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEM...,
	open list

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On Mon, Mar 25, 2019 at 06:38:27AM +0000, Agrawal, Akshu wrote:
> With CCF support in da7219, we can now set the correct rate of
> wclk and bclk.
> Setting bclk at lower rate at 1.53Mhz from its earlier default
> rate of 3Mhz, also fixes noise issue observed on some dmics.

This doesn't seem to apply against current code, please check and
resend.

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^ permalink raw reply	[flat|nested] 3+ messages in thread

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2019-03-25 12:06 ` Mark Brown
2019-03-25 12:16 ` Mark Brown

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