[PATCH] spi: tegra20-slink: change chip select action order

[PATCH] spi: tegra20-slink: change chip select action order

[Randolph Maaßen]

To transfer via SPI the tegra20-slink driver first sets the command
register, which contains the chip select value, and after that the
command2 register, which contains the chip select line. This leads to a
small spike in the chip selct 0 line between the set of the value and
the selection of the chip select line.

This commit changes the order of the register writes so that first the
chip select line is chosen and then the value is set, removing the
spike.

Signed-off-by: Randolph Maaßen <gaireg@gaireg.de>
---
 drivers/spi/spi-tegra20-slink.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index 1427f343b39a..6d4679126213 100644
--- a/drivers/spi/spi-tegra20-slink.c
+++ b/drivers/spi/spi-tegra20-slink.c
@@ -717,9 +717,6 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
 	command2 = tspi->command2_reg;
 	command2 &= ~(SLINK_RXEN | SLINK_TXEN);
 
-	tegra_slink_writel(tspi, command, SLINK_COMMAND);
-	tspi->command_reg = command;
-
 	tspi->cur_direction = 0;
 	if (t->rx_buf) {
 		command2 |= SLINK_RXEN;
@@ -729,9 +726,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
 		command2 |= SLINK_TXEN;
 		tspi->cur_direction |= DATA_DIR_TX;
 	}
+
+	/*
+	 * Writing to the command2 register bevore the command register prevents
+	 * a spike in chip_select line 0. This selects the chip_select line
+	 * before changing the chip_select value.
+	 */
 	tegra_slink_writel(tspi, command2, SLINK_COMMAND2);
 	tspi->command2_reg = command2;
 
+	tegra_slink_writel(tspi, command, SLINK_COMMAND);
+	tspi->command_reg = command;
+
 	if (total_fifo_words > SLINK_FIFO_DEPTH)
 		ret = tegra_slink_start_dma_based_transfer(tspi, t);
 	else
-- 
2.11.0

Re: [PATCH] spi: tegra20-slink: change chip select action order

[Thierry Reding]

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On Tue, Mar 26, 2019 at 03:30:50PM +0100, Randolph Maaßen wrote:
> To transfer via SPI the tegra20-slink driver first sets the command
> register, which contains the chip select value, and after that the
> command2 register, which contains the chip select line. This leads to a
> small spike in the chip selct 0 line between the set of the value and
> the selection of the chip select line.
> 
> This commit changes the order of the register writes so that first the
> chip select line is chosen and then the value is set, removing the
> spike.
> 
> Signed-off-by: Randolph Maaßen <gaireg@gaireg.de>
> ---
>  drivers/spi/spi-tegra20-slink.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)

Looks good to me. Adding Sowjanya who has been looking into SPI
recently.

Thierry

> diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
> index 1427f343b39a..6d4679126213 100644
> --- a/drivers/spi/spi-tegra20-slink.c
> +++ b/drivers/spi/spi-tegra20-slink.c
> @@ -717,9 +717,6 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
>  	command2 = tspi->command2_reg;
>  	command2 &= ~(SLINK_RXEN | SLINK_TXEN);
>  
> -	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> -	tspi->command_reg = command;
> -
>  	tspi->cur_direction = 0;
>  	if (t->rx_buf) {
>  		command2 |= SLINK_RXEN;
> @@ -729,9 +726,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
>  		command2 |= SLINK_TXEN;
>  		tspi->cur_direction |= DATA_DIR_TX;
>  	}
> +
> +	/*
> +	 * Writing to the command2 register bevore the command register prevents
> +	 * a spike in chip_select line 0. This selects the chip_select line
> +	 * before changing the chip_select value.
> +	 */
>  	tegra_slink_writel(tspi, command2, SLINK_COMMAND2);
>  	tspi->command2_reg = command2;
>  
> +	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> +	tspi->command_reg = command;
> +
>  	if (total_fifo_words > SLINK_FIFO_DEPTH)
>  		ret = tegra_slink_start_dma_based_transfer(tspi, t);
>  	else
> -- 
> 2.11.0
> 

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RE: [PATCH] spi: tegra20-slink: change chip select action order

[Sowjanya Komatineni]

> On Tue, Mar 26, 2019 at 03:30:50PM +0100, Randolph Maaßen wrote:
> > To transfer via SPI the tegra20-slink driver first sets the command 
> > register, which contains the chip select value, and after that the
> > command2 register, which contains the chip select line. This leads to 
> > a small spike in the chip selct 0 line between the set of the value 
> > and the selection of the chip select line.
> > 
> > This commit changes the order of the register writes so that first the 
> > chip select line is chosen and then the value is set, removing the 
> > spike.
> > 
> > Signed-off-by: Randolph Maaßen <gaireg@gaireg.de>

Very minor typo in the comment below:

Fix looks good as chip select need to be selected prior to asserting during
start of transfer.

Reviewed-by: Sowjanya Komatineni <skomatineni@nvidia.com>

> > ---
> >  drivers/spi/spi-tegra20-slink.c | 12 +++++++++---
> >  1 file changed, 9 insertions(+), 3 deletions(-)
>
> Looks good to me. Adding Sowjanya who has been looking into SPI recently.
>
> Thierry
>
> > diff --git a/drivers/spi/spi-tegra20-slink.c 
> > b/drivers/spi/spi-tegra20-slink.c index 1427f343b39a..6d4679126213 
> > 100644
> > --- a/drivers/spi/spi-tegra20-slink.c
> > +++ b/drivers/spi/spi-tegra20-slink.c
> > @@ -717,9 +717,6 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
> >  	command2 = tspi->command2_reg;
> >  	command2 &= ~(SLINK_RXEN | SLINK_TXEN);
> >  
> > -	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> > -	tspi->command_reg = command;
> > -
> >  	tspi->cur_direction = 0;
> >  	if (t->rx_buf) {
> >  		command2 |= SLINK_RXEN;
> > @@ -729,9 +726,18 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
> >  		command2 |= SLINK_TXEN;
> >  		tspi->cur_direction |= DATA_DIR_TX;
> >  	}
> > +
> > +	/*
> > +	 * Writing to the command2 register bevore the command register prevents
> > +	 * a spike in chip_select line 0. This selects the chip_select line
> > +	 * before changing the chip_select value.
> > +	 */

Type "before"

> >  	tegra_slink_writel(tspi, command2, SLINK_COMMAND2);
> >  	tspi->command2_reg = command2;
> >  
> > +	tegra_slink_writel(tspi, command, SLINK_COMMAND);
> > +	tspi->command_reg = command;
> > +
> >  	if (total_fifo_words > SLINK_FIFO_DEPTH)
> >  		ret = tegra_slink_start_dma_based_transfer(tspi, t);
> >  	else
> > --
> > 2.11.0
> > 

Re: [PATCH] spi: tegra20-slink: change chip select action order

[Thierry Reding]

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On Tue, Mar 26, 2019 at 03:30:50PM +0100, Randolph Maaßen wrote:
> To transfer via SPI the tegra20-slink driver first sets the command
> register, which contains the chip select value, and after that the
> command2 register, which contains the chip select line. This leads to a
> small spike in the chip selct 0 line between the set of the value and
> the selection of the chip select line.
> 
> This commit changes the order of the register writes so that first the
> chip select line is chosen and then the value is set, removing the
> spike.
> 
> Signed-off-by: Randolph Maaßen <gaireg@gaireg.de>
> ---
>  drivers/spi/spi-tegra20-slink.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)

With the typofix that Sowjanya pointed out, this patch is:

Acked-by: Thierry Reding <treding@nvidia.com>

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